From nobody Thu Nov 6 06:16:02 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 153935576853499.51154360075066; Fri, 12 Oct 2018 07:49:28 -0700 (PDT) Received: from localhost ([::1]:41110 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gAykp-0004Kn-CB for importer@patchew.org; Fri, 12 Oct 2018 10:49:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55420) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gAyeT-00086J-SR for qemu-devel@nongnu.org; Fri, 12 Oct 2018 10:42:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gAyeS-00036D-UQ for qemu-devel@nongnu.org; Fri, 12 Oct 2018 10:42:53 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:51808) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gAyeO-0002yA-Sq; Fri, 12 Oct 2018 10:42:49 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gAyeN-0000PR-Gp; Fri, 12 Oct 2018 15:42:47 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Fri, 12 Oct 2018 15:42:32 +0100 Message-Id: <20181012144235.19646-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181012144235.19646-1-peter.maydell@linaro.org> References: <20181012144235.19646-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 07/10] target/arm: Implement HCR.PTW X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" If the HCR_EL2 PTW virtualizaiton configuration register bit is set, then this means that a stage 2 Permission fault must be generated if a stage 1 translation table access is made to an address that is mapped as Device memory in stage 2. Implement this. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/helper.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 78d05fe1e57..b5752d52dd1 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9134,9 +9134,20 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARM= MMUIdx mmu_idx, hwaddr s2pa; int s2prot; int ret; + ARMCacheAttrs cacheattrs =3D {}; + ARMCacheAttrs *pcacheattrs =3D NULL; + + if (env->cp15.hcr_el2 & HCR_PTW) { + /* + * PTW means we must fault if this S1 walk touches S2 Device + * memory; otherwise we don't care about the attributes and can + * save the S2 translation the effort of computing them. + */ + pcacheattrs =3D &cacheattrs; + } =20 ret =3D get_phys_addr_lpae(env, addr, 0, ARMMMUIdx_S2NS, &s2pa, - &txattrs, &s2prot, &s2size, fi, NULL); + &txattrs, &s2prot, &s2size, fi, pcacheatt= rs); if (ret) { assert(fi->type !=3D ARMFault_None); fi->s2addr =3D addr; @@ -9144,6 +9155,14 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARM= MMUIdx mmu_idx, fi->s1ptw =3D true; return ~0; } + if (pcacheattrs && (pcacheattrs->attrs & 0xf0) =3D=3D 0) { + /* Access was to Device memory: generate Permission fault */ + fi->type =3D ARMFault_Permission; + fi->s2addr =3D addr; + fi->stage2 =3D true; + fi->s1ptw =3D true; + return ~0; + } addr =3D s2pa; } return addr; --=20 2.19.0