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[97.113.8.179]) by smtp.gmail.com with ESMTPSA id h87-v6sm34707866pfj.78.2018.10.11.13.52.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 11 Oct 2018 13:52:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GCq6GLtd5YYBu/ORSkQACpXqajeyz6Fb7Yy9QHPeNAs=; b=TtR88TN1Z7tGBq4OJS6AXLXAXfxsJLQOkVcD88sd0a5Y544f0kuKchUaFr0LmgFmTJ XP3nfRYF35ixnXXaG1paVUEOPo3kKLNHksqd1wBVJkJ0INgj1/zYkHzjoxL31ii/f5/8 OcaRbSAEAT4r9jH/yt4PQ4oXRrkf/fWNkE23w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GCq6GLtd5YYBu/ORSkQACpXqajeyz6Fb7Yy9QHPeNAs=; b=VH8PvFcapKwLDiDKYNIX2lmos4Kv28I4jP30j+XIGtiA1X73kJjWGQEBQ0JpVwxrUC GLf97XnGVPzvCIohOlQJ4oVUQcEQax4y2ATbGdWep64LEYtXh7dZUTWsFylkOrLyr/F+ SdVCBkMCmHyAWeO8/1cW3F3vXlpWw/f/zeThiGG8EpXtOb8LF9ksSr+dHNq1VFiyTgKv Fs+Bi1N8aW+KsRZ2yB0kYagB/QOTCyy4ja6MZscz7+DE3TnYkI/EscVHopY7M+mj2CgX 6VQdfMBtHGA+TIEa9qaqKs+qwpqAwNQCR9dX6oswUaO4LJHUCL+BfAK9oYWv/ffcT/Af nccw== X-Gm-Message-State: ABuFfogf3ByiqruP+MFfGjKEeeVMyEuynB4E0QL63KgnZ1wugE/0haOB Ykf4nOdlpYIOYp8/3neS07fzw+VhB78= X-Google-Smtp-Source: ACcGV62OQj9v7a+Fl7qdSVHsTD64iZKpG8KCOM+WP6/Ul3aIPzXmjMoKaTDYmHqT87T3xCHh52dUFA== X-Received: by 2002:a17:902:d68e:: with SMTP id v14-v6mr3015205ply.140.1539291130331; Thu, 11 Oct 2018 13:52:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 11 Oct 2018 13:51:47 -0700 Message-Id: <20181011205206.3552-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181011205206.3552-1-richard.henderson@linaro.org> References: <20181011205206.3552-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62e Subject: [Qemu-devel] [PATCH 01/20] target/arm: Hoist address increment for vector memory ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson This can reduce the number of opcodes required for certain complex forms of load-multiple (e.g. ld4.16b). Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index c403b12eb9..76b5ca3606 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -3012,7 +3012,7 @@ static void disas_ldst_multiple_struct(DisasContext *= s, uint32_t insn) bool is_store =3D !extract32(insn, 22, 1); bool is_postidx =3D extract32(insn, 23, 1); bool is_q =3D extract32(insn, 30, 1); - TCGv_i64 tcg_addr, tcg_rn; + TCGv_i64 tcg_addr, tcg_rn, tcg_ebytes; =20 int ebytes =3D 1 << size; int elements =3D (is_q ? 128 : 64) / (8 << size); @@ -3077,6 +3077,7 @@ static void disas_ldst_multiple_struct(DisasContext *= s, uint32_t insn) tcg_rn =3D cpu_reg_sp(s, rn); tcg_addr =3D tcg_temp_new_i64(); tcg_gen_mov_i64(tcg_addr, tcg_rn); + tcg_ebytes =3D tcg_const_i64(ebytes); =20 for (r =3D 0; r < rpt; r++) { int e; @@ -3101,7 +3102,7 @@ static void disas_ldst_multiple_struct(DisasContext *= s, uint32_t insn) clear_vec_high(s, is_q, tt); } } - tcg_gen_addi_i64(tcg_addr, tcg_addr, ebytes); + tcg_gen_add_i64(tcg_addr, tcg_addr, tcg_ebytes); tt =3D (tt + 1) % 32; } } @@ -3115,6 +3116,7 @@ static void disas_ldst_multiple_struct(DisasContext *= s, uint32_t insn) tcg_gen_add_i64(tcg_rn, tcg_rn, cpu_reg(s, rm)); } } + tcg_temp_free_i64(tcg_ebytes); tcg_temp_free_i64(tcg_addr); } =20 @@ -3157,7 +3159,7 @@ static void disas_ldst_single_struct(DisasContext *s,= uint32_t insn) bool replicate =3D false; int index =3D is_q << 3 | S << 2 | size; int ebytes, xs; - TCGv_i64 tcg_addr, tcg_rn; + TCGv_i64 tcg_addr, tcg_rn, tcg_ebytes; =20 switch (scale) { case 3: @@ -3210,6 +3212,7 @@ static void disas_ldst_single_struct(DisasContext *s,= uint32_t insn) tcg_rn =3D cpu_reg_sp(s, rn); tcg_addr =3D tcg_temp_new_i64(); tcg_gen_mov_i64(tcg_addr, tcg_rn); + tcg_ebytes =3D tcg_const_i64(ebytes); =20 for (xs =3D 0; xs < selem; xs++) { if (replicate) { @@ -3252,7 +3255,7 @@ static void disas_ldst_single_struct(DisasContext *s,= uint32_t insn) do_vec_st(s, rt, index, tcg_addr, scale); } } - tcg_gen_addi_i64(tcg_addr, tcg_addr, ebytes); + tcg_gen_add_i64(tcg_addr, tcg_addr, tcg_ebytes); rt =3D (rt + 1) % 32; } =20 @@ -3264,6 +3267,7 @@ static void disas_ldst_single_struct(DisasContext *s,= uint32_t insn) tcg_gen_add_i64(tcg_rn, tcg_rn, cpu_reg(s, rm)); } } + tcg_temp_free_i64(tcg_ebytes); tcg_temp_free_i64(tcg_addr); } =20 --=20 2.17.1