From nobody Sat Feb 7 02:03:40 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538862456985932.4631015818767; Sat, 6 Oct 2018 14:47:36 -0700 (PDT) Received: from localhost ([::1]:40448 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8uQB-00019O-9N for importer@patchew.org; Sat, 06 Oct 2018 17:47:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34473) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8uO8-0000AX-Vj for qemu-devel@nongnu.org; Sat, 06 Oct 2018 17:45:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8uO5-0007FD-O9 for qemu-devel@nongnu.org; Sat, 06 Oct 2018 17:45:28 -0400 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:38521) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8uO2-00075d-0k for qemu-devel@nongnu.org; Sat, 06 Oct 2018 17:45:23 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 2FEFE21F11; Sat, 6 Oct 2018 17:45:15 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Sat, 06 Oct 2018 17:45:15 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id BCEDC102F2; Sat, 6 Oct 2018 17:45:14 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h= from:to:cc:subject:date:message-id:in-reply-to:references; s= mesmtp; bh=eM5Llfn3oUKhKDsDOUosXpHekW7oLxN0QGxyMHVJR+c=; b=R6LHD juODKvT2LYdaj6emUjsQdFSbyQmtzTlbUY6mwg0jnN9zWELB/ymu6TZZN4XprqzR V1RT8Qr5sKF0dSPbdygLmvPkRPYsXXbFR+gxNF8IACu0eDs5pcTkMSUuY07QKJzx wmiMHXsE8p7AfkOXfr+JvmAYACvnKPfJnxUYe0= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-proxy:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; bh=eM5Llfn3oUKhKDsDOUosXpHekW7oL xN0QGxyMHVJR+c=; b=XdP90tw3sat44EQq519tNIRZKRT0m9HeEw+K2i8r8XOIg qCf/8Mr7aE4rHCqDcNObI2fodtRmKmIdsm5Ya1ICMb7a4JE1+7A7bG86XGOfQ9oK mO7ozvDp6tZwlvTYPXoIq7WUZp5zeDE+fuRwCvP9LUBzYStD6COgi2z/zYz0B1qj xHl6dFOvc57D3ipkN8RlQnYJ7KAPIIyycqtO2X/bOws3/hgx5+p6Ybq6+1+lRCsS LMi3TKITBaf9Ch22ykxSdP4twmA2+dpive5v2BzLUSSfw94EKfzy1n7bZDgZ4rhw 0oJT5Ow7Q6Sel2cfUWdj85/GiOdOC/jDHEv3Lq5kQ== X-ME-Sender: X-ME-Proxy: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Sat, 6 Oct 2018 17:45:05 -0400 Message-Id: <20181006214508.5331-4-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181006214508.5331-1-cota@braap.org> References: <20181006214508.5331-1-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.27 Subject: [Qemu-devel] [RFC 3/6] cputlb: track TLB use rates X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Pranith Kumar , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This paves the way for implementing a dynamically-sized softmmu. Signed-off-by: Emilio G. Cota --- include/exec/cpu-defs.h | 1 + accel/tcg/cputlb.c | 17 ++++++++++++++--- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index fa95a4257e..af9fe04b0b 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -144,6 +144,7 @@ typedef struct CPUIOTLBEntry { typedef struct CPUTLBDesc { size_t size; size_t mask; /* (.size - 1) << CPU_TLB_ENTRY_BITS for TLB fast path */ + size_t used; } CPUTLBDesc; =20 #define CPU_COMMON_TLB \ diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 0e2c149d6b..ed19ac0e40 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -84,6 +84,7 @@ void tlb_init(CPUState *cpu) =20 desc->size =3D CPU_TLB_SIZE; desc->mask =3D (desc->size - 1) << CPU_TLB_ENTRY_BITS; + desc->used =3D 0; env->tlb_table[i] =3D g_new(CPUTLBEntry, desc->size); env->iotlb[i] =3D g_new0(CPUIOTLBEntry, desc->size); } @@ -152,6 +153,7 @@ static void tlb_flush_nocheck(CPUState *cpu) for (i =3D 0; i < NB_MMU_MODES; i++) { memset(env->tlb_table[i], -1, env->tlb_desc[i].size * sizeof(CPUTLBEntry)); + env->tlb_desc[i].used =3D 0; } memset(env->tlb_v_table, -1, sizeof(env->tlb_v_table)); qemu_spin_unlock(&env->tlb_lock); @@ -216,6 +218,7 @@ static void tlb_flush_by_mmuidx_async_work(CPUState *cp= u, run_on_cpu_data data) memset(env->tlb_table[mmu_idx], -1, env->tlb_desc[mmu_idx].size * sizeof(CPUTLBEntry)); memset(env->tlb_v_table[mmu_idx], -1, sizeof(env->tlb_v_table[= 0])); + env->tlb_desc[mmu_idx].used =3D 0; } } qemu_spin_unlock(&env->tlb_lock); @@ -276,12 +279,14 @@ static inline bool tlb_hit_page_anyprot(CPUTLBEntry *= tlb_entry, } =20 /* Called with tlb_lock held */ -static inline void tlb_flush_entry_locked(CPUTLBEntry *tlb_entry, +static inline bool tlb_flush_entry_locked(CPUTLBEntry *tlb_entry, target_ulong page) { if (tlb_hit_page_anyprot(tlb_entry, page)) { memset(tlb_entry, -1, sizeof(*tlb_entry)); + return true; } + return false; } =20 /* Called with tlb_lock held */ @@ -321,7 +326,9 @@ static void tlb_flush_page_async_work(CPUState *cpu, ru= n_on_cpu_data data) for (mmu_idx =3D 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { int i =3D (addr >> TARGET_PAGE_BITS) & (env->tlb_desc[mmu_idx].siz= e - 1); =20 - tlb_flush_entry_locked(&env->tlb_table[mmu_idx][i], addr); + if (tlb_flush_entry_locked(&env->tlb_table[mmu_idx][i], addr)) { + env->tlb_desc[mmu_idx].used--; + } tlb_flush_vtlb_page_locked(env, mmu_idx, addr); } qemu_spin_unlock(&env->tlb_lock); @@ -365,7 +372,9 @@ static void tlb_flush_page_by_mmuidx_async_work(CPUStat= e *cpu, =20 page =3D (addr >> TARGET_PAGE_BITS) & (env->tlb_desc[mmu_idx].size= - 1); if (test_bit(mmu_idx, &mmu_idx_bitmap)) { - tlb_flush_entry_locked(&env->tlb_table[mmu_idx][page], addr); + if (tlb_flush_entry_locked(&env->tlb_table[mmu_idx][page], add= r)) { + env->tlb_desc[mmu_idx].used--; + } tlb_flush_vtlb_page_locked(env, mmu_idx, addr); } } @@ -702,6 +711,7 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulon= g vaddr, /* Evict the old entry into the victim tlb. */ copy_tlb_helper_locked(tv, te); env->iotlb_v[mmu_idx][vidx] =3D env->iotlb[mmu_idx][index]; + env->tlb_desc[mmu_idx].used--; } =20 /* refill the tlb */ @@ -753,6 +763,7 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulon= g vaddr, } =20 copy_tlb_helper_locked(te, &tn); + env->tlb_desc[mmu_idx].used++; qemu_spin_unlock(&env->tlb_lock); } =20 --=20 2.17.1