From nobody Thu Nov 6 03:45:07 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538774415122136.01643720714526; Fri, 5 Oct 2018 14:20:15 -0700 (PDT) Received: from localhost ([::1]:36935 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8XW9-0006jR-Tm for importer@patchew.org; Fri, 05 Oct 2018 17:20:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54403) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8XRc-0003gl-6T for qemu-devel@nongnu.org; Fri, 05 Oct 2018 17:15:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8XRR-0000lQ-6e for qemu-devel@nongnu.org; Fri, 05 Oct 2018 17:15:28 -0400 Received: from wout2-smtp.messagingengine.com ([64.147.123.25]:44649) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8XR9-0000b7-Em for qemu-devel@nongnu.org; Fri, 05 Oct 2018 17:15:15 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 1C997C60; Fri, 5 Oct 2018 17:14:58 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Fri, 05 Oct 2018 17:14:58 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 2F925E49FA; Fri, 5 Oct 2018 17:14:57 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=mesmtp; bh=w2xlButVNr8XvoKsWO1Rb5GETMtFag2s9Hsug8YA1dE=; b=DR5ROkiSvc/r R9auxwiuwZN1ssvl7lGDxWNUNuBgG0Zv8uZNRSiKeIL6efbMdxfbp5/RdR5SU93F Qs8A+AYRvtLvS94SNuFJdFMtl1iI6O9fcfgRWr7zzG5Sh1ax4l2EUv3FfE5I/G4u yXtHoFO1azKNG7SKwEucW6RXnuUwZRM= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=w2xlButVNr8XvoKsWO1Rb5GETMtFag2s9Hsug8YA1 dE=; b=bYWdUYKnWyvr67UeBgEGGHL70klsQ3Yvl+IvwsN1w0OcBoYfHy8yaUxpJ crRQteohpdaZwYPTHzPcAT/dOT8w84/w28aoT6kQ1SgGXrEltmCpvJ0TZ7KQWBHf 4ozyI8itppgJ7sJnkqfOCGyL3HeOzX3E3VMW8otQU6iihB0j/cK7Q/HwO2H5MTb8 u7Yht03IP+HVJYgEhXmoZqyR+gzMML4mCv8mF52ytn7+mlzu6YK7ML9yc49DoWN2 KUcVSbKqNuFtMHiYrF9BqVLp7cSznUpr+hkLI/bMkianLdtn9G3/XM9XweSIDO6m f2Mx2ZbTPwiBRC0173IUQ6M8EinSg== X-ME-Sender: X-ME-Proxy: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:14:47 -0400 Message-Id: <20181005211450.847-2-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181005211450.847-1-cota@braap.org> References: <20181005211450.847-1-cota@braap.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 64.147.123.25 Subject: [Qemu-devel] [PATCH v3 1/4] exec: introduce tlb_init X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Paves the way for the addition of a per-TLB lock. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Emilio G. Cota --- include/exec/exec-all.h | 8 ++++++++ accel/tcg/cputlb.c | 4 ++++ exec.c | 1 + 3 files changed, 13 insertions(+) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5f78125582..815e5b1e83 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -99,6 +99,11 @@ void cpu_address_space_init(CPUState *cpu, int asidx, =20 #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* cputlb.c */ +/** + * tlb_init - initialize a CPU's TLB + * @cpu: CPU whose TLB should be initialized + */ +void tlb_init(CPUState *cpu); /** * tlb_flush_page: * @cpu: CPU whose TLB should be flushed @@ -258,6 +263,9 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr, void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_i= dx, uintptr_t retaddr); #else +static inline void tlb_init(CPUState *cpu) +{ +} static inline void tlb_flush_page(CPUState *cpu, target_ulong addr) { } diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index f4702ce91f..502eea2850 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -73,6 +73,10 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on_c= pu_data)); QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16); #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1) =20 +void tlb_init(CPUState *cpu) +{ +} + /* flush_all_helper: run fn across all cpus * * If the wait flag is set then the src cpu's helper will be queued as diff --git a/exec.c b/exec.c index d0821e69aa..4fd831ef06 100644 --- a/exec.c +++ b/exec.c @@ -965,6 +965,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) tcg_target_initialized =3D true; cc->tcg_initialize(); } + tlb_init(cpu); =20 #ifndef CONFIG_USER_ONLY if (qdev_get_vmsd(DEVICE(cpu)) =3D=3D NULL) { --=20 2.17.1