From nobody Fri Nov 7 13:01:38 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538763749637912.0522833795173; Fri, 5 Oct 2018 11:22:29 -0700 (PDT) Received: from localhost ([::1]:36497 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Uk1-00044X-Eb for importer@patchew.org; Fri, 05 Oct 2018 14:22:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38629) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8UQg-0000Ww-Kb for qemu-devel@nongnu.org; Fri, 05 Oct 2018 14:02:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8UQe-0004zE-53 for qemu-devel@nongnu.org; Fri, 05 Oct 2018 14:02:22 -0400 Received: from mail-oi1-x242.google.com ([2607:f8b0:4864:20::242]:44313) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g8UQd-0004qk-Ot for qemu-devel@nongnu.org; Fri, 05 Oct 2018 14:02:19 -0400 Received: by mail-oi1-x242.google.com with SMTP id u74-v6so11073086oia.11 for ; Fri, 05 Oct 2018 11:02:19 -0700 (PDT) Received: from cloudburst.twiddle.net ([187.217.230.84]) by smtp.gmail.com with ESMTPSA id d37-v6sm2601302otb.0.2018.10.05.11.02.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 05 Oct 2018 11:02:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MiYu2qxs2TIckutvBEbRpqLjWZytY+tnsLPRmBRwkMs=; b=JBQSauyqkxppjxVmfbo7j+LZgi/zJ3N7wXVYcPQYEGxix4kz3JI9qf6C5KneW3dyiN zZAKTeTqwbiHLyuZWy2oXUMzJ80wb8+ekzOXakeL7AKznrIStlKJuwfdVm0ld2ICrViG dXiZw/vWWFqdEdqVayfDP4e8QbTJCabWtopes= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MiYu2qxs2TIckutvBEbRpqLjWZytY+tnsLPRmBRwkMs=; b=D/nYQAyUFjVo5MJbBgwMw6DkoHP0Pto3dE2YZn/5A2/iDilY5dlQnphb6HH8hFS9Xb swDraKtW0oqkCeHT89bCTwu4Gwf2NN4rGixll5UDV4/t74QbbR8/Rkfj4cJjLFsx56nu RbvDcTgM4gXTWPjjzO13gRWROPNbo4tE8AaYD0DArzBWpH2g73XRkbxJ4HdK9PqS/h5V PzR5otBwso5cgYaYnzqKi693AX2+arUSpLdc/QWfI36p4FEPXRslmz9bRbDZD+dDTqwB +ttnDzlT3Ujs3k4NVV30wINA4MXU8GWzV2pKQkG3KSP2ulHZsnqoU10Yk7L150uI2/id iaaA== X-Gm-Message-State: ABuFfojbHWJUu29jAompkcX4j5CfzQCSnEYhNJp2YDq8k+pWCrxIPW/p DUriQ2kaK9nJFvq3YiOUpTGaGkGsKJWWs+ZMUqI= X-Google-Smtp-Source: ACcGV63a5I6t+faioAOkHfIg0jsu3Dq9dYyd1ZqDwa7Z0/Cdk2eZZZA1kw2zagtBykrdPbve+TdhOg== X-Received: by 2002:aca:f512:: with SMTP id t18-v6mr34715oih.244.1538762538473; Fri, 05 Oct 2018 11:02:18 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 13:02:00 -0500 Message-Id: <20181005180201.11387-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181005180201.11387-1-richard.henderson@linaro.org> References: <20181005180201.11387-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::242 Subject: [Qemu-devel] [PULL 7/8] softfloat: Specialize udiv_qrnnd for s390x X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The ISA has a 128/64-bit division instruction. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index 39eb08b4f1..eafc68932b 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -641,6 +641,12 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_= t n1, uint64_t q; asm("divq %4" : "=3Da"(q), "=3Dd"(*r) : "0"(n0), "1"(n1), "rm"(d)); return q; +#elif defined(__s390x__) + /* Need to use a TImode type to get an even register pair for DLGR. */ + unsigned __int128 n =3D (unsigned __int128)n1 << 64 | n0; + asm("dlgr %0, %1" : "+r"(n) : "r"(d)); + *r =3D n >> 64; + return n; #else uint64_t d0, d1, q0, q1, r1, r0, m; =20 --=20 2.17.1