From nobody Sun Apr 28 00:50:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538675931046241.95312718677167; Thu, 4 Oct 2018 10:58:51 -0700 (PDT) Received: from localhost ([::1]:58104 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87tZ-0006ql-3s for importer@patchew.org; Thu, 04 Oct 2018 13:58:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60992) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87s7-00069U-Vs for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g87s3-0005hG-JT for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:11 -0400 Received: from mail-ot1-x333.google.com ([2607:f8b0:4864:20::333]:43881) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g87s3-0005g0-CO for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:07 -0400 Received: by mail-ot1-x333.google.com with SMTP id e21-v6so10059508otk.10 for ; Thu, 04 Oct 2018 10:57:07 -0700 (PDT) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id f84-v6sm1830649oia.44.2018.10.04.10.57.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 04 Oct 2018 10:57:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eoQfmeIbqQYNxqFOPaK1rddW7v/35ufvgMSTkPh3uTI=; b=DUQrFhX3vA8iB5oP8MZ5MWYhqtMWPbny+UoK0JAAxd1qAbrLaZTC4DNxytvxRg8nXn mof7MKArrvm1oUsnp71XP5OIHRWQykDEaxaWph5jjZg6EEjCCsTS45FWNBJI43/UX2Cp p36XlSsJu6fgtUDgdzVioKlyO/i94Qr2iiugI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eoQfmeIbqQYNxqFOPaK1rddW7v/35ufvgMSTkPh3uTI=; b=knlLzn802FA603qIHX8eK6B7aLW5sfGVvalQuoQzQ4P8jF9rGwZYZc5XEy/dFdDJru 0ZHaI7cgu3DnJ7OjtPf/8k8fQZ7U47/bVhGlqFJ0FhT5EHP38hHZEVgo0FEHYjw3AEcP a0eualiZPE8Go/5lPLnJXn08mllYtYLK+kR85nRSiY3pf764qrSImgQkVuaZjmBac73x /ZbBahCE/t0qsxUzdHlnvJg9bGVbVEPRJjz0K4+IL6ZKyK92qcEXb/YCqvNKgl/QNRRi 3zm/vA8Wsr2ITy+APi3i2+xzLqhrHMy/pWm+X6nzcc7uH7BzQfM6ZQdsgUG9D1iCLktu zKaQ== X-Gm-Message-State: ABuFfohw30OwGMZNMNpCsX6GvT8v2HNZDAzv4A9N6O2Xy51HDmrqqBF4 +j8TwmOfuzz01SW9QxXFCkIIDb3asoE3iQ== X-Google-Smtp-Source: ACcGV60x9tPm/yFcqdOeM01ESI3y4WrHZKU5Zv2bn4ig7qObXLZfvehqNs1sHCKpqELwuCZk6qeVkA== X-Received: by 2002:a9d:76d:: with SMTP id 100mr4486917ote.153.1538675825753; Thu, 04 Oct 2018 10:57:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 4 Oct 2018 12:56:57 -0500 Message-Id: <20181004175700.20847-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181004175700.20847-1-richard.henderson@linaro.org> References: <20181004175700.20847-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::333 Subject: [Qemu-devel] [PATCH v3 1/4] softfloat: Fix division X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 The __udiv_qrnnd primitive that we nicked from gmp requires its inputs to be normalized. We were not doing that. Because the inputs are nearly normalized already, finishing that is trivial. Replace div128to64 with a "proper" udiv_qrnnd, so that this remains a reusable primitive. Fixes: cf07323d494 Fixes: https://bugs.launchpad.net/qemu/+bug/1793119 Tested-by: Emilio G. Cota Tested-by: Alex Benn=C3=A9e Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 34 ++++++++++++++++++++++++--------- fpu/softfloat.c | 35 ++++++++++++++++++++++++++-------- 2 files changed, 52 insertions(+), 17 deletions(-) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index edc682139e..a1d99c730d 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -329,15 +329,30 @@ static inline void | pieces which are stored at the locations pointed to by `z0Ptr' and `z1Pt= r'. *-------------------------------------------------------------------------= ---*/ =20 -static inline void - shortShift128Left( - uint64_t a0, uint64_t a1, int count, uint64_t *z0Ptr, uint64_t *z1Ptr) +static inline void shortShift128Left(uint64_t a0, uint64_t a1, int count, + uint64_t *z0Ptr, uint64_t *z1Ptr) { + *z1Ptr =3D a1 << count; + *z0Ptr =3D count =3D=3D 0 ? a0 : (a0 << count) | (a1 >> (-count & 63)); +} =20 - *z1Ptr =3D a1<>( ( - count ) & 63= ) ); +/*------------------------------------------------------------------------= ---- +| Shifts the 128-bit value formed by concatenating `a0' and `a1' left by t= he +| number of bits given in `count'. Any bits shifted off are lost. The va= lue +| of `count' may be greater than 64. The result is broken into two 64-bit +| pieces which are stored at the locations pointed to by `z0Ptr' and `z1Pt= r'. +*-------------------------------------------------------------------------= ---*/ =20 +static inline void shift128Left(uint64_t a0, uint64_t a1, int count, + uint64_t *z0Ptr, uint64_t *z1Ptr) +{ + if (count < 64) { + *z1Ptr =3D a1 << count; + *z0Ptr =3D count =3D=3D 0 ? a0 : (a0 << count) | (a1 >> (-count & = 63)); + } else { + *z1Ptr =3D 0; + *z0Ptr =3D a1 << (count - 64); + } } =20 /*------------------------------------------------------------------------= ---- @@ -619,7 +634,8 @@ static inline uint64_t estimateDiv128To64(uint64_t a0, = uint64_t a1, uint64_t b) * * Licensed under the GPLv2/LGPLv3 */ -static inline uint64_t div128To64(uint64_t n0, uint64_t n1, uint64_t d) +static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1, + uint64_t n0, uint64_t d) { uint64_t d0, d1, q0, q1, r1, r0, m; =20 @@ -658,8 +674,8 @@ static inline uint64_t div128To64(uint64_t n0, uint64_t= n1, uint64_t d) } r0 -=3D m; =20 - /* Return remainder in LSB */ - return (q1 << 32) | q0 | (r0 !=3D 0); + *r =3D r0; + return (q1 << 32) | q0; } =20 /*------------------------------------------------------------------------= ---- diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 71da0f68bb..46ae206172 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1112,19 +1112,38 @@ static FloatParts div_floats(FloatParts a, FloatPar= ts b, float_status *s) bool sign =3D a.sign ^ b.sign; =20 if (a.cls =3D=3D float_class_normal && b.cls =3D=3D float_class_normal= ) { - uint64_t temp_lo, temp_hi; + uint64_t n0, n1, q, r; int exp =3D a.exp - b.exp; + + /* + * We want a 2*N / N-bit division to produce exactly an N-bit + * result, so that we do not lose any precision and so that we + * do not have to renormalize afterward. If A.frac < B.frac, + * then division would produce an (N-1)-bit result; shift A left + * by one to produce the an N-bit result, and decrement the + * exponent to match. + * + * The udiv_qrnnd algorithm that we're using requires normalizatio= n, + * i.e. the msb of the denominator must be set. Since we know that + * DECOMPOSED_BINARY_POINT is msb-1, the inputs must be shifted le= ft + * by one (more), and the remainder must be shifted right by one. + */ if (a.frac < b.frac) { exp -=3D 1; - shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT + 1, - &temp_hi, &temp_lo); + shift128Left(0, a.frac, DECOMPOSED_BINARY_POINT + 2, &n1, &n0); } else { - shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT, - &temp_hi, &temp_lo); + shift128Left(0, a.frac, DECOMPOSED_BINARY_POINT + 1, &n1, &n0); } - /* LSB of quot is set if inexact which roundandpack will use - * to set flags. Yet again we re-use a for the result */ - a.frac =3D div128To64(temp_lo, temp_hi, b.frac); + q =3D udiv_qrnnd(&r, n1, n0, b.frac << 1); + + /* + * Set lsb if there is a remainder, to set inexact. + * As mentioned above, to find the actual value of the remainder we + * would need to shift right, but (1) we are only concerned about + * non-zero-ness, and (2) the remainder will always be even because + * both inputs to the division primitive are even. + */ + a.frac =3D q | (r !=3D 0); a.sign =3D sign; a.exp =3D exp; return a; --=20 2.17.1 From nobody Sun Apr 28 00:50:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15386759547801020.6944360121097; Thu, 4 Oct 2018 10:59:14 -0700 (PDT) Received: from localhost ([::1]:58106 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87u1-0007CV-ML for importer@patchew.org; Thu, 04 Oct 2018 13:59:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32770) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87sH-0006Ds-AF for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g87s5-0005k9-H9 for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:14 -0400 Received: from mail-ot1-x342.google.com ([2607:f8b0:4864:20::342]:35385) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g87s5-0005jo-BR for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:09 -0400 Received: by mail-ot1-x342.google.com with SMTP id j9-v6so10076093otl.2 for ; Thu, 04 Oct 2018 10:57:09 -0700 (PDT) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id f84-v6sm1830649oia.44.2018.10.04.10.57.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 04 Oct 2018 10:57:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cRmMqmBeH6CVVhBpy5pb3rhG/pnTWg+KHZ8CbvTFIJs=; b=Usei+u1kVhG9z7LczWDkV/ZhoRu/ZrCa9oB+TqBKad10fDzmv8vTbw7K6VOEUApeM5 XeV5pzH05KX+g5WPrmKIbKpxH6baJ6VJVrNz8IsODYXfDHrb5HLyBQ/+jLmY1uXfKqv7 gLcQPuSSy1i7dAPYWhmKLZPq97R9cwpxdXSDc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cRmMqmBeH6CVVhBpy5pb3rhG/pnTWg+KHZ8CbvTFIJs=; b=cVkLaBG1ICR12fD4IIB7WaQ1DLzVpHdR5t1S1F3jvSzFkKsLzlJpcb1ldT0MluJNtk NzKiCVpxDjeapoSxWa5k/lCOykQErXtaB6EpEELqxneUWjRscbwUjFyZAhIbTmuUCuZ1 zFYaNT6p7evWSPGHwrFF6ZjVvduYo07W4r81WdXnVdwT+jRNGBp1fcpjWcis1tCiO4Nk UHdBK/N1y24CplC9OTVlg1KGlFaLjXBf3mdl2cw0pntDnrR3b+fdZaqiZQBOIWPr0MfX AzAvD2feb7879O5iIvc0q9Rmm0I26ozt9f24+gYgpKwCxlxxvUeT7vEjb2CmDOiDzfIs JiLQ== X-Gm-Message-State: ABuFfogaEmbXkk8T0FFTAJ2Ccm4sSY2gijDoBBNz0K7nOVtz6mZMnoD9 LjhRGLFbdXx+rIy1AtDCT6iCFcE32PoGaA== X-Google-Smtp-Source: ACcGV61h8bilaEWE0jlWJiRqCEdfHrMeefbtE3uNaghfP/I2h32qwWHt8GL57hvcxCFQxAxgYbe0fQ== X-Received: by 2002:a9d:764d:: with SMTP id o13-v6mr4055227otl.116.1538675828083; Thu, 04 Oct 2018 10:57:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 4 Oct 2018 12:56:58 -0500 Message-Id: <20181004175700.20847-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181004175700.20847-1-richard.henderson@linaro.org> References: <20181004175700.20847-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::342 Subject: [Qemu-devel] [PATCH v3 2/4] softfloat: Specialize udiv_qrnnd for x86_64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 The ISA has a 128/64-bit division instruction. Tested-by: Emilio G. Cota Tested-by: Alex Benn=C3=A9e Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- include/fpu/softfloat-macros.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index a1d99c730d..39eb08b4f1 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -637,6 +637,11 @@ static inline uint64_t estimateDiv128To64(uint64_t a0,= uint64_t a1, uint64_t b) static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1, uint64_t n0, uint64_t d) { +#if defined(__x86_64__) + uint64_t q; + asm("divq %4" : "=3Da"(q), "=3Dd"(*r) : "0"(n0), "1"(n1), "rm"(d)); + return q; +#else uint64_t d0, d1, q0, q1, r1, r0, m; =20 d0 =3D (uint32_t)d; @@ -676,6 +681,7 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t= n1, =20 *r =3D r0; return (q1 << 32) | q0; +#endif } =20 /*------------------------------------------------------------------------= ---- --=20 2.17.1 From nobody Sun Apr 28 00:50:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538676076422820.7241525593907; Thu, 4 Oct 2018 11:01:16 -0700 (PDT) Received: from localhost ([::1]:58119 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87w3-0000UI-Ck for importer@patchew.org; Thu, 04 Oct 2018 14:01:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32774) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87sH-0006Du-BT for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g87s7-0005le-9d for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:17 -0400 Received: from mail-ot1-x342.google.com ([2607:f8b0:4864:20::342]:36017) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g87s6-0005kf-P0 for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:10 -0400 Received: by mail-ot1-x342.google.com with SMTP id c18-v6so10085890otm.3 for ; Thu, 04 Oct 2018 10:57:10 -0700 (PDT) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id f84-v6sm1830649oia.44.2018.10.04.10.57.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 04 Oct 2018 10:57:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xKPvW5IjWZu4Fj5tr9JMUkuXW0J49HylPrXBi7VJgeY=; b=IbfK+tzHzKB8j1kIu/vo26T8zGw1fVMwsDBbSsLTwsEYQstb5PWXxEeaRszc/E4ioo 0LWZgVY3o2mZiZBCj853aKMhZdL4ThwWZv9AJyAJT1p+zuWhODAylvSJENL3GZ1CzYpM Pwl6mJvxgfmdXaT44oa3nPqq0S7LqP/Vm8JS8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xKPvW5IjWZu4Fj5tr9JMUkuXW0J49HylPrXBi7VJgeY=; b=mTo4dRsvM9TB9wFebhC5DktTTFP7BrSnBLo5bVggRctCV2wDx5SRmVgl6BxaQ5KjeY BX2dWzUYEKlS2SM4M0kVtNqSN+aiu/GfOM2cfwEEaRpSwej7x9Vwk/k4uSRxa1p1ftTA 6iZVy/IkFLo6laTpLoVSbFWncOWE32IzB7+BgHToLsPrS1SJO5ZRwAcApNAE+gUDIxz+ cdGXmDinOHEpvBUZ79sLcAab+p2id+c6qC2ALpzHW46QnMUh8BsHelsPz1M5QHkyzvKy VIU+/IDKvQqmyheBvpAPqCibEzO5szI7gOsQqbYz8D4p49ZldYzugQZh9viDYNA+Rd3v bgKA== X-Gm-Message-State: ABuFfohPtaJ9WLEoqZwH766BVaauYPPxb6fj5xtT4cSi/nH7HigLwKyB PVHkpeIgh3zLSHsx9q5B15JGYYEME/iTLA== X-Google-Smtp-Source: ACcGV63xse8jxHPqDLNVkjIsiSZ9vFZtVyGSRCM2h+bCMfFZ9oNFYSFV0Ft8ybAGkvOEFOCXkIq1Dw== X-Received: by 2002:a9d:5148:: with SMTP id u8mr4103456oti.5.1538675829712; Thu, 04 Oct 2018 10:57:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 4 Oct 2018 12:56:59 -0500 Message-Id: <20181004175700.20847-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181004175700.20847-1-richard.henderson@linaro.org> References: <20181004175700.20847-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::342 Subject: [Qemu-devel] [PATCH v3 3/4] softfloat: Specialize udiv_qrnnd for s390x X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The ISA has a 128/64-bit division instruction. Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e --- include/fpu/softfloat-macros.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index 39eb08b4f1..eafc68932b 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -641,6 +641,12 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_= t n1, uint64_t q; asm("divq %4" : "=3Da"(q), "=3Dd"(*r) : "0"(n0), "1"(n1), "rm"(d)); return q; +#elif defined(__s390x__) + /* Need to use a TImode type to get an even register pair for DLGR. */ + unsigned __int128 n =3D (unsigned __int128)n1 << 64 | n0; + asm("dlgr %0, %1" : "+r"(n) : "r"(d)); + *r =3D n >> 64; + return n; #else uint64_t d0, d1, q0, q1, r1, r0, m; =20 --=20 2.17.1 From nobody Sun Apr 28 00:50:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538675954755347.63550962581996; Thu, 4 Oct 2018 10:59:14 -0700 (PDT) Received: from localhost ([::1]:58105 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87u2-0007C3-I8 for importer@patchew.org; Thu, 04 Oct 2018 13:59:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32814) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g87sM-0006Fu-JT for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g87sK-0005vW-ME for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:26 -0400 Received: from mail-oi1-x243.google.com ([2607:f8b0:4864:20::243]:35170) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g87sK-0005mq-4h for qemu-devel@nongnu.org; Thu, 04 Oct 2018 13:57:24 -0400 Received: by mail-oi1-x243.google.com with SMTP id 22-v6so7235216oiz.2 for ; Thu, 04 Oct 2018 10:57:12 -0700 (PDT) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id f84-v6sm1830649oia.44.2018.10.04.10.57.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 04 Oct 2018 10:57:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=X5a/KvnsV8gRrymCZvMRPaAHMUoAfW8yBsI+pfK7k9k=; b=AftpCVuLuCR6waok4+StaLcsUa1LkEegQzSliCJW8cvAhx9uGc+ABVd7vMV0z2Vo0t QMyuyZ1jFnenT8/IK602xwtntQxTue+LywO8U0b7AxUkUHlNFdOmNRaIdO8YCIfC23Sq rSqXq0IV8yVhCTiDLTue0stWFWir5ep5Ssekg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=X5a/KvnsV8gRrymCZvMRPaAHMUoAfW8yBsI+pfK7k9k=; b=OdTGQUC9/s0RXT5+iZE4VCV7sJOxqkdRbRgnmy98KlE8+VSrowyD0tTnoT0uGd2nA5 rG4gKTztMmMetQaPxUshqZ+XarJl2V8ezGLoKPlrVbfh3rkf5DryJoFB3D+8CiS023mM ccQRIqfxMfMJ/Z596i3i6D9PQfLZ4KKdmIKMe0mxzWb8j21zVVp69egaAdihQB/njBIM 0Su8EIZSKRNj0L1zDE1tIjhRaTA81us+DLPzfdhsvLNPt8mA0fs8+ON+OmKo2QxDfSUV +RKJgBgmQis8v4PB4JdkjBDMSk70+r7SFu5b2lw3nwJ1ug0lfJqYu1T2PUaaW2WFxbTW 1SEQ== X-Gm-Message-State: ABuFfojEReF1eUlcP6ybqupodwFgtLSIBHXGvAUm9QMz9B0aCzZgw+pR dfzubJzp5e0M3Zi6YaiSh2G0Qiz8bQGhMw== X-Google-Smtp-Source: ACcGV61itWQ8oKmZUaxthqe5FqjUT0S6R5ehBPi0ruepyNMC+qxRzDtRfgPt2idyEKeE2gbk18rUdw== X-Received: by 2002:aca:ce4c:: with SMTP id e73-v6mr3373560oig.225.1538675831284; Thu, 04 Oct 2018 10:57:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 4 Oct 2018 12:57:00 -0500 Message-Id: <20181004175700.20847-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181004175700.20847-1-richard.henderson@linaro.org> References: <20181004175700.20847-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::243 Subject: [Qemu-devel] [PATCH v3 4/4] softfloat: Specialize udiv_qrnnd for ppc64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The ISA has a 128/64-bit division instruction, though it assumes the low 64-bits of the numerator are 0, and so requires a bit more fixup than a full 128-bit division insn. Reviewed-by: David Gibson Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e --- include/fpu/softfloat-macros.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index eafc68932b..c86687fa5e 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -647,6 +647,22 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_= t n1, asm("dlgr %0, %1" : "+r"(n) : "r"(d)); *r =3D n >> 64; return n; +#elif defined(_ARCH_PPC64) + /* From Power ISA 3.0B, programming note for divdeu. */ + uint64_t q1, q2, Q, r1, r2, R; + asm("divdeu %0,%2,%4; divdu %1,%3,%4" + : "=3D&r"(q1), "=3Dr"(q2) + : "r"(n1), "r"(n0), "r"(d)); + r1 =3D -(q1 * d); /* low part of (n1<<64) - (q1 * d) */ + r2 =3D n0 - (q2 * d); + Q =3D q1 + q2; + R =3D r1 + r2; + if (R >=3D d || R < r2) { /* overflow implies R > d */ + Q +=3D 1; + R -=3D d; + } + *r =3D R; + return Q; #else uint64_t d0, d1, q0, q1, r1, r0, m; =20 --=20 2.17.1