From nobody Tue Feb 10 11:16:07 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538590168219653.7641877798515; Wed, 3 Oct 2018 11:09:28 -0700 (PDT) Received: from localhost ([::1]:51667 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g7laL-0003dy-TL for importer@patchew.org; Wed, 03 Oct 2018 14:09:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55415) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g7lYg-0002fA-2I for qemu-devel@nongnu.org; Wed, 03 Oct 2018 14:07:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g7lYc-0005Dp-DZ for qemu-devel@nongnu.org; Wed, 03 Oct 2018 14:07:37 -0400 Received: from mail-oi1-x241.google.com ([2607:f8b0:4864:20::241]:35532) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g7lYc-0004Hk-4W for qemu-devel@nongnu.org; Wed, 03 Oct 2018 14:07:34 -0400 Received: by mail-oi1-x241.google.com with SMTP id 22-v6so4321398oiz.2 for ; Wed, 03 Oct 2018 11:07:23 -0700 (PDT) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id f84-v6sm677709oia.44.2018.10.03.11.07.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Oct 2018 11:07:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7Fy5hUYquxIH5oDgQGI4lfGc1AXghgu5Y0CJkuKRgJg=; b=ER3wpn9lv816JVXNK/qG3q+RNGJsKn/JEI5vPs3xmGl6jnZNBhjOXK1d2QZQvx9vK9 3pthf/wolmzRhLUbUzquxJf/W7AcnftmQK9EpClEWDOCyeXp+xVA2vL4iqCC6pkABQpo WYokLlFx6YFCnUBBys5rFlPQ9DNGhJZOkWSQk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7Fy5hUYquxIH5oDgQGI4lfGc1AXghgu5Y0CJkuKRgJg=; b=cCxaSoJpcJ/zAGyn1lcRg+PRGei6wQZTs1d/AdMdYazRLgSmoTgxhMrKUSPVETPyRk dnCwkibkqcAvX7xeHYQL21cKAP6stt/yyKEHLdzhxrMxqZW01J93y45tUhD82uHv6Sri b0BhCak9QdRMhuJ741Um2WxtW9fPnP/4QERx6k1b7v1NPlasqjWGgQlnbPeiT6vW7yHD VW1+WJ4Cal/IRc8g6G9xs0GKU43WjFYzOeYlk28tTUW2KUrnlWyPA+kRikt4YneKbAcW b6hCsWj4i1oww6INhqI4o5/ApaU5dN8oSgEIB6naEgAKG3RZ5l/OXDVanu9kd6KW0r94 OFgg== X-Gm-Message-State: ABuFfojs4FEpX4oqUU+U9/oHlMvLUitouwD6nDV2qk5ysCdP8FvzsWsv jZazhjGL/NNH7mYtT/Kgk3NiodfvoGGyBA== X-Google-Smtp-Source: ACcGV610X0lf+fgGaI3XOTjEBFzh5emLFFt8VEDNsBX55HJQhBOAbgXUExCTqfPojtyeL3ePqOA0zQ== X-Received: by 2002:aca:da46:: with SMTP id r67-v6mr1224976oig.47.1538590042794; Wed, 03 Oct 2018 11:07:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 3 Oct 2018 13:07:11 -0500 Message-Id: <20181003180711.19335-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181003180711.19335-1-richard.henderson@linaro.org> References: <20181003180711.19335-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::241 Subject: [Qemu-devel] [PATCH v2 4/4] softfloat: Specialize udiv_qrnnd for ppc64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, cota@braap.org, alex.bennee@linaro.org, Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The ISA has a 128/64-bit division instruction, though it assumes the low 64-bits of the numerator are 0, and so requires a bit more fixup than a full 128-bit division insn. Cc: qemu-ppc@nongnu.org Cc: Alexander Graf Cc: David Gibson Signed-off-by: Richard Henderson Reviewed-by: David Gibson --- include/fpu/softfloat-macros.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index e702607b43..001bf4f23c 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -632,6 +632,22 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_= t n1, asm("dlgr %0, %1" : "+r"(n) : "r"(d)); *r =3D n >> 64; return n; +#elif defined(_ARCH_PPC64) + /* From Power ISA 3.0B, programming note for divdeu. */ + uint64_t q1, q2, Q, r1, r2, R; + asm("divdeu %0,%2,%4; divdu %1,%3,%4" + : "=3D&r"(q1), "=3Dr"(q2) + : "r"(n1), "r"(n0), "r"(d)); + r1 =3D -(q1 * d); /* low part of (n1<<64) - (q1 * d) */ + r2 =3D n0 - (q2 * d); + Q =3D q1 + q2; + R =3D r2 + r1; + if (R < r2 || R >=3D d) { /* overflow implies R > d */ + Q +=3D 1; + R -=3D d; + } + *r =3D R; + return Q; #else uint64_t d0, d1, q0, q1, r1, r0, m; =20 --=20 2.17.1