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From: Peter Maydell <peter.maydell@linaro.org>
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Subject: [Qemu-devel] [PULL 20/21] aspeed/smc: fix some alignment issues
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From: C=C3=A9dric Le Goater <clg@kaod.org>
Signed-off-by: C=C3=A9dric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
Message-id: 20180921161939.822-6-clg@kaod.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/ssi/aspeed_smc.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index b29bfd3124a..1270842dcf0 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -388,8 +388,8 @@ static uint64_t aspeed_smc_flash_default_read(void *opa=
que, hwaddr addr,
static void aspeed_smc_flash_default_write(void *opaque, hwaddr addr,
uint64_t data, unsigned size)
{
- qemu_log_mask(LOG_GUEST_ERROR, "%s: To 0x%" HWADDR_PRIx " of size %u: 0=
x%"
- PRIx64 "\n", __func__, addr, size, data);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: To 0x%" HWADDR_PRIx " of size %u: =
0x%"
+ PRIx64 "\n", __func__, addr, size, data);
}
=20
static const MemoryRegionOps aspeed_smc_flash_default_ops =3D {
@@ -529,7 +529,7 @@ static void aspeed_smc_flash_setup(AspeedSMCFlash *fl, =
uint32_t addr)
*/
if (aspeed_smc_flash_mode(fl) =3D=3D CTRL_FREADMODE) {
for (i =3D 0; i < aspeed_smc_flash_dummies(fl); i++) {
- ssi_transfer(fl->controller->spi, 0xFF);
+ ssi_transfer(fl->controller->spi, 0xFF);
}
}
}
@@ -567,7 +567,7 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwa=
ddr addr, unsigned size)
}
=20
static void aspeed_smc_flash_write(void *opaque, hwaddr addr, uint64_t dat=
a,
- unsigned size)
+ unsigned size)
{
AspeedSMCFlash *fl =3D opaque;
AspeedSMCState *s =3D fl->controller;
--=20
2.19.0