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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Date: Tue, 25 Sep 2018 14:41:34 +0100
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Subject: [Qemu-devel] [PULL 11/21] hw/arm/smmuv3: fix eventq recording and
IRQ triggerring
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From: Eric Auger <eric.auger@redhat.com>
The event queue management is broken today. Event records
are not properly written as EVT_SET_* macro was not updating
the actual event record. Also the event queue interrupt
is not correctly triggered.
Fixes: bb981004eaf4 ("hw/arm/smmuv3: Event queue recording helper")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20180921070138.10114-3-eric.auger@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/smmuv3-internal.h | 26 +++++++++++++-------------
hw/arm/smmuv3.c | 2 +-
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h
index bab25d640eb..19540f8f411 100644
--- a/hw/arm/smmuv3-internal.h
+++ b/hw/arm/smmuv3-internal.h
@@ -442,17 +442,17 @@ typedef struct SMMUEventInfo {
=20
#define EVT_Q_OVERFLOW (1 << 31)
=20
-#define EVT_SET_TYPE(x, v) deposit32((x)->word[0], 0 , 8 , v)
-#define EVT_SET_SSV(x, v) deposit32((x)->word[0], 11, 1 , v)
-#define EVT_SET_SSID(x, v) deposit32((x)->word[0], 12, 20, v)
-#define EVT_SET_SID(x, v) ((x)->word[1] =3D v)
-#define EVT_SET_STAG(x, v) deposit32((x)->word[2], 0 , 16, v)
-#define EVT_SET_STALL(x, v) deposit32((x)->word[2], 31, 1 , v)
-#define EVT_SET_PNU(x, v) deposit32((x)->word[3], 1 , 1 , v)
-#define EVT_SET_IND(x, v) deposit32((x)->word[3], 2 , 1 , v)
-#define EVT_SET_RNW(x, v) deposit32((x)->word[3], 3 , 1 , v)
-#define EVT_SET_S2(x, v) deposit32((x)->word[3], 7 , 1 , v)
-#define EVT_SET_CLASS(x, v) deposit32((x)->word[3], 8 , 2 , v)
+#define EVT_SET_TYPE(x, v) ((x)->word[0] =3D deposit32((x)->word[0], 0 , =
8 , v))
+#define EVT_SET_SSV(x, v) ((x)->word[0] =3D deposit32((x)->word[0], 11, =
1 , v))
+#define EVT_SET_SSID(x, v) ((x)->word[0] =3D deposit32((x)->word[0], 12, =
20, v))
+#define EVT_SET_SID(x, v) ((x)->word[1] =3D v)
+#define EVT_SET_STAG(x, v) ((x)->word[2] =3D deposit32((x)->word[2], 0 , =
16, v))
+#define EVT_SET_STALL(x, v) ((x)->word[2] =3D deposit32((x)->word[2], 31, =
1 , v))
+#define EVT_SET_PNU(x, v) ((x)->word[3] =3D deposit32((x)->word[3], 1 , =
1 , v))
+#define EVT_SET_IND(x, v) ((x)->word[3] =3D deposit32((x)->word[3], 2 , =
1 , v))
+#define EVT_SET_RNW(x, v) ((x)->word[3] =3D deposit32((x)->word[3], 3 , =
1 , v))
+#define EVT_SET_S2(x, v) ((x)->word[3] =3D deposit32((x)->word[3], 7 , =
1 , v))
+#define EVT_SET_CLASS(x, v) ((x)->word[3] =3D deposit32((x)->word[3], 8 , =
2 , v))
#define EVT_SET_ADDR(x, addr) \
do { \
(x)->word[5] =3D (uint32_t)(addr >> 32); \
@@ -460,8 +460,8 @@ typedef struct SMMUEventInfo {
} while (0)
#define EVT_SET_ADDR2(x, addr) \
do { \
- deposit32((x)->word[7], 3, 29, addr >> 16); \
- deposit32((x)->word[7], 0, 16, addr & 0xffff);\
+ (x)->word[7] =3D deposit32((x)->word[7], 3, 29, addr >> 16); =
\
+ (x)->word[7] =3D deposit32((x)->word[7], 0, 16, addr & 0xffff)=
;\
} while (0)
=20
void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *event);
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index bb6a24e9b84..8c4e99fecc6 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -136,7 +136,7 @@ static MemTxResult smmuv3_write_eventq(SMMUv3State *s, =
Evt *evt)
return r;
}
=20
- if (smmuv3_q_empty(q)) {
+ if (!smmuv3_q_empty(q)) {
smmuv3_trigger_irq(s, SMMU_IRQ_EVTQ, 0);
}
return MEMTX_OK;
--=20
2.19.0