From nobody Wed Nov 5 22:43:05 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1537859082149457.6804163377168; Tue, 25 Sep 2018 00:04:42 -0700 (PDT) Received: from localhost ([::1]:51252 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g4hOZ-0008N9-Sp for importer@patchew.org; Tue, 25 Sep 2018 03:04:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45938) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g4hMH-0006tz-KY for qemu-devel@nongnu.org; Tue, 25 Sep 2018 03:02:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g4hMG-0006Ow-GZ for qemu-devel@nongnu.org; Tue, 25 Sep 2018 03:02:09 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:44453) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g4hMF-0006NI-QG; Tue, 25 Sep 2018 03:02:08 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 42KBp03C0Mz9sCT; Tue, 25 Sep 2018 17:01:59 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1537858920; bh=p5SonEGZC0wqZecHvi+cukFT4KXuZBncTGlK8eI5/1o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KFzOnffqr1pqAWHHvVyjM6B2DOICpjZRDBOY3S58NPWdRaKqCMEuyWx57BLY9L+p6 P5ALqLD9/PFVsROc7ZZYRagZj2SX1qRnllfy5jNYicHHGkkHNutCEVo/jYhxUxUcis ebLnxHXqPP2PE1ThESeC1WEzxj6jKfPs6CVGRd48= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 25 Sep 2018 17:01:45 +1000 Message-Id: <20180925070154.5812-6-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180925070154.5812-1-david@gibson.dropbear.id.au> References: <20180925070154.5812-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 05/14] 40p: use OR gate to wire up raven PCI interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.cave-ayland@ilande.co.uk, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Mark Cave-Ayland According to the PReP specification section 6.1.6 "System Interrupt Assignments", all PCI interrupts are routed via IRQ 15. Instead of mapping each PCI IRQ separately, we introduce an OR gate within = the raven PCI host bridge and then wire the single output of the OR gate to the interrupt controller. Note that whilst the (now deprecated) PReP machine still exists we still ne= ed to preserve the old IRQ routing. This is done by adding a new "is-legacy-pr= ep" property to the raven PCI host bridge which is set to true for the PReP machine. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Herv=C3=A9 Poussineau Tested-by: Herv=C3=A9 Poussineau Signed-off-by: David Gibson --- hw/pci-host/prep.c | 25 +++++++++++++++++++++++-- hw/ppc/prep.c | 4 +--- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 9b36f19c97..b1b6b16bad 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -32,6 +32,7 @@ #include "hw/pci/pci_host.h" #include "hw/i386/pc.h" #include "hw/loader.h" +#include "hw/or-irq.h" #include "exec/address-spaces.h" #include "elf.h" =20 @@ -55,6 +56,7 @@ typedef struct RavenPCIState { typedef struct PRePPCIState { PCIHostState parent_obj; =20 + qemu_or_irq *or_irq; qemu_irq pci_irqs[PCI_NUM_PINS]; PCIBus pci_bus; AddressSpace pci_io_as; @@ -69,6 +71,7 @@ typedef struct PRePPCIState { RavenPCIState pci_dev; =20 int contiguous_map; + bool is_legacy_prep; } PREPPCIState; =20 #define BIOS_SIZE (1 * MiB) @@ -222,8 +225,23 @@ static void raven_pcihost_realizefn(DeviceState *d, Er= ror **errp) MemoryRegion *address_space_mem =3D get_system_memory(); int i; =20 - for (i =3D 0; i < PCI_NUM_PINS; i++) { - sysbus_init_irq(dev, &s->pci_irqs[i]); + if (s->is_legacy_prep) { + for (i =3D 0; i < PCI_NUM_PINS; i++) { + sysbus_init_irq(dev, &s->pci_irqs[i]); + } + } else { + /* According to PReP specification section 6.1.6 "System Interrupt + * Assignments", all PCI interrupts are routed via IRQ 15 */ + s->or_irq =3D OR_IRQ(object_new(TYPE_OR_IRQ)); + object_property_set_int(OBJECT(s->or_irq), PCI_NUM_PINS, "num-line= s", + &error_fatal); + object_property_set_bool(OBJECT(s->or_irq), true, "realized", + &error_fatal); + sysbus_init_irq(dev, &s->or_irq->out_irq); + + for (i =3D 0; i < PCI_NUM_PINS; i++) { + s->pci_irqs[i] =3D qdev_get_gpio_in(DEVICE(s->or_irq), i); + } } =20 qdev_init_gpio_in(d, raven_change_gpio, 1); @@ -382,6 +400,9 @@ static Property raven_pcihost_properties[] =3D { DEFINE_PROP_UINT32("elf-machine", PREPPCIState, pci_dev.elf_machine, EM_NONE), DEFINE_PROP_STRING("bios-name", PREPPCIState, pci_dev.bios_name), + /* Temporary workaround until legacy prep machine is removed */ + DEFINE_PROP_BOOL("is-legacy-prep", PREPPCIState, is_legacy_prep, + false), DEFINE_PROP_END_OF_LIST() }; =20 diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index baca1d7c04..4bb831c3e6 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -502,6 +502,7 @@ static void ppc_prep_init(MachineState *machine) } qdev_prop_set_string(dev, "bios-name", bios_name); qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE); + qdev_prop_set_bit(dev, "is-legacy-prep", true); pcihost =3D PCI_HOST_BRIDGE(dev); object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev), NU= LL); qdev_init_nofail(dev); @@ -669,9 +670,6 @@ static void ibm_40p_init(MachineState *machine) qdev_connect_gpio_out(dev, 0, cpu->env.irq_inputs[PPC6xx_INPUT_INT]); sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15)); - sysbus_connect_irq(pcihost, 1, qdev_get_gpio_in(dev, 13)); - sysbus_connect_irq(pcihost, 2, qdev_get_gpio_in(dev, 15)); - sysbus_connect_irq(pcihost, 3, qdev_get_gpio_in(dev, 13)); isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); =20 /* Memory controller */ --=20 2.17.1