From nobody Wed Nov 5 20:16:08 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1537202581114753.1884697218356; Mon, 17 Sep 2018 09:43:01 -0700 (PDT) Received: from localhost ([::1]:36497 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1wbz-0007QY-Ru for importer@patchew.org; Mon, 17 Sep 2018 12:42:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40944) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1wQh-0006IS-Mr for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g1wQg-0001zO-AT for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:19 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:52667) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g1wQb-0001r3-Bf; Mon, 17 Sep 2018 12:31:13 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 1E43121C24; Mon, 17 Sep 2018 12:31:13 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Mon, 17 Sep 2018 12:31:13 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 84AC2E49C7; Mon, 17 Sep 2018 12:31:12 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=Ut/+pHtOZtdCXd OQp4BVjkn7ndqIM1yGLNjjk5kK6wE=; b=V9xJKZ+KIRZ2qhbEe8Z35JXNwS70bf ihMynnnPvtNn4mMDE/WzldoLF1+si747gYnSNuWcrn3ulRVLLM5wk8H/D8og8CMc JNw98COFXRVWiaDYdmcAGHkSFozrH1BSdCaMzB2s/rcDzAnxJyyhf4lEgkf5YM/f tv4TpuZvqhaVI= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=Ut/+pHtOZtdCXdOQp4BVjkn7ndqIM1yGLNjjk5kK6wE=; b=blCjPF1q pbW5cP9HSa1oAanCd19N/U3YRVSlGC3w8Nxoe5VaujABETrxwd9gw0zpgmJkq47M D0EW5cT4TJSANefVqsZFL/7yDp4sa/iGFAD6oX1GZIKt61Hcpf8P0dhxKfhkX7S2 6xCZDrLM0/2IRiSfRPmkwBsU/KiZsPibWv8kICa4ZswHXFv2DQ2PItXV6ZO5ruom HG5Hez/8/B5z/VF9bCFNvMN0x3Tw7uhMG/9vw0tGfM6qGJWghIZWTR8kDVdvzh2H A9+f/mbsNCTNm47a19uBGwXIOTtEnZdHehpUsouWt8fi2HqjHaXPHnUWIi3W4OA2 GZP184DyfDk01A== X-ME-Proxy: X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Mon, 17 Sep 2018 12:31:02 -0400 Message-Id: <20180917163103.6113-35-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180917163103.6113-1-cota@braap.org> References: <20180917163103.6113-1-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.25 Subject: [Qemu-devel] [PATCH 34/35] exec: push BQL down to cpu->do_interrupt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Cornelia Huck , kvm@vger.kernel.org, David Hildenbrand , James Hogan , Anthony Green , Mark Cave-Ayland , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Alexander Graf , Christian Borntraeger , Richard Henderson , Artyom Tarasenko , Eduardo Habkost , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Stafford Horne , David Gibson , Chris Wulff , Peter Crosthwaite , Marcelo Tosatti , Laurent Vivier , Michael Walle , qemu-ppc@nongnu.org, Aleksandar Markovic , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini cpu->do_interrupt can now be called with BQL held (from cpu->cpu_exec_interrupt) or without (from cpu_handle_exception). Only a few targets rely on global device state in cc->do_interrupt; add checks to those targets to acquire the BQL if not already held. Cc: Aleksandar Markovic Cc: Alexander Graf Cc: Anthony Green Cc: Artyom Tarasenko Cc: Aurelien Jarno Cc: Christian Borntraeger Cc: Chris Wulff Cc: Cornelia Huck Cc: David Gibson Cc: David Hildenbrand Cc: "Edgar E. Iglesias" Cc: Eduardo Habkost Cc: Guan Xuetao Cc: James Hogan Cc: kvm@vger.kernel.org Cc: Laurent Vivier Cc: Marcelo Tosatti Cc: Marek Vasut Cc: Mark Cave-Ayland Cc: Michael Walle Cc: Peter Crosthwaite Cc: Peter Maydell Cc: qemu-arm@nongnu.org Cc: qemu-ppc@nongnu.org Cc: qemu-s390x@nongnu.org Cc: Richard Henderson Cc: Stafford Horne Signed-off-by: Paolo Bonzini Signed-off-by: Emilio G. Cota --- accel/tcg/cpu-exec.c | 2 -- target/arm/helper.c | 28 ++++++++++++++++++++++++++-- target/ppc/excp_helper.c | 8 +++++++- target/s390x/excp_helper.c | 14 +++++++++++++- target/sh4/helper.c | 14 +++++++++++++- target/xtensa/helper.c | 16 ++++++++++++++-- 6 files changed, 73 insertions(+), 9 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 2383763f9b..b649e3d772 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -497,9 +497,7 @@ static inline bool cpu_handle_exception(CPUState *cpu, = int *ret) #else if (replay_exception()) { CPUClass *cc =3D CPU_GET_CLASS(cpu); - qemu_mutex_lock_iothread(); cc->do_interrupt(cpu); - qemu_mutex_unlock_iothread(); cpu->exception_index =3D -1; } else if (!replay_has_interrupt()) { /* give a chance to iothread in replay mode */ diff --git a/target/arm/helper.c b/target/arm/helper.c index 22dbc42305..548278da14 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7644,7 +7644,8 @@ gen_invep: return false; } =20 -void arm_v7m_cpu_do_interrupt(CPUState *cs) +/* call with the BQL held */ +static void arm_v7m_cpu_do_interrupt_locked(CPUState *cs) { ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; @@ -7828,6 +7829,17 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) v7m_exception_taken(cpu, lr, false, ignore_stackfaults); } =20 +void arm_v7m_cpu_do_interrupt(CPUState *cs) +{ + if (qemu_mutex_iothread_locked()) { + arm_v7m_cpu_do_interrupt_locked(cs); + } else { + qemu_mutex_lock_iothread(); + arm_v7m_cpu_do_interrupt_locked(cs); + qemu_mutex_unlock_iothread(); + } +} + /* Function used to synchronize QEMU's AArch64 register set with AArch32 * register set. This is necessary when switching between AArch32 and AAr= ch64 * execution state. @@ -8482,8 +8494,9 @@ static inline bool check_for_semihosting(CPUState *cs) * Do any appropriate logging, handle PSCI calls, and then hand off * to the AArch64-entry or AArch32-entry function depending on the * target exception level's register width. + * Call with the BQL held. */ -void arm_cpu_do_interrupt(CPUState *cs) +static void arm_cpu_do_interrupt_locked(CPUState *cs) { ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; @@ -8534,6 +8547,17 @@ void arm_cpu_do_interrupt(CPUState *cs) } } =20 +void arm_cpu_do_interrupt(CPUState *cs) +{ + if (qemu_mutex_iothread_locked()) { + arm_cpu_do_interrupt_locked(cs); + } else { + qemu_mutex_lock_iothread(); + arm_cpu_do_interrupt_locked(cs); + qemu_mutex_unlock_iothread(); + } +} + /* Return the exception level which controls this address translation regi= me */ static inline uint32_t regime_el(CPUARMState *env, ARMMMUIdx mmu_idx) { diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 70ac10e23b..8b2cc48cad 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -742,7 +742,13 @@ void ppc_cpu_do_interrupt(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 - powerpc_excp(cpu, env->excp_model, cs->exception_index); + if (qemu_mutex_iothread_locked()) { + powerpc_excp(cpu, env->excp_model, cs->exception_index); + } else { + qemu_mutex_lock_iothread(); + powerpc_excp(cpu, env->excp_model, cs->exception_index); + qemu_mutex_unlock_iothread(); + } } =20 static void ppc_hw_interrupt(CPUPPCState *env) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index f2b92d7cbc..931c0103c8 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -378,7 +378,8 @@ static void do_mchk_interrupt(CPUS390XState *env) load_psw(env, mask, addr); } =20 -void s390_cpu_do_interrupt(CPUState *cs) +/* call with the BQL held */ +static void s390_cpu_do_interrupt_locked(CPUState *cs) { QEMUS390FLICState *flic =3D QEMU_S390_FLIC(s390_get_flic()); S390CPU *cpu =3D S390_CPU(cs); @@ -457,6 +458,17 @@ try_deliver: } } =20 +void s390_cpu_do_interrupt(CPUState *cs) +{ + if (qemu_mutex_iothread_locked()) { + s390_cpu_do_interrupt_locked(cs); + } else { + qemu_mutex_lock_iothread(); + s390_cpu_do_interrupt_locked(cs); + qemu_mutex_unlock_iothread(); + } +} + bool s390_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { if (interrupt_request & CPU_INTERRUPT_HARD) { diff --git a/target/sh4/helper.c b/target/sh4/helper.c index c699b8c0a1..6c508cd006 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -79,7 +79,8 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong add= r) #define MMU_DADDR_ERROR_READ (-12) #define MMU_DADDR_ERROR_WRITE (-13) =20 -void superh_cpu_do_interrupt(CPUState *cs) +/* call with the BQL held */ +static void superh_cpu_do_interrupt_locked(CPUState *cs) { SuperHCPU *cpu =3D SUPERH_CPU(cs); CPUSH4State *env =3D &cpu->env; @@ -211,6 +212,17 @@ void superh_cpu_do_interrupt(CPUState *cs) } } =20 +void superh_cpu_do_interrupt(CPUState *cs) +{ + if (qemu_mutex_iothread_locked()) { + superh_cpu_do_interrupt_locked(cs); + } else { + qemu_mutex_lock_iothread(); + superh_cpu_do_interrupt_locked(cs); + qemu_mutex_unlock_iothread(); + } +} + static void update_itlb_use(CPUSH4State * env, int itlbnb) { uint8_t or_mask =3D 0, and_mask =3D (uint8_t) - 1; diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index c9a6132700..ecafecdd3f 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -26,6 +26,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "qemu/units.h" #include "cpu.h" #include "exec/exec-all.h" @@ -251,8 +252,8 @@ static void handle_interrupt(CPUXtensaState *env) } } =20 -/* Called from cpu_handle_interrupt with BQL held */ -void xtensa_cpu_do_interrupt(CPUState *cs) +/* Call with the BQL held */ +static void xtensa_cpu_do_interrupt_locked(CPUState *cs) { XtensaCPU *cpu =3D XTENSA_CPU(cs); CPUXtensaState *env =3D &cpu->env; @@ -305,6 +306,17 @@ void xtensa_cpu_do_interrupt(CPUState *cs) } check_interrupts(env); } + +void xtensa_cpu_do_interrupt(CPUState *cs) +{ + if (qemu_mutex_iothread_locked()) { + xtensa_cpu_do_interrupt_locked(cs); + } else { + qemu_mutex_lock_iothread(); + xtensa_cpu_do_interrupt_locked(cs); + qemu_mutex_unlock_iothread(); + } +} #else void xtensa_cpu_do_interrupt(CPUState *cs) { --=20 2.17.1