From nobody Wed Nov 5 20:11:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1537202559330577.4050302345258; Mon, 17 Sep 2018 09:42:39 -0700 (PDT) Received: from localhost ([::1]:36496 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1wbe-00077E-2f for importer@patchew.org; Mon, 17 Sep 2018 12:42:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40783) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1wQd-0006Ez-MQ for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g1wQZ-0001o0-Bp for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:15 -0400 Received: from wout2-smtp.messagingengine.com ([64.147.123.25]:43007) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g1wQY-0001co-Vr for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:11 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id C2E334F2; Mon, 17 Sep 2018 12:31:05 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Mon, 17 Sep 2018 12:31:06 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id CE6A6E49F7; Mon, 17 Sep 2018 12:31:04 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=+SROB5hA3rG0AL pBnKGk3p/NpJhQ4MAgB/1olZhg/Qw=; b=wVxVMWWu0pbv/zWssSsHB5Q9v35CX4 VnkEGkaW5ZPASmRDiYTV9Py3NJyy2FZXadTN62GZKOhXJ6ASAhzrT5oiYejQmBUN fKQU/HzxQGfLbnKlqjfnhPc/GFLNcmx0LKmXYpqvYgPGf4tAnpBlEbiGu9g9G6lF OK18xMhZzdwsQ= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=+SROB5hA3rG0ALpBnKGk3p/NpJhQ4MAgB/1olZhg/Qw=; b=FTtIUp5Q UYdOE2Hjj+P18zWdwe801dNpeuj7SqKJUE7eRzyCZkPq4RXXhK+zMgLBQ7CDg/hB 94i62mjezc4Fn3VxjtkXsatmMNHcarvyDMgLdqFLjszRHtVF4d+X4UiRsqDUKCgY xp503qmMr6xCYzvip3kUVF5wi2z98jb/ms4EYAO4+b39jKp9BZrYhtcYPyvj0KOY NnN4825F9uMyzhS/YII8mS6GkZFVGKZXoDMtyhOdKAozvWHmMlR20ioRaLOosWiU X45FmzK/ogdAce6pq4nGgr9iXdai6mzNHDzS/sOovxoGOv75NnCrabGA2tRXk1CW Bd19uTg8Ji5w1Q== X-ME-Proxy: X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Mon, 17 Sep 2018 12:30:30 -0400 Message-Id: <20180917163103.6113-3-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180917163103.6113-1-cota@braap.org> References: <20180917163103.6113-1-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 64.147.123.25 Subject: [Qemu-devel] [PATCH 02/35] target/i386: use cpu_reset_interrupt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Marcelo Tosatti , Eduardo Habkost , kvm@vger.kernel.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini It will be changed to an atomic operation soon. Cc: Richard Henderson Cc: Eduardo Habkost Cc: Marcelo Tosatti Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson --- target/i386/hax-all.c | 4 ++-- target/i386/hvf/x86hvf.c | 8 ++++---- target/i386/kvm.c | 14 +++++++------- target/i386/seg_helper.c | 13 ++++++------- target/i386/svm_helper.c | 2 +- target/i386/whpx-all.c | 10 +++++----- 6 files changed, 25 insertions(+), 26 deletions(-) diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index d2e512856b..ae8b678db0 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -433,7 +433,7 @@ static int hax_vcpu_interrupt(CPUArchState *env) irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { hax_inject_interrupt(env, irq); - cpu->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); } } =20 @@ -483,7 +483,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) cpu->halted =3D 0; =20 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } =20 diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index 6c88939b96..3ac796b885 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -402,7 +402,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) =20 if (cpu_state->interrupt_request & CPU_INTERRUPT_NMI) { if (!(env->hflags2 & HF2_NMI_MASK) && !(info & VMCS_INTR_VALID)) { - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_NMI); info =3D VMCS_INTR_VALID | VMCS_INTR_T_NMI | NMI_VEC; wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); } else { @@ -414,7 +414,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) (cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && (EFLAGS(env) & IF_MASK) && !(info & VMCS_INTR_VALID)) { int line =3D cpu_get_pic_interrupt(&x86cpu->env); - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_HARD); if (line >=3D 0) { wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, line | VMCS_INTR_VALID | VMCS_INTR_T_HWINTR); @@ -440,7 +440,7 @@ int hvf_process_events(CPUState *cpu_state) } =20 if (cpu_state->interrupt_request & CPU_INTERRUPT_POLL) { - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } if (((cpu_state->interrupt_request & CPU_INTERRUPT_HARD) && @@ -453,7 +453,7 @@ int hvf_process_events(CPUState *cpu_state) do_cpu_sipi(cpu); } if (cpu_state->interrupt_request & CPU_INTERRUPT_TPR) { - cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cpu_state, CPU_INTERRUPT_TPR); hvf_cpu_synchronize_state(cpu_state); apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 0b2a07d3a4..5dd66809b0 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -2709,7 +2709,7 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) */ events.smi.pending =3D cs->interrupt_request & CPU_INTERRUPT_S= MI; events.smi.latched_init =3D cs->interrupt_request & CPU_INTERR= UPT_INIT; - cs->interrupt_request &=3D ~(CPU_INTERRUPT_INIT | CPU_INTERRUP= T_SMI); + cpu_reset_interrupt(cs, CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI= ); } else { /* Keep these in cs->interrupt_request. */ events.smi.pending =3D 0; @@ -3005,7 +3005,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { qemu_mutex_lock_iothread(); - cpu->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); qemu_mutex_unlock_iothread(); DPRINTF("injected NMI\n"); ret =3D kvm_vcpu_ioctl(cpu, KVM_NMI); @@ -3016,7 +3016,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) } if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { qemu_mutex_lock_iothread(); - cpu->interrupt_request &=3D ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); qemu_mutex_unlock_iothread(); DPRINTF("injected SMI\n"); ret =3D kvm_vcpu_ioctl(cpu, KVM_SMI); @@ -3052,7 +3052,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *= run) (env->eflags & IF_MASK)) { int irq; =20 - cpu->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { struct kvm_interrupt intr; @@ -3123,7 +3123,7 @@ int kvm_arch_process_async_events(CPUState *cs) /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */ assert(env->mcg_cap); =20 - cs->interrupt_request &=3D ~CPU_INTERRUPT_MCE; + cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE); =20 kvm_cpu_synchronize_state(cs); =20 @@ -3153,7 +3153,7 @@ int kvm_arch_process_async_events(CPUState *cs) } =20 if (cs->interrupt_request & CPU_INTERRUPT_POLL) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } if (((cs->interrupt_request & CPU_INTERRUPT_HARD) && @@ -3166,7 +3166,7 @@ int kvm_arch_process_async_events(CPUState *cs) do_cpu_sipi(cpu); } if (cs->interrupt_request & CPU_INTERRUPT_TPR) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cs, CPU_INTERRUPT_TPR); kvm_cpu_synchronize_state(cs); apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c index d1cbc6ebf0..0dd85329db 100644 --- a/target/i386/seg_helper.c +++ b/target/i386/seg_helper.c @@ -1323,7 +1323,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) =20 #if !defined(CONFIG_USER_ONLY) if (interrupt_request & CPU_INTERRUPT_POLL) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); /* Don't process multiple interrupt requests in a single call. This is required to make icount-driven execution deterministic.= */ @@ -1337,18 +1337,18 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int inter= rupt_request) if ((interrupt_request & CPU_INTERRUPT_SMI) && !(env->hflags & HF_SMM_MASK)) { cpu_svm_check_intercept_param(env, SVM_EXIT_SMI, 0, 0); - cs->interrupt_request &=3D ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cs, CPU_INTERRUPT_SMI); do_smm_enter(cpu); ret =3D true; } else if ((interrupt_request & CPU_INTERRUPT_NMI) && !(env->hflags2 & HF2_NMI_MASK)) { cpu_svm_check_intercept_param(env, SVM_EXIT_NMI, 0, 0); - cs->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cs, CPU_INTERRUPT_NMI); env->hflags2 |=3D HF2_NMI_MASK; do_interrupt_x86_hardirq(env, EXCP02_NMI, 1); ret =3D true; } else if (interrupt_request & CPU_INTERRUPT_MCE) { - cs->interrupt_request &=3D ~CPU_INTERRUPT_MCE; + cpu_reset_interrupt(cs, CPU_INTERRUPT_MCE); do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0); ret =3D true; } else if ((interrupt_request & CPU_INTERRUPT_HARD) && @@ -1359,8 +1359,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) !(env->hflags & HF_INHIBIT_IRQ_MASK))))) { int intno; cpu_svm_check_intercept_param(env, SVM_EXIT_INTR, 0, 0); - cs->interrupt_request &=3D ~(CPU_INTERRUPT_HARD | - CPU_INTERRUPT_VIRQ); + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIR= Q); intno =3D cpu_get_pic_interrupt(env); qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=3D0x%02x\n", intno); @@ -1380,7 +1379,7 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=3D0x%02x\n", int= no); do_interrupt_x86_hardirq(env, intno, 1); - cs->interrupt_request &=3D ~CPU_INTERRUPT_VIRQ; + cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); ret =3D true; #endif } diff --git a/target/i386/svm_helper.c b/target/i386/svm_helper.c index 342ece082f..c532639574 100644 --- a/target/i386/svm_helper.c +++ b/target/i386/svm_helper.c @@ -700,7 +700,7 @@ void do_vmexit(CPUX86State *env, uint32_t exit_code, ui= nt64_t exit_info_1) env->hflags &=3D ~HF_SVMI_MASK; env->intercept =3D 0; env->intercept_exceptions =3D 0; - cs->interrupt_request &=3D ~CPU_INTERRUPT_VIRQ; + cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ); env->tsc_offset =3D 0; =20 env->gdt.base =3D x86_ldq_phys(cs, env->vm_hsave + offsetof(struct vm= cb, diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index 57e53e1f1f..d9428dc987 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -728,14 +728,14 @@ static void whpx_vcpu_pre_run(CPUState *cpu) if (!vcpu->interruption_pending && cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_NMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); vcpu->interruptable =3D false; new_int.InterruptionType =3D WHvX64PendingNmi; new_int.InterruptionPending =3D 1; new_int.InterruptionVector =3D 2; } if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_SMI; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); } } =20 @@ -758,7 +758,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) vcpu->interruptable && (env->eflags & IF_MASK)) { assert(!new_int.InterruptionPending); if (cpu->interrupt_request & CPU_INTERRUPT_HARD) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_HARD; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); irq =3D cpu_get_pic_interrupt(env); if (irq >=3D 0) { new_int.InterruptionType =3D WHvX64PendingInterrupt; @@ -850,7 +850,7 @@ static void whpx_vcpu_process_async_events(CPUState *cp= u) } =20 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_POLL; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); apic_poll_irq(x86_cpu->apic_state); } =20 @@ -868,7 +868,7 @@ static void whpx_vcpu_process_async_events(CPUState *cp= u) } =20 if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { - cpu->interrupt_request &=3D ~CPU_INTERRUPT_TPR; + cpu_reset_interrupt(cpu, CPU_INTERRUPT_TPR); if (!cpu->vcpu_dirty) { whpx_get_registers(cpu); } --=20 2.17.1