From nobody Wed Nov 5 20:13:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 153720294970684.32368607031162; Mon, 17 Sep 2018 09:49:09 -0700 (PDT) Received: from localhost ([::1]:36532 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1whw-0004Xc-I9 for importer@patchew.org; Mon, 17 Sep 2018 12:49:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41115) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1wQo-0006QM-Mv for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g1wQk-00027Y-Hf for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:26 -0400 Received: from wout2-smtp.messagingengine.com ([64.147.123.25]:43819) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g1wQk-0001oX-7M for qemu-devel@nongnu.org; Mon, 17 Sep 2018 12:31:22 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 9CE4053E; Mon, 17 Sep 2018 12:31:08 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Mon, 17 Sep 2018 12:31:08 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id E9921E4A40; Mon, 17 Sep 2018 12:31:07 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=w0cy4hsmapcYhH VY/b1z1GFmpJYFu9QioiFUQ5LbyGI=; b=hgypLKhjO8E/Z48msNGB/bZv+oyDZV GrorE1T/o3x047GgHnUlyWdRklrZLXFf+bmXn94NwrW4u7j812uauZH0zJio2t6v IHQTDegwxBLhWcETXmD5Jwi7lAJAcaLlA8fd3t4QVzCGQM7gK+oN6WdizOTGMXtr YaWpoVP9wb31s= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=w0cy4hsmapcYhHVY/b1z1GFmpJYFu9QioiFUQ5LbyGI=; b=QWzbp8iz cty3Esw/ytF81iPst76qFMv6+LVCDUmtFrWyb+UHoCkkd9yXE7akDLbVxzEJ5uay qc070GJySXFFy2vsE0UEx5fUoVH/AWZQSCYzQoEF5G77X0gtGFPV0vFnmI4VkaHx KQcmNiFx7XlxVm2G/RjVUhitCE3/Tb5/95GY+fobI91Mw1IjpQqlJkP4J/W4QxQx bP9sCbxtRZGkMvSVbnNte2Jal7RnT6rBrp/ubM1zk5OnsTpunz5Pq1OeloHWAdcB dpmAj4h7rO8HxsT76tETrzJ5bYRxWOEFKw0/sYO9da0UfNyek5LxbdwYFZhOHaP+ NLfB8htU3KpR8w== X-ME-Proxy: X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Mon, 17 Sep 2018 12:30:43 -0400 Message-Id: <20180917163103.6113-16-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180917163103.6113-1-cota@braap.org> References: <20180917163103.6113-1-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 64.147.123.25 Subject: [Qemu-devel] [PATCH 15/35] target/lm32: access cpu->interrupt_request with atomics X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Michael Walle Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini Cc: Michael Walle Signed-off-by: Paolo Bonzini Signed-off-by: Emilio G. Cota --- target/lm32/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index b7499cb627..6c0178e1ea 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -101,7 +101,7 @@ static void lm32_cpu_init_cfg_reg(LM32CPU *cpu) =20 static bool lm32_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & CPU_INTERRUPT_HARD; + return atomic_read(&cs->interrupt_request) & CPU_INTERRUPT_HARD; } =20 /* CPUClass::reset() */ --=20 2.17.1