From nobody Wed Nov 5 18:21:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1536645471330352.8924989603345; Mon, 10 Sep 2018 22:57:51 -0700 (PDT) Received: from localhost ([::1]:55572 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fzbgM-0000Jq-0B for importer@patchew.org; Tue, 11 Sep 2018 01:57:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58058) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fzbe5-0006Xi-LX for qemu-devel@nongnu.org; Tue, 11 Sep 2018 01:55:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fzbe0-0002dT-Q3 for qemu-devel@nongnu.org; Tue, 11 Sep 2018 01:55:29 -0400 Received: from 5.mo178.mail-out.ovh.net ([46.105.51.53]:33283) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fzbe0-0002bZ-JX for qemu-devel@nongnu.org; Tue, 11 Sep 2018 01:55:24 -0400 Received: from player750.ha.ovh.net (unknown [10.109.143.201]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id 7598D2C8E5 for ; Tue, 11 Sep 2018 07:55:23 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10605-110.w90-89.abo.wanadoo.fr [90.89.196.110]) (Authenticated sender: clg@kaod.org) by player750.ha.ovh.net (Postfix) with ESMTPSA id 37934180099; Tue, 11 Sep 2018 07:55:18 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Tue, 11 Sep 2018 07:55:02 +0200 Message-Id: <20180911055503.2303-2-clg@kaod.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180911055503.2303-1-clg@kaod.org> References: <20180911055503.2303-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 6398207698667146214 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtjedrjedugddutdduucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 46.105.51.53 Subject: [Qemu-devel] [PATCH v2 1/2] spapr: introduce a spapr_irq class 'nr_msis' attribute X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The number of MSI interrupts a sPAPR machine can allocate is in direct relation with the number of interrupts of the sPAPRIrq backend. Define statically this value at the sPAPRIrq class level and use it for the "ibm,pe-total-#msi" property of the sPAPR PHB. According to the PAPR specs, "ibm,pe-total-#msi" defines the maximum number of MSIs that are available to the PE. We choose to advertise the maximum number of MSIs that are available to the machine for simplicity of the model and to avoid segmenting the MSI interrupt pool which can be easily shared. If the pool limit is reached, it can be extended dynamically. Finally, remove XICS_IRQS_SPAPR which is now unused. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- include/hw/ppc/spapr_irq.h | 1 + include/hw/ppc/xics.h | 2 -- hw/ppc/spapr_irq.c | 9 +++++++-- hw/ppc/spapr_pci.c | 5 +++-- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index 0e98c4474bb2..650f810ad2aa 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -31,6 +31,7 @@ void spapr_irq_msi_reset(sPAPRMachineState *spapr); =20 typedef struct sPAPRIrq { uint32_t nr_irqs; + uint32_t nr_msis; =20 void (*init)(sPAPRMachineState *spapr, Error **errp); int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp= ); diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 9c2916c9b23a..9958443d1984 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -181,8 +181,6 @@ typedef struct XICSFabricClass { ICPState *(*icp_get)(XICSFabric *xi, int server); } XICSFabricClass; =20 -#define XICS_IRQS_SPAPR 1024 - void spapr_dt_xics(int nr_servers, void *fdt, uint32_t phandle); =20 ICPState *xics_icp_get(XICSFabric *xi, int server); diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 0cbb5dd39368..fe8be5f5217a 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -99,7 +99,7 @@ static void spapr_irq_init_xics(sPAPRMachineState *spapr,= Error **errp) =20 /* Initialize the MSI IRQ allocator. */ if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { - spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI); + spapr_irq_msi_init(spapr, smc->irq->nr_msis); } =20 if (kvm_enabled()) { @@ -195,8 +195,13 @@ static void spapr_irq_print_info_xics(sPAPRMachineStat= e *spapr, Monitor *mon) ics_pic_print_info(spapr->ics, mon); } =20 +#define SPAPR_IRQ_XICS_NR_IRQS 0x400 +#define SPAPR_IRQ_XICS_NR_MSIS \ + (XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI) + sPAPRIrq spapr_irq_xics =3D { - .nr_irqs =3D XICS_IRQS_SPAPR, + .nr_irqs =3D SPAPR_IRQ_XICS_NR_IRQS, + .nr_msis =3D SPAPR_IRQ_XICS_NR_MSIS, =20 .init =3D spapr_irq_init_xics, .claim =3D spapr_irq_claim_xics, diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 6bcb4f419b6b..bb736177e76c 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2121,6 +2121,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, sPAPRTCETable *tcet; PCIBus *bus =3D PCI_HOST_BRIDGE(phb)->bus; sPAPRFDT s_fdt; + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(qdev_get_machine()); =20 /* Start populating the FDT */ nodename =3D g_strdup_printf("pci@%" PRIx64, phb->buid); @@ -2138,8 +2139,8 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, _FDT(fdt_setprop(fdt, bus_off, "ranges", &ranges, sizeof_ranges)); _FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg))); _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1)); - /* TODO: fine tune the total count of allocatable MSIs per PHB */ - _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", XICS_IRQS_SPA= PR)); + _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", + smc->irq->nr_msis)); =20 /* Dynamic DMA window */ if (phb->ddw_enabled) { --=20 2.17.1 From nobody Wed Nov 5 18:21:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1536645546785321.1071623541833; Mon, 10 Sep 2018 22:59:06 -0700 (PDT) Received: from localhost ([::1]:55576 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fzbhZ-0001Wd-NX for importer@patchew.org; Tue, 11 Sep 2018 01:59:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58117) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fzbeB-0006dg-Cp for qemu-devel@nongnu.org; Tue, 11 Sep 2018 01:55:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fzbe6-0002iC-GP for qemu-devel@nongnu.org; Tue, 11 Sep 2018 01:55:35 -0400 Received: from 7.mo69.mail-out.ovh.net ([46.105.50.32]:40233) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fzbe6-0002h5-97 for qemu-devel@nongnu.org; Tue, 11 Sep 2018 01:55:30 -0400 Received: from player750.ha.ovh.net (unknown [10.109.143.3]) by mo69.mail-out.ovh.net (Postfix) with ESMTP id AE0DA23947 for ; Tue, 11 Sep 2018 07:55:28 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10605-110.w90-89.abo.wanadoo.fr [90.89.196.110]) (Authenticated sender: clg@kaod.org) by player750.ha.ovh.net (Postfix) with ESMTPSA id 6CB8E180091; Tue, 11 Sep 2018 07:55:23 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Tue, 11 Sep 2018 07:55:03 +0200 Message-Id: <20180911055503.2303-3-clg@kaod.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180911055503.2303-1-clg@kaod.org> References: <20180911055503.2303-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 6399615072287362022 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtjedrjedugddutddtucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 46.105.50.32 Subject: [Qemu-devel] [PATCH v2 2/2] spapr: increase the size of the IRQ number space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The new layout using static IRQ number does not leave much space to the dynamic MSI range, only 0x100 IRQ numbers. Increase the total number of IRQS for newer machines and introduce a legacy XICS backend for pre-3.1 machines to maintain compatibility. For the old backend, provide a 'nr_msis' value covering the full IRQ number space as it does not use the bitmap allocator to allocate MSI interrupt numbers. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- include/hw/ppc/spapr_irq.h | 1 + hw/ppc/spapr.c | 1 + hw/ppc/spapr_irq.c | 15 ++++++++++++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index 650f810ad2aa..a467ce696ee4 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -41,6 +41,7 @@ typedef struct sPAPRIrq { } sPAPRIrq; =20 extern sPAPRIrq spapr_irq_xics; +extern sPAPRIrq spapr_irq_xics_legacy; =20 int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp); void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 4a9dd4d9bc14..eba7d60a30a7 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3971,6 +3971,7 @@ static void spapr_machine_3_0_class_options(MachineCl= ass *mc) SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_3_0); =20 smc->legacy_irq_allocation =3D true; + smc->irq =3D &spapr_irq_xics_legacy; } =20 DEFINE_SPAPR_MACHINE(3_0, "3.0", false); diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index fe8be5f5217a..e77b94cc685e 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -195,7 +195,7 @@ static void spapr_irq_print_info_xics(sPAPRMachineState= *spapr, Monitor *mon) ics_pic_print_info(spapr->ics, mon); } =20 -#define SPAPR_IRQ_XICS_NR_IRQS 0x400 +#define SPAPR_IRQ_XICS_NR_IRQS 0x1000 #define SPAPR_IRQ_XICS_NR_MSIS \ (XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI) =20 @@ -289,3 +289,16 @@ int spapr_irq_find(sPAPRMachineState *spapr, int num, = bool align, Error **errp) =20 return first + ics->offset; } + +#define SPAPR_IRQ_XICS_LEGACY_NR_IRQS 0x400 + +sPAPRIrq spapr_irq_xics_legacy =3D { + .nr_irqs =3D SPAPR_IRQ_XICS_LEGACY_NR_IRQS, + .nr_msis =3D SPAPR_IRQ_XICS_LEGACY_NR_IRQS, + + .init =3D spapr_irq_init_xics, + .claim =3D spapr_irq_claim_xics, + .free =3D spapr_irq_free_xics, + .qirq =3D spapr_qirq_xics, + .print_info =3D spapr_irq_print_info_xics, +}; --=20 2.17.1