From nobody Wed Nov 5 17:00:22 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1536397846432555.8723529596836; Sat, 8 Sep 2018 02:10:46 -0700 (PDT) Received: from localhost ([::1]:41870 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fyZGK-0003m1-Mp for importer@patchew.org; Sat, 08 Sep 2018 05:10:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35314) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fyZEV-0002nB-Jr for qemu-devel@nongnu.org; Sat, 08 Sep 2018 05:08:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fyZES-0003Ol-I3 for qemu-devel@nongnu.org; Sat, 08 Sep 2018 05:08:47 -0400 Received: from chuckie.co.uk ([82.165.15.123]:60076 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fyZES-0003MS-8l; Sat, 08 Sep 2018 05:08:44 -0400 Received: from host86-138-87-37.range86-138.btcentralplus.com ([86.138.87.37] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1fyZEa-0006zw-7v; Sat, 08 Sep 2018 10:08:53 +0100 From: Mark Cave-Ayland To: hpoussin@reactos.org, david@gibson.dropbear.id.au, qemu-devel@nongnu.org, qemu-ppc@nongnu.org Date: Sat, 8 Sep 2018 10:08:18 +0100 Message-Id: <20180908090820.15591-2-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180908090820.15591-1-mark.cave-ayland@ilande.co.uk> References: <20180908090820.15591-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.138.87.37 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH v2 1/3] raven: some minor IRQ-related tidy-ups X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This really lays the groundwork for the upcoming patches: it renames the irqs PREPPCIState struct member to pci_irqs (as soon there will be a distinction) and then changes the raven IRQ opaque to use PREPPCIState instead of just irqs array. Signed-off-by: Mark Cave-Ayland Reviewed-by: Herv=C3=A9 Poussineau Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Herv=C3=A9 Poussineau --- hw/pci-host/prep.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 88f035c20b..9b36f19c97 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -55,7 +55,7 @@ typedef struct RavenPCIState { typedef struct PRePPCIState { PCIHostState parent_obj; =20 - qemu_irq irq[PCI_NUM_PINS]; + qemu_irq pci_irqs[PCI_NUM_PINS]; PCIBus pci_bus; AddressSpace pci_io_as; MemoryRegion pci_io; @@ -194,9 +194,9 @@ static int raven_map_irq(PCIDevice *pci_dev, int irq_nu= m) =20 static void raven_set_irq(void *opaque, int irq_num, int level) { - qemu_irq *pic =3D opaque; + PREPPCIState *s =3D opaque; =20 - qemu_set_irq(pic[irq_num] , level); + qemu_set_irq(s->pci_irqs[irq_num], level); } =20 static AddressSpace *raven_pcihost_set_iommu(PCIBus *bus, void *opaque, @@ -223,13 +223,12 @@ static void raven_pcihost_realizefn(DeviceState *d, E= rror **errp) int i; =20 for (i =3D 0; i < PCI_NUM_PINS; i++) { - sysbus_init_irq(dev, &s->irq[i]); + sysbus_init_irq(dev, &s->pci_irqs[i]); } =20 qdev_init_gpio_in(d, raven_change_gpio, 1); =20 - pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s->irq, - PCI_NUM_PINS); + pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s, PCI_NUM_PIN= S); =20 memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, = s, "pci-conf-idx", 4); --=20 2.11.0 From nobody Wed Nov 5 17:00:22 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1536397952086116.69013168058802; Sat, 8 Sep 2018 02:12:32 -0700 (PDT) Received: from localhost ([::1]:41880 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fyZI0-00057u-OR for importer@patchew.org; Sat, 08 Sep 2018 05:12:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35316) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fyZEV-0002nC-KW for qemu-devel@nongnu.org; Sat, 08 Sep 2018 05:08:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fyZET-0003Qk-Nl for qemu-devel@nongnu.org; Sat, 08 Sep 2018 05:08:47 -0400 Received: from chuckie.co.uk ([82.165.15.123]:60079 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fyZET-0003PN-Gt; Sat, 08 Sep 2018 05:08:45 -0400 Received: from host86-138-87-37.range86-138.btcentralplus.com ([86.138.87.37] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1fyZEb-0006zw-QB; Sat, 08 Sep 2018 10:08:55 +0100 From: Mark Cave-Ayland To: hpoussin@reactos.org, david@gibson.dropbear.id.au, qemu-devel@nongnu.org, qemu-ppc@nongnu.org Date: Sat, 8 Sep 2018 10:08:19 +0100 Message-Id: <20180908090820.15591-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180908090820.15591-1-mark.cave-ayland@ilande.co.uk> References: <20180908090820.15591-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.138.87.37 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH v2 2/3] 40p: use OR gate to wire up raven PCI interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" According to the PReP specification section 6.1.6 "System Interrupt Assignments", all PCI interrupts are routed via IRQ 15. Instead of mapping each PCI IRQ separately, we introduce an OR gate within = the raven PCI host bridge and then wire the single output of the OR gate to the interrupt controller. Note that whilst the (now deprecated) PReP machine still exists we still ne= ed to preserve the old IRQ routing. This is done by adding a new "is-legacy-pr= ep" property to the raven PCI host bridge which is set to true for the PReP machine. Signed-off-by: Mark Cave-Ayland Reviewed-by: Herv=C3=A9 Poussineau Tested-by: Herv=C3=A9 Poussineau --- hw/pci-host/prep.c | 25 +++++++++++++++++++++++-- hw/ppc/prep.c | 4 +--- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 9b36f19c97..b1b6b16bad 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -32,6 +32,7 @@ #include "hw/pci/pci_host.h" #include "hw/i386/pc.h" #include "hw/loader.h" +#include "hw/or-irq.h" #include "exec/address-spaces.h" #include "elf.h" =20 @@ -55,6 +56,7 @@ typedef struct RavenPCIState { typedef struct PRePPCIState { PCIHostState parent_obj; =20 + qemu_or_irq *or_irq; qemu_irq pci_irqs[PCI_NUM_PINS]; PCIBus pci_bus; AddressSpace pci_io_as; @@ -69,6 +71,7 @@ typedef struct PRePPCIState { RavenPCIState pci_dev; =20 int contiguous_map; + bool is_legacy_prep; } PREPPCIState; =20 #define BIOS_SIZE (1 * MiB) @@ -222,8 +225,23 @@ static void raven_pcihost_realizefn(DeviceState *d, Er= ror **errp) MemoryRegion *address_space_mem =3D get_system_memory(); int i; =20 - for (i =3D 0; i < PCI_NUM_PINS; i++) { - sysbus_init_irq(dev, &s->pci_irqs[i]); + if (s->is_legacy_prep) { + for (i =3D 0; i < PCI_NUM_PINS; i++) { + sysbus_init_irq(dev, &s->pci_irqs[i]); + } + } else { + /* According to PReP specification section 6.1.6 "System Interrupt + * Assignments", all PCI interrupts are routed via IRQ 15 */ + s->or_irq =3D OR_IRQ(object_new(TYPE_OR_IRQ)); + object_property_set_int(OBJECT(s->or_irq), PCI_NUM_PINS, "num-line= s", + &error_fatal); + object_property_set_bool(OBJECT(s->or_irq), true, "realized", + &error_fatal); + sysbus_init_irq(dev, &s->or_irq->out_irq); + + for (i =3D 0; i < PCI_NUM_PINS; i++) { + s->pci_irqs[i] =3D qdev_get_gpio_in(DEVICE(s->or_irq), i); + } } =20 qdev_init_gpio_in(d, raven_change_gpio, 1); @@ -382,6 +400,9 @@ static Property raven_pcihost_properties[] =3D { DEFINE_PROP_UINT32("elf-machine", PREPPCIState, pci_dev.elf_machine, EM_NONE), DEFINE_PROP_STRING("bios-name", PREPPCIState, pci_dev.bios_name), + /* Temporary workaround until legacy prep machine is removed */ + DEFINE_PROP_BOOL("is-legacy-prep", PREPPCIState, is_legacy_prep, + false), DEFINE_PROP_END_OF_LIST() }; =20 diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index b0ea20416e..615865e46c 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -502,6 +502,7 @@ static void ppc_prep_init(MachineState *machine) } qdev_prop_set_string(dev, "bios-name", bios_name); qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE); + qdev_prop_set_bit(dev, "is-legacy-prep", true); pcihost =3D PCI_HOST_BRIDGE(dev); object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev), NU= LL); qdev_init_nofail(dev); @@ -669,9 +670,6 @@ static void ibm_40p_init(MachineState *machine) qdev_connect_gpio_out(dev, 0, cpu->env.irq_inputs[PPC6xx_INPUT_INT]); sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15)); - sysbus_connect_irq(pcihost, 1, qdev_get_gpio_in(dev, 13)); - sysbus_connect_irq(pcihost, 2, qdev_get_gpio_in(dev, 15)); - sysbus_connect_irq(pcihost, 3, qdev_get_gpio_in(dev, 13)); isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); =20 /* Memory controller */ --=20 2.11.0 From nobody Wed Nov 5 17:00:22 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 153639785957173.05373486414533; Sat, 8 Sep 2018 02:10:59 -0700 (PDT) Received: from localhost ([::1]:41874 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fyZGc-00041W-DZ for importer@patchew.org; Sat, 08 Sep 2018 05:10:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35340) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fyZEW-0002nM-QS for qemu-devel@nongnu.org; Sat, 08 Sep 2018 05:08:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fyZEV-0003VV-SC for qemu-devel@nongnu.org; Sat, 08 Sep 2018 05:08:48 -0400 Received: from chuckie.co.uk ([82.165.15.123]:60080 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fyZEV-0003TO-LM; Sat, 08 Sep 2018 05:08:47 -0400 Received: from host86-138-87-37.range86-138.btcentralplus.com ([86.138.87.37] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1fyZEd-0006zw-E2; Sat, 08 Sep 2018 10:08:57 +0100 From: Mark Cave-Ayland To: hpoussin@reactos.org, david@gibson.dropbear.id.au, qemu-devel@nongnu.org, qemu-ppc@nongnu.org Date: Sat, 8 Sep 2018 10:08:20 +0100 Message-Id: <20180908090820.15591-4-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180908090820.15591-1-mark.cave-ayland@ilande.co.uk> References: <20180908090820.15591-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.138.87.37 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH v2 3/3] 40p: add fixed IRQ routing for LSI SCSI device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Whilst the PReP specification describes how all PCI IRQs are routed via IRQ 15 on the interrupt controller, the real 40p machine has routing quirk in that the LSI SCSI device is routed to IRQ 13. This is implemented using a little hack: the existing IRQ routing code uses (irq_num + (pci_dev->devfn >> 3)) & 1 to give the PCI interrupt pin, where the "& 1" ensures that the only pins A and B (0 and 1) will ever be used. Rather than fix the mask to "& 3" we leave the existing routing above as-is and then force the LSI SCSI device to use pin C (2). This enables us to route pin 2 permanantly to IRQ 13 since the LSI SCSI device will be its only user. Signed-off-by: Mark Cave-Ayland Reviewed-by: Herv=C3=A9 Poussineau Tested-by: Herv=C3=A9 Poussineau --- hw/pci-host/prep.c | 35 +++++++++++++++++++++++++++++++++-- hw/ppc/prep.c | 10 +++++++--- 2 files changed, 40 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index b1b6b16bad..87270605b5 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -58,6 +58,7 @@ typedef struct PRePPCIState { =20 qemu_or_irq *or_irq; qemu_irq pci_irqs[PCI_NUM_PINS]; + qemu_irq scsi_irq; PCIBus pci_bus; AddressSpace pci_io_as; MemoryRegion pci_io; @@ -192,14 +193,41 @@ static const MemoryRegionOps raven_io_ops =3D { =20 static int raven_map_irq(PCIDevice *pci_dev, int irq_num) { - return (irq_num + (pci_dev->devfn >> 3)) & 1; + switch (pci_dev->devfn) { + case PCI_DEVFN(1, 0): + /* Whilst legacy PReP machine exists we need to make + * sure that this fixed interrupt routing is 40p only */ + if (strcmp(object_get_typename(OBJECT(pci_dev)), + "lsi53c810") =3D=3D 0) { + /* LSI SCSI */ + return 2; + } else { + /* Normal PCI IRQ mapping */ + return (irq_num + (pci_dev->devfn >> 3)) & 1; + } + default: + /* Normal PCI IRQ mapping */ + return (irq_num + (pci_dev->devfn >> 3)) & 1; + } } =20 static void raven_set_irq(void *opaque, int irq_num, int level) { PREPPCIState *s =3D opaque; =20 - qemu_set_irq(s->pci_irqs[irq_num], level); + if (s->is_legacy_prep) { + qemu_set_irq(s->pci_irqs[irq_num], level); + } else { + switch (irq_num) { + case 2: + /* LSI SCSI */ + qemu_set_irq(s->scsi_irq, level); + break; + default: + /* Normal PCI IRQ mapping */ + qemu_set_irq(s->pci_irqs[irq_num], level); + } + } } =20 static AddressSpace *raven_pcihost_set_iommu(PCIBus *bus, void *opaque, @@ -242,6 +270,9 @@ static void raven_pcihost_realizefn(DeviceState *d, Err= or **errp) for (i =3D 0; i < PCI_NUM_PINS; i++) { s->pci_irqs[i] =3D qdev_get_gpio_in(DEVICE(s->or_irq), i); } + + /* 40p LSI SCSI has fixed routing via IRQ 13 */ + sysbus_init_irq(dev, &s->scsi_irq); } =20 qdev_init_gpio_in(d, raven_change_gpio, 1); diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 615865e46c..0412a56d98 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -626,6 +626,7 @@ static void ibm_40p_init(MachineState *machine) Nvram *m48t59 =3D NULL; PCIBus *pci_bus; ISABus *isa_bus; + PCIDevice *pci; void *fw_cfg; int i; uint32_t kernel_base =3D 0, initrd_base =3D 0; @@ -670,6 +671,7 @@ static void ibm_40p_init(MachineState *machine) qdev_connect_gpio_out(dev, 0, cpu->env.irq_inputs[PPC6xx_INPUT_INT]); sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(dev, 15)); + sysbus_connect_irq(pcihost, 1, qdev_get_gpio_in(dev, 13)); isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); =20 /* Memory controller */ @@ -700,9 +702,11 @@ static void ibm_40p_init(MachineState *machine) qdev_prop_set_uint32(dev, "equipment", 0xc0); qdev_init_nofail(dev); =20 - dev =3D DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0), - "lsi53c810")); - lsi53c8xx_handle_legacy_cmdline(dev); + pci =3D PCI_DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0), + "lsi53c810")); + /* Interrupt pin C for fixed LSI SCSI IRQ routing */ + pci->config[PCI_INTERRUPT_PIN] =3D 0x3; + lsi53c8xx_handle_legacy_cmdline(DEVICE(pci)); =20 /* XXX: s3-trio at PCI_DEVFN(2, 0) */ pci_vga_init(pci_bus); --=20 2.11.0