From nobody Wed Nov 5 18:32:08 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1536059525398671.7018737355402; Tue, 4 Sep 2018 04:12:05 -0700 (PDT) Received: from localhost ([::1]:50252 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fx9Fa-0003jL-94 for importer@patchew.org; Tue, 04 Sep 2018 07:12:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50301) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fx9DJ-0001PW-T3 for qemu-devel@nongnu.org; Tue, 04 Sep 2018 07:09:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fx9DI-0006Qo-9B for qemu-devel@nongnu.org; Tue, 04 Sep 2018 07:09:41 -0400 Received: from smtp.nue.novell.com ([195.135.221.5]:58927) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fx9DH-0006P7-S1 for qemu-devel@nongnu.org; Tue, 04 Sep 2018 07:09:40 -0400 Received: from localhost.localdomain ([45.122.156.254]) by smtp.nue.novell.com with ESMTP (NOT encrypted); Tue, 04 Sep 2018 13:09:36 +0200 From: Fei Li To: qemu-devel@nongnu.org Date: Tue, 4 Sep 2018 19:08:20 +0800 Message-Id: <20180904110822.12863-4-fli@suse.com> X-Mailer: git-send-email 2.13.7 In-Reply-To: <20180904110822.12863-1-fli@suse.com> References: <20180904110822.12863-1-fli@suse.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.135.221.5 Subject: [Qemu-devel] [PATCH 3/5] qemu_init_vcpu: add a new Error paramater to propagate X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fli@suse.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The caller of qemu_init_vcpu() already passed the **errp to handle errors. In view of this, add a new Error parameter to the following call trace to propagate the error and let the final caller check it. Signed-off-by: Fei Li --- cpus.c | 32 +++++++++++++++++++------------- include/qom/cpu.h | 2 +- target/alpha/cpu.c | 6 +++++- target/arm/cpu.c | 6 +++++- target/cris/cpu.c | 6 +++++- target/hppa/cpu.c | 6 +++++- target/i386/cpu.c | 6 +++++- target/lm32/cpu.c | 6 +++++- target/m68k/cpu.c | 6 +++++- target/microblaze/cpu.c | 6 +++++- target/mips/cpu.c | 6 +++++- target/moxie/cpu.c | 6 +++++- target/nios2/cpu.c | 6 +++++- target/openrisc/cpu.c | 6 +++++- target/ppc/translate_init.inc.c | 6 +++++- target/riscv/cpu.c | 6 +++++- target/s390x/cpu.c | 5 ++++- target/sh4/cpu.c | 6 +++++- target/sparc/cpu.c | 6 +++++- target/tilegx/cpu.c | 6 +++++- target/tricore/cpu.c | 6 +++++- target/unicore32/cpu.c | 6 +++++- target/xtensa/cpu.c | 6 +++++- 23 files changed, 124 insertions(+), 35 deletions(-) diff --git a/cpus.c b/cpus.c index 8ee6e5db93..41efddc218 100644 --- a/cpus.c +++ b/cpus.c @@ -1898,7 +1898,7 @@ void cpu_remove_sync(CPUState *cpu) /* For temporary buffers for forming a name */ #define VCPU_THREAD_NAME_SIZE 16 =20 -static void qemu_tcg_init_vcpu(CPUState *cpu) +static void qemu_tcg_init_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; static QemuCond *single_tcg_halt_cond; @@ -1954,7 +1954,7 @@ static void qemu_tcg_init_vcpu(CPUState *cpu) } } =20 -static void qemu_hax_start_vcpu(CPUState *cpu) +static void qemu_hax_start_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; =20 @@ -1971,7 +1971,7 @@ static void qemu_hax_start_vcpu(CPUState *cpu) #endif } =20 -static void qemu_kvm_start_vcpu(CPUState *cpu) +static void qemu_kvm_start_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; =20 @@ -1984,7 +1984,7 @@ static void qemu_kvm_start_vcpu(CPUState *cpu) cpu, QEMU_THREAD_JOINABLE); } =20 -static void qemu_hvf_start_vcpu(CPUState *cpu) +static void qemu_hvf_start_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; =20 @@ -2002,7 +2002,7 @@ static void qemu_hvf_start_vcpu(CPUState *cpu) cpu, QEMU_THREAD_JOINABLE); } =20 -static void qemu_whpx_start_vcpu(CPUState *cpu) +static void qemu_whpx_start_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; =20 @@ -2018,7 +2018,7 @@ static void qemu_whpx_start_vcpu(CPUState *cpu) #endif } =20 -static void qemu_dummy_start_vcpu(CPUState *cpu) +static void qemu_dummy_start_vcpu(CPUState *cpu, Error **errp) { char thread_name[VCPU_THREAD_NAME_SIZE]; =20 @@ -2031,11 +2031,12 @@ static void qemu_dummy_start_vcpu(CPUState *cpu) QEMU_THREAD_JOINABLE); } =20 -void qemu_init_vcpu(CPUState *cpu) +void qemu_init_vcpu(CPUState *cpu, Error **errp) { cpu->nr_cores =3D smp_cores; cpu->nr_threads =3D smp_threads; cpu->stopped =3D true; + Error *local_err =3D NULL; =20 if (!cpu->as) { /* If the target cpu hasn't set up any address spaces itself, @@ -2046,17 +2047,22 @@ void qemu_init_vcpu(CPUState *cpu) } =20 if (kvm_enabled()) { - qemu_kvm_start_vcpu(cpu); + qemu_kvm_start_vcpu(cpu, &local_err); } else if (hax_enabled()) { - qemu_hax_start_vcpu(cpu); + qemu_hax_start_vcpu(cpu, &local_err); } else if (hvf_enabled()) { - qemu_hvf_start_vcpu(cpu); + qemu_hvf_start_vcpu(cpu, &local_err); } else if (tcg_enabled()) { - qemu_tcg_init_vcpu(cpu); + qemu_tcg_init_vcpu(cpu, &local_err); } else if (whpx_enabled()) { - qemu_whpx_start_vcpu(cpu); + qemu_whpx_start_vcpu(cpu, &local_err); } else { - qemu_dummy_start_vcpu(cpu); + qemu_dummy_start_vcpu(cpu, &local_err); + } + + if (local_err) { + error_propagate(errp, local_err); + return; } =20 while (!cpu->created) { diff --git a/include/qom/cpu.h b/include/qom/cpu.h index dc130cd307..0766e694df 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -1012,7 +1012,7 @@ void end_exclusive(void); * * Initializes a vCPU. */ -void qemu_init_vcpu(CPUState *cpu); +void qemu_init_vcpu(CPUState *cpu, Error **errp); =20 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */ #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */ diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index b08078e7fc..5b0b4892f2 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -66,7 +66,11 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error = **errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 acc->parent_realize(dev, errp); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 258ba6dcaa..a06a5629cd 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1028,7 +1028,11 @@ static void arm_cpu_realizefn(DeviceState *dev, Erro= r **errp) } #endif =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } cpu_reset(cs); =20 acc->parent_realize(dev, errp); diff --git a/target/cris/cpu.c b/target/cris/cpu.c index a23aba2688..707ef63293 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -140,7 +140,11 @@ static void cris_cpu_realizefn(DeviceState *dev, Error= **errp) } =20 cpu_reset(cs); - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 ccc->parent_realize(dev, errp); } diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 00bf444620..45249a505a 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -98,7 +98,11 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error *= *errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } acc->parent_realize(dev, errp); =20 #ifndef CONFIG_USER_ONLY diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f24295e6e4..768039c65b 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5112,7 +5112,11 @@ static void x86_cpu_realizefn(DeviceState *dev, Erro= r **errp) } #endif =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 /* * Most Intel and certain AMD CPUs support hyperthreading. Even though= QEMU diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index b7499cb627..7c4e4c4d88 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -139,7 +139,11 @@ static void lm32_cpu_realizefn(DeviceState *dev, Error= **errp) =20 cpu_reset(cs); =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 lcc->parent_realize(dev, errp); } diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 582e3a73b3..ed5c340242 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -231,7 +231,11 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error= **errp) m68k_cpu_init_gdb(cpu); =20 cpu_reset(cs); - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 mcc->parent_realize(dev, errp); } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 9b546a2c18..2d82a5885a 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -161,7 +161,11 @@ static void mb_cpu_realizefn(DeviceState *dev, Error *= *errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 env->pvr.regs[0] =3D PVR0_USE_EXC_MASK \ | PVR0_USE_ICACHE_MASK \ diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 497706b669..3e21067f7a 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -136,7 +136,11 @@ static void mips_cpu_realizefn(DeviceState *dev, Error= **errp) cpu_mips_realize_env(&cpu->env); =20 cpu_reset(cs); - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 mcc->parent_realize(dev, errp); } diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c index 8d67eb6727..c9e91d7e53 100644 --- a/target/moxie/cpu.c +++ b/target/moxie/cpu.c @@ -66,7 +66,11 @@ static void moxie_cpu_realizefn(DeviceState *dev, Error = **errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } cpu_reset(cs); =20 mcc->parent_realize(dev, errp); diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index fbfaa2ce26..be6601fc92 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -94,7 +94,11 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error = **errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } cpu_reset(cs); =20 ncc->parent_realize(dev, errp); diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index fb7cb5c507..ee4c931280 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -83,7 +83,11 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Err= or **errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } cpu_reset(cs); =20 occ->parent_realize(dev, errp); diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index d920d3e538..50980dec9a 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -9707,7 +9707,11 @@ static void ppc_cpu_realize(DeviceState *dev, Error = **errp) 32, "power-vsx.xml", 0); } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 pcc->parent_realize(dev, errp); =20 diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d630e8fd6c..5416cf86c2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -303,7 +303,11 @@ static void riscv_cpu_realize(DeviceState *dev, Error = **errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } cpu_reset(cs); =20 mcc->parent_realize(dev, errp); diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 8ed4823d6e..bd362e3775 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -217,7 +217,10 @@ static void s390_cpu_realizefn(DeviceState *dev, Error= **errp) qemu_register_reset(s390_cpu_machine_reset_cb, cpu); #endif s390_cpu_gdb_init(cs); - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + goto out; + } =20 /* * KVM requires the initial CPU reset ioctl to be executed on the targ= et diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index b9f393b7c7..2ad3a8f09e 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -196,7 +196,11 @@ static void superh_cpu_realizefn(DeviceState *dev, Err= or **errp) } =20 cpu_reset(cs); - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 scc->parent_realize(dev, errp); } diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 0f090ece54..b3616f8d59 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -773,7 +773,11 @@ static void sparc_cpu_realizefn(DeviceState *dev, Erro= r **errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 scc->parent_realize(dev, errp); } diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c index bfe9be59b5..59c0850a7c 100644 --- a/target/tilegx/cpu.c +++ b/target/tilegx/cpu.c @@ -92,7 +92,11 @@ static void tilegx_cpu_realizefn(DeviceState *dev, Error= **errp) } =20 cpu_reset(cs); - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 tcc->parent_realize(dev, errp); } diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 2edaef1aef..c95d8e9856 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -96,7 +96,11 @@ static void tricore_cpu_realizefn(DeviceState *dev, Erro= r **errp) set_feature(env, TRICORE_FEATURE_13); } cpu_reset(cs); - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 tcc->parent_realize(dev, errp); } diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index 68f978d80b..0102f4ea79 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -96,7 +96,11 @@ static void uc32_cpu_realizefn(DeviceState *dev, Error *= *errp) return; } =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 ucc->parent_realize(dev, errp); } diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 590813d4f7..b6740c0d66 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -131,7 +131,11 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Err= or **errp) =20 cs->gdb_num_regs =3D xcc->config->gdb_regmap.num_regs; =20 - qemu_init_vcpu(cs); + qemu_init_vcpu(cs, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 xcc->parent_realize(dev, errp); } --=20 2.13.7