From nobody Wed Nov 5 16:38:18 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail header.i=@amazon.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15356584478664.1083593070479765; Thu, 30 Aug 2018 12:47:27 -0700 (PDT) Received: from localhost ([::1]:50594 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fvSuc-0002Bk-79 for importer@patchew.org; Thu, 30 Aug 2018 15:47:26 -0400 Received: from eggs.gnu.org ([208.118.235.92]:59985) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fvSsf-000139-VQ for qemu-devel@nongnu.org; Thu, 30 Aug 2018 15:45:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fvSeF-0006qQ-56 for qemu-devel@nongnu.org; Thu, 30 Aug 2018 15:30:34 -0400 Received: from smtp-fw-4101.amazon.com ([72.21.198.25]:55912) by eggs.gnu.org with esmtps (TLS1.0:RSA_ARCFOUR_SHA1:16) (Exim 4.71) (envelope-from ) id 1fvSeF-0006pP-04 for qemu-devel@nongnu.org; Thu, 30 Aug 2018 15:30:31 -0400 Received: from iad6-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-2a-c5104f52.us-west-2.amazon.com) ([10.124.125.6]) by smtp-border-fw-out-4101.iad4.amazon.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 30 Aug 2018 19:30:28 +0000 Received: from ua08cfde8192f59f8a244.ant.amazon.com (pdx2-ws-svc-lb17-vlan2.amazon.com [10.247.140.66]) by email-inbound-relay-2a-c5104f52.us-west-2.amazon.com (8.14.7/8.14.7) with ESMTP id w7UJUO4X035186 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 30 Aug 2018 19:30:25 GMT Received: from ua08cfde8192f59f8a244.ant.amazon.com (localhost [127.0.0.1]) by ua08cfde8192f59f8a244.ant.amazon.com (8.15.2/8.15.2/Debian-3) with ESMTP id w7UJUO9x020229; Thu, 30 Aug 2018 15:30:24 -0400 Received: (from jancraig@localhost) by ua08cfde8192f59f8a244.ant.amazon.com (8.15.2/8.15.2/Submit) id w7UJUO85020228; Thu, 30 Aug 2018 15:30:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1535657430; x=1567193430; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=1jHf+K1yr+uyGjqhGf03vbDWI3PRKbudYGlWB3k3shA=; b=qcZwmans/p6QD0ePk3jml9dgaJxhf6mBwf9rCdhEfRYIpphyFRWG/C0M bAx7SKwVTHWC9iR6pcRgJo0mItdnwI/zsfZG2VTm3hGoUSncg+AYixdTQ 2a3Y2KUOKbd9T1cgv4ltV6GsVV+2r5deBzJ5QL5L8axgBdoe6Np8OTqY/ k=; X-IronPort-AV: E=Sophos;i="5.53,307,1531785600"; d="scan'208";a="736240524" To: qemu-devel@nongnu.org Date: Thu, 30 Aug 2018 15:30:13 -0400 Message-Id: <20180830193019.20104-4-jancraig@amazon.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830193019.20104-1-jancraig@amazon.com> References: <20180830193019.20104-1-jancraig@amazon.com> Precedence: Bulk X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 72.21.198.25 Subject: [Qemu-devel] [PATCH v4 3/9] target/mips: Split mips instruction handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Craig Janeczek via Qemu-devel Reply-To: Craig Janeczek Cc: aurelien@aurel32.net, amarkovic@wavecomp.com, Craig Janeczek Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Splits the instruction handling switch statement from the original legacy code. Signed-off-by: Craig Janeczek --- v1 - NA v2 - NA v3 - NA v4 - Initial patch target/mips/mips-defs.h | 1 + target/mips/translate.c | 28 +++++++++++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index d239069975..5a409757f0 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -50,6 +50,7 @@ #define ASE_SMARTMIPS 0x00400000 #define ASE_MICROMIPS 0x00800000 #define ASE_MSA 0x01000000 +#define ASE_MXU 0x02000000 =20 /* Chip specific instructions. */ #define INSN_LOONGSON2E 0x20000000 diff --git a/target/mips/translate.c b/target/mips/translate.c index a598f45558..53d896ebf9 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -17855,6 +17855,28 @@ static void decode_opc_special(CPUMIPSState *env, = DisasContext *ctx) } } =20 +static void decode_opc_special2_mxu(CPUMIPSState *env, DisasContext *ctx) +{ + int rs, rt, rd; + uint32_t op1; + + rs =3D (ctx->opcode >> 21) & 0x1f; + rt =3D (ctx->opcode >> 16) & 0x1f; + rd =3D (ctx->opcode >> 11) & 0x1f; + + op1 =3D MASK_SPECIAL2(ctx->opcode); + + switch (op1) { + case OPC_MUL: + gen_arith(ctx, op1, rd, rs, rt); + break; + default: /* Invalid */ + MIPS_INVAL("special2_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ct= x) { int rs, rt, rd; @@ -19836,7 +19858,11 @@ static void decode_opc(CPUMIPSState *env, DisasCon= text *ctx) decode_opc_special(env, ctx); break; case OPC_SPECIAL2: - decode_opc_special2_legacy(env, ctx); + if (ctx->insn_flags & ASE_MXU) { + decode_opc_special2_mxu(env, ctx); + } else { + decode_opc_special2_legacy(env, ctx); + } break; case OPC_SPECIAL3: decode_opc_special3(env, ctx); --=20 2.18.0