From nobody Wed Nov 5 16:36:51 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1535537554687301.0004896106242; Wed, 29 Aug 2018 03:12:34 -0700 (PDT) Received: from localhost ([::1]:42161 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fuxSd-0006Hc-ML for importer@patchew.org; Wed, 29 Aug 2018 06:12:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38965) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fuxBj-0005TP-09 for qemu-devel@nongnu.org; Wed, 29 Aug 2018 05:55:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fuwz9-0002at-2w for qemu-devel@nongnu.org; Wed, 29 Aug 2018 05:42:02 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:46234 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fuwz8-0002ao-TU; Wed, 29 Aug 2018 05:41:59 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8DAD140241D4; Wed, 29 Aug 2018 09:41:58 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 71C162166B41; Wed, 29 Aug 2018 09:41:56 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Wed, 29 Aug 2018 11:41:27 +0200 Message-Id: <20180829094143.2102-4-cohuck@redhat.com> In-Reply-To: <20180829094143.2102-1-cohuck@redhat.com> References: <20180829094143.2102-1-cohuck@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Wed, 29 Aug 2018 09:41:58 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Wed, 29 Aug 2018 09:41:58 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'cohuck@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PULL 03/19] target/s390x: fix CSST decoding and runtime alignment check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Pavel Zbitskiy , David Hildenbrand , Cornelia Huck , Alexander Graf , qemu-devel@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Pavel Zbitskiy CSST is defined as: C(0xc802, CSST, SSF, CASS, la1, a2, 0, 0, csst, 0) It means that the first parameter is handled by in1_la1(). in1_la1() fills addr1 field, and not in1. Furthermore, when extract32() is used for the alignment check, the third parameter should specify the number of trailing bits that must be 0. For FC these numbers are: FC=3D0 (word, 4 bytes): 2 FC=3D1 (double word, 8 bytes): 3 FC=3D2 (quad word, 16 bytes): 4 For SC these numbers correspond to the size: SC=3D0: 0 SC=3D1: 1 SC=3D2: 2 SC=3D3: 3 SC=3D4: 4 Signed-off-by: Pavel Zbitskiy Message-Id: <20180821025104.19604-4-pavel.zbitskiy@gmail.com> Reviewed-by: David Hildenbrand Signed-off-by: Cornelia Huck --- target/s390x/mem_helper.c | 2 +- target/s390x/translate.c | 4 ++-- tests/tcg/s390x/Makefile.target | 1 + tests/tcg/s390x/csst.c | 43 +++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 47 insertions(+), 3 deletions(-) create mode 100644 tests/tcg/s390x/csst.c diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index e21a47fb4d..c94dbf3fcb 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1442,7 +1442,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t = r3, uint64_t a1, } =20 /* Sanity check the alignments. */ - if (extract32(a1, 0, 4 << fc) || extract32(a2, 0, 1 << sc)) { + if (extract32(a1, 0, fc + 2) || extract32(a2, 0, sc)) { goto spec_exception; } =20 diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 9caae5af84..4f62a38c97 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2058,9 +2058,9 @@ static DisasJumpType op_csst(DisasContext *s, DisasOp= s *o) TCGv_i32 t_r3 =3D tcg_const_i32(r3); =20 if (tb_cflags(s->base.tb) & CF_PARALLEL) { - gen_helper_csst_parallel(cc_op, cpu_env, t_r3, o->in1, o->in2); + gen_helper_csst_parallel(cc_op, cpu_env, t_r3, o->addr1, o->in2); } else { - gen_helper_csst(cc_op, cpu_env, t_r3, o->in1, o->in2); + gen_helper_csst(cc_op, cpu_env, t_r3, o->addr1, o->in2); } tcg_temp_free_i32(t_r3); =20 diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.tar= get index 9f4076901f..f62f950d8e 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -1,3 +1,4 @@ VPATH+=3D$(SRC_PATH)/tests/tcg/s390x CFLAGS+=3D-march=3DzEC12 -m64 TESTS+=3Dhello-s390x +TESTS+=3Dcsst diff --git a/tests/tcg/s390x/csst.c b/tests/tcg/s390x/csst.c new file mode 100644 index 0000000000..1dae9071fb --- /dev/null +++ b/tests/tcg/s390x/csst.c @@ -0,0 +1,43 @@ +#include +#include + +int main(void) +{ + uint64_t parmlist[] =3D { + 0xfedcba9876543210ull, + 0, + 0x7777777777777777ull, + 0, + }; + uint64_t op1 =3D 0x0123456789abcdefull; + uint64_t op2 =3D 0; + uint64_t op3 =3D op1; + uint64_t cc; + + asm volatile( + " lghi %%r0,%[flags]\n" + " la %%r1,%[parmlist]\n" + " csst %[op1],%[op2],%[op3]\n" + " ipm %[cc]\n" + : [op1] "+m" (op1), + [op2] "+m" (op2), + [op3] "+r" (op3), + [cc] "=3Dr" (cc) + : [flags] "K" (0x0301), + [parmlist] "m" (parmlist) + : "r0", "r1", "cc", "memory"); + cc =3D (cc >> 28) & 3; + if (cc) { + write(1, "bad cc\n", 7); + return 1; + } + if (op1 !=3D parmlist[0]) { + write(1, "bad op1\n", 8); + return 1; + } + if (op2 !=3D parmlist[2]) { + write(1, "bad op2\n", 8); + return 1; + } + return 0; +} --=20 2.14.4