From nobody Wed Nov 5 14:37:47 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1534826610152807.8264767422908; Mon, 20 Aug 2018 21:43:30 -0700 (PDT) Received: from localhost ([::1]:50686 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fryVq-0004BJ-6t for importer@patchew.org; Tue, 21 Aug 2018 00:43:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56422) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fryMp-00047R-7S for qemu-devel@nongnu.org; Tue, 21 Aug 2018 00:34:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fryMl-0000Ip-2N for qemu-devel@nongnu.org; Tue, 21 Aug 2018 00:34:06 -0400 Received: from ozlabs.org ([203.11.71.1]:38723) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fryMk-0000EW-0y; Tue, 21 Aug 2018 00:34:02 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 41vd9D5jZ4z9sBj; Tue, 21 Aug 2018 14:33:51 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1534826032; bh=1xCO9sniAQIKu/8RLWaQ0XQ6BA6CCwKe+lgydnxTlbQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cnB9OScvLnX8tUx+GO2NvXIVr6rnkP9QF4jN6xuLPli7j1zIkRQZr89pgWJHFMPjM QKkOGZ0h2rB3czNx+aLQQMChOFuan4iOdU3Hz08pjuIMiCNbG5ekjSfl6Aj3DVeU+6 Gb8iJGAIcSgFxqcLqUh91Bhj0kYvWb3zTywI0Flg= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 21 Aug 2018 14:33:23 +1000 Message-Id: <20180821043343.7514-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180821043343.7514-1-david@gibson.dropbear.id.au> References: <20180821043343.7514-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 06/26] target/ppc: Tidy helper_fadd, helper_fsub X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, aik@ozlabs.ru, Richard Henderson , groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. Pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Note that because we know float_flag_invalid was set, we do not have to re-check the signs of the infinities. Signed-off-by: Richard Henderson Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 50 +++++++++++++++++------------------------ target/ppc/helper.h | 4 ++-- 2 files changed, 23 insertions(+), 31 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index b9ee46eb5f..7758372ecd 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -587,51 +587,43 @@ void helper_reset_fpstatus(CPUPPCState *env) } =20 /* fadd - fadd. */ -uint64_t helper_fadd(CPUPPCState *env, uint64_t arg1, uint64_t arg2) +float64 helper_fadd(CPUPPCState *env, float64 arg1, float64 arg2) { - CPU_DoubleU farg1, farg2; - - farg1.ll =3D arg1; - farg2.ll =3D arg2; + float64 ret =3D float64_add(arg1, arg2, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2= .d) && - float64_is_neg(farg1.d) !=3D float64_is_neg(farg2.d))) { - /* Magnitude subtraction of infinities */ - farg1.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); - } else { - if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || - float64_is_signaling_nan(farg2.d, &env->fp_status))) { + if (unlikely(status & float_flag_invalid)) { + if (float64_is_infinity(arg1) && float64_is_infinity(arg2)) { + /* Magnitude subtraction of infinities */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); + } else if (float64_is_signaling_nan(arg1, &env->fp_status) || + float64_is_signaling_nan(arg2, &env->fp_status)) { /* sNaN addition */ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } - farg1.d =3D float64_add(farg1.d, farg2.d, &env->fp_status); } =20 - return farg1.ll; + return ret; } =20 /* fsub - fsub. */ -uint64_t helper_fsub(CPUPPCState *env, uint64_t arg1, uint64_t arg2) +float64 helper_fsub(CPUPPCState *env, float64 arg1, float64 arg2) { - CPU_DoubleU farg1, farg2; - - farg1.ll =3D arg1; - farg2.ll =3D arg2; + float64 ret =3D float64_sub(arg1, arg2, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2= .d) && - float64_is_neg(farg1.d) =3D=3D float64_is_neg(farg2.d))) { - /* Magnitude subtraction of infinities */ - farg1.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); - } else { - if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || - float64_is_signaling_nan(farg2.d, &env->fp_status))) { - /* sNaN subtraction */ + if (unlikely(status & float_flag_invalid)) { + if (float64_is_infinity(arg1) && float64_is_infinity(arg2)) { + /* Magnitude subtraction of infinities */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); + } else if (float64_is_signaling_nan(arg1, &env->fp_status) || + float64_is_signaling_nan(arg2, &env->fp_status)) { + /* sNaN addition */ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } - farg1.d =3D float64_sub(farg1.d, farg2.d, &env->fp_status); } =20 - return farg1.ll; + return ret; } =20 /* fmul - fmul. */ diff --git a/target/ppc/helper.h b/target/ppc/helper.h index e4f7c55db9..d81806dd2c 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -85,8 +85,8 @@ DEF_HELPER_2(friz, i64, env, i64) DEF_HELPER_2(frip, i64, env, i64) DEF_HELPER_2(frim, i64, env, i64) =20 -DEF_HELPER_3(fadd, i64, env, i64, i64) -DEF_HELPER_3(fsub, i64, env, i64, i64) +DEF_HELPER_3(fadd, f64, env, f64, f64) +DEF_HELPER_3(fsub, f64, env, f64, f64) DEF_HELPER_3(fmul, f64, env, f64, f64) DEF_HELPER_3(fdiv, f64, env, f64, f64) DEF_HELPER_4(fmadd, i64, env, i64, i64, i64) --=20 2.17.1