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[64.112.177.9]) by smtp.gmail.com with ESMTPSA id d100-v6sm4897991qkh.34.2018.08.20.19.51.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Aug 2018 19:51:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zdQWDJOmUYpmFJBRbkyACEJ+k0XvtQEvzxuRCC+WAfA=; b=i2FgmYtCId0BzdK81E525lKlhhWkx0Q9h/xHfrk0Z3Yq6oH/vKJvAyBPeOEHdTtTHZ m2XLorV5WAF5JLJpxN3BxWOaSchhk5vCWaXxEaWQYZwi2QEl2LzlLQBY52dOpu4veU64 A05AzkLjRuJtBP1f63B7SsrYq8IE+z36HaOsKMznd13r/j8HDd4UwKmE6Ia4Ijd+TkiS 58aOI3xQAcnlxiP7z4hP3KE+xiI7LlRysrzxJOhzYfoIApZrpI4YiNTti6/XH8wzb+x/ 2NoY13CZFIWGeLiF5Md6fc2/pTaP5p/HtRxxvPt9Io5n56FCSiQ5Mfn4MVA5MZOLnMKJ 5Bqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zdQWDJOmUYpmFJBRbkyACEJ+k0XvtQEvzxuRCC+WAfA=; b=b/fevJVDJNpaE9RJI1fhXyxzZYj9jGF350l2FidBYP8EhHMpioJbVUEzB+wd70ODn8 EaigN1Sb/YWzJQzPps+5DARBVXZy8+jO0D7DAPznWHXyIbOiQK/cGsjk7OJfAG5HmI66 OhX5Dur1o3u7j0Ce3UlgUoAgQE7NQ/fLy19F2qY7/bWFvPYhOK4LvEGqW2Z6gVPCGjqo vuTGrGjoYnSwe099PJ936JG7SqbY0x8OFmFdyEPXFFI+1GWGXYPfmfxUtr6xqWqjHz6K HMqn0EQaWkyr0M1RQVZxob3faDQBLDtr7NflxWIZDUTqV3gVjlDKIAYTTosecPMCH9s2 TWjA== X-Gm-Message-State: APzg51C0ZP85BmY2CzzF7R2fwADtzq+vK0KvA1XycJjs8Y2HWOZ//ZQV 2C1xYw3qNRBZ99xWiq1K/3RBxZpkeBE= X-Google-Smtp-Source: ANB0Vdbr7oTxooWF9tm8a3LeT8q5qZX/anDD26gLsEyO9mNY1sEAJAJCZxH0Nw4d2d9RQKlqIvVd7Q== X-Received: by 2002:a0c:af5a:: with SMTP id j26-v6mr5898870qvc.191.1534819893282; Mon, 20 Aug 2018 19:51:33 -0700 (PDT) From: Pavel Zbitskiy To: qemu-devel@nongnu.org Date: Mon, 20 Aug 2018 22:51:02 -0400 Message-Id: <20180821025104.19604-6-pavel.zbitskiy@gmail.com> In-Reply-To: <20180821025104.19604-1-pavel.zbitskiy@gmail.com> References: <20180821025104.19604-1-pavel.zbitskiy@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PATCH 5/7] target/s390x: add EX support for TRT and TRTR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pavel Zbitskiy , david@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, Alexander Graf , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Improves "b213c9f5: target/s390x: Implement TRTR" by introducing the intermediate functions, which are compatible with dx_helper type. Signed-off-by: Pavel Zbitskiy Reviewed-by: David Hildenbrand --- target/s390x/mem_helper.c | 16 +++++++++++ tests/tcg/s390x/Makefile.target | 2 ++ tests/tcg/s390x/exrl-trt.c | 48 +++++++++++++++++++++++++++++++++ tests/tcg/s390x/exrl-trtr.c | 48 +++++++++++++++++++++++++++++++++ 4 files changed, 114 insertions(+) create mode 100644 tests/tcg/s390x/exrl-trt.c create mode 100644 tests/tcg/s390x/exrl-trtr.c diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index c94dbf3fcb..704d0193b5 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1299,12 +1299,26 @@ static inline uint32_t do_helper_trt(CPUS390XState = *env, int len, return 0; } =20 +static uint32_t do_helper_trt_fwd(CPUS390XState *env, uint32_t len, + uint64_t array, uint64_t trans, + uintptr_t ra) +{ + return do_helper_trt(env, len, array, trans, 1, ra); +} + uint32_t HELPER(trt)(CPUS390XState *env, uint32_t len, uint64_t array, uint64_t trans) { return do_helper_trt(env, len, array, trans, 1, GETPC()); } =20 +static uint32_t do_helper_trt_bkwd(CPUS390XState *env, uint32_t len, + uint64_t array, uint64_t trans, + uintptr_t ra) +{ + return do_helper_trt(env, len, array, trans, -1, ra); +} + uint32_t HELPER(trtr)(CPUS390XState *env, uint32_t len, uint64_t array, uint64_t trans) { @@ -2193,12 +2207,14 @@ void HELPER(ex)(CPUS390XState *env, uint32_t ilen, = uint64_t r1, uint64_t addr) typedef uint32_t (*dx_helper)(CPUS390XState *, uint32_t, uint64_t, uint64_t, uintptr_t); static const dx_helper dx[16] =3D { + [0x0] =3D do_helper_trt_bkwd, [0x2] =3D do_helper_mvc, [0x4] =3D do_helper_nc, [0x5] =3D do_helper_clc, [0x6] =3D do_helper_oc, [0x7] =3D do_helper_xc, [0xc] =3D do_helper_tr, + [0xd] =3D do_helper_trt_fwd, }; dx_helper helper =3D dx[opc & 0xf]; =20 diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.tar= get index c800a582e5..7de4376f52 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -3,3 +3,5 @@ CFLAGS+=3D-march=3DzEC12 -m64 TESTS+=3Dhello-s390x TESTS+=3Dcsst TESTS+=3Dipm +TESTS+=3Dexrl-trt +TESTS+=3Dexrl-trtr diff --git a/tests/tcg/s390x/exrl-trt.c b/tests/tcg/s390x/exrl-trt.c new file mode 100644 index 0000000000..3c5323aecb --- /dev/null +++ b/tests/tcg/s390x/exrl-trt.c @@ -0,0 +1,48 @@ +#include +#include + +int main(void) +{ + char op1[] =3D "hello"; + char op2[256]; + uint64_t r1 =3D 0xffffffffffffffffull; + uint64_t r2 =3D 0xffffffffffffffffull; + uint64_t cc; + int i; + + for (i =3D 0; i < 256; i++) { + if (i =3D=3D 0) { + op2[i] =3D 0xaa; + } else { + op2[i] =3D 0; + } + } + asm volatile( + " j 2f\n" + "1: trt 0(1,%[op1]),0(%[op2])\n" + "2: exrl %[op1_len],1b\n" + " lgr %[r1],%%r1\n" + " lgr %[r2],%%r2\n" + " ipm %[cc]\n" + : [r1] "+r" (r1), + [r2] "+r" (r2), + [cc] "=3Dr" (cc) + : [op1] "r" (&op1), + [op1_len] "r" (5), + [op2] "r" (&op2) + : "r1", "r2", "cc"); + cc =3D (cc >> 28) & 3; + if (cc !=3D 2) { + write(1, "bad cc\n", 7); + return 1; + } + if ((char *)r1 !=3D &op1[5]) { + write(1, "bad r1\n", 7); + return 1; + } + if (r2 !=3D 0xffffffffffffffaaull) { + write(1, "bad r2\n", 7); + return 1; + } + return 0; +} diff --git a/tests/tcg/s390x/exrl-trtr.c b/tests/tcg/s390x/exrl-trtr.c new file mode 100644 index 0000000000..c33153ad7e --- /dev/null +++ b/tests/tcg/s390x/exrl-trtr.c @@ -0,0 +1,48 @@ +#include +#include + +int main(void) +{ + char op1[] =3D {0, 1, 2, 3}; + char op2[256]; + uint64_t r1 =3D 0xffffffffffffffffull; + uint64_t r2 =3D 0xffffffffffffffffull; + uint64_t cc; + int i; + + for (i =3D 0; i < 256; i++) { + if (i =3D=3D 1) { + op2[i] =3D 0xbb; + } else { + op2[i] =3D 0; + } + } + asm volatile( + " j 2f\n" + "1: trtr 3(1,%[op1]),0(%[op2])\n" + "2: exrl %[op1_len],1b\n" + " lgr %[r1],%%r1\n" + " lgr %[r2],%%r2\n" + " ipm %[cc]\n" + : [r1] "+r" (r1), + [r2] "+r" (r2), + [cc] "=3Dr" (cc) + : [op1] "r" (&op1), + [op1_len] "r" (3), + [op2] "r" (&op2) + : "r1", "r2", "cc"); + cc =3D (cc >> 28) & 3; + if (cc !=3D 1) { + write(1, "bad cc\n", 7); + return 1; + } + if ((char *)r1 !=3D &op1[1]) { + write(1, "bad r1\n", 7); + return 1; + } + if (r2 !=3D 0xffffffffffffffbbull) { + write(1, "bad r2\n", 7); + return 1; + } + return 0; +} --=20 2.18.0