From nobody Wed Nov 5 10:16:40 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15337386247311019.9696921215884; Wed, 8 Aug 2018 07:30:24 -0700 (PDT) Received: from localhost ([::1]:44083 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnPTe-0005tA-G0 for importer@patchew.org; Wed, 08 Aug 2018 10:30:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38015) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnPIr-0003J4-L9 for qemu-devel@nongnu.org; Wed, 08 Aug 2018 10:19:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fnPIn-0001hN-HQ for qemu-devel@nongnu.org; Wed, 08 Aug 2018 10:19:09 -0400 Received: from mx2.suse.de ([195.135.220.15]:56864 helo=mx1.suse.de) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fnPIn-0001ep-67 for qemu-devel@nongnu.org; Wed, 08 Aug 2018 10:19:05 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 19FE4AE8E for ; Wed, 8 Aug 2018 14:19:03 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de From: Johannes Thumshirn To: qemu-devel@nongnu.org Date: Wed, 8 Aug 2018 16:16:57 +0200 Message-Id: <20180808141700.21333-2-jthumshirn@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180808141700.21333-1-jthumshirn@suse.de> References: <20180808141700.21333-1-jthumshirn@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] [fuzzy] X-Received-From: 195.135.220.15 X-Mailman-Approved-At: Wed, 08 Aug 2018 10:28:23 -0400 Subject: [Qemu-devel] [PATCH 1/4] Add MEN Chameleon Bus emulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Johannes Thumshirn Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The MEN Chameleon Bus (MCB) is an on-chip bus system exposing IP Cores of an FPGA to a outside bus system like PCIe. Signed-off-by: Johannes Thumshirn --- default-configs/pci.mak | 1 + hw/Makefile.objs | 1 + hw/mcb/Makefile.objs | 1 + hw/mcb/mcb.c | 180 ++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/mcb/mcb.h | 104 ++++++++++++++++++++++++++++ 5 files changed, 287 insertions(+) create mode 100644 hw/mcb/Makefile.objs create mode 100644 hw/mcb/mcb.c create mode 100644 include/hw/mcb/mcb.h diff --git a/default-configs/pci.mak b/default-configs/pci.mak index de53d20ac62c..341498615d6e 100644 --- a/default-configs/pci.mak +++ b/default-configs/pci.mak @@ -46,3 +46,4 @@ CONFIG_VGA=3Dy CONFIG_VGA_PCI=3Dy CONFIG_IVSHMEM_DEVICE=3D$(CONFIG_IVSHMEM) CONFIG_ROCKER=3Dy +CONFIG_MCB=3Dy diff --git a/hw/Makefile.objs b/hw/Makefile.objs index a19c1417ed3e..96ab195a24b9 100644 --- a/hw/Makefile.objs +++ b/hw/Makefile.objs @@ -17,6 +17,7 @@ devices-dirs-$(CONFIG_IPACK) +=3D ipack/ devices-dirs-$(CONFIG_IPMI) +=3D ipmi/ devices-dirs-$(CONFIG_SOFTMMU) +=3D isa/ devices-dirs-$(CONFIG_SOFTMMU) +=3D misc/ +devices-dirs-$(CONFIG_MCB) +=3D mcb/ devices-dirs-$(CONFIG_SOFTMMU) +=3D net/ devices-dirs-$(CONFIG_SOFTMMU) +=3D rdma/ devices-dirs-$(CONFIG_SOFTMMU) +=3D nvram/ diff --git a/hw/mcb/Makefile.objs b/hw/mcb/Makefile.objs new file mode 100644 index 000000000000..32427c987c44 --- /dev/null +++ b/hw/mcb/Makefile.objs @@ -0,0 +1 @@ +common-obj-$(CONFIG_MCB) +=3D mcb.o diff --git a/hw/mcb/mcb.c b/hw/mcb/mcb.c new file mode 100644 index 000000000000..36f2688b0803 --- /dev/null +++ b/hw/mcb/mcb.c @@ -0,0 +1,180 @@ +/* + * QEMU MEN Chameleon Bus emulation + * + * Copyright (C) 2016 Johannes Thumshirn + * + * This code is licensed under the GNU GPL v2 or (at your opinion) any + * later version + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/mcb/mcb.h" + +ChameleonDeviceDescriptor *mcb_new_chameleon_descriptor(MCBus *bus, uint8_= t id, + uint8_t rev, + uint8_t var, + uint32_t size) +{ + BusChild *kid; + ChameleonDeviceDescriptor *gdd; + uint32_t reg1 =3D 0; + uint32_t offset =3D 0x200; + uint32_t end =3D 0; + + gdd =3D g_new0(ChameleonDeviceDescriptor, 1); + if (!gdd) { + return NULL; + } + + reg1 |=3D GDD_DEV(id); + reg1 |=3D GDD_DTY(CHAMELEON_DTYPE_GENERAL); + reg1 |=3D GDD_REV(rev); + reg1 |=3D GDD_VAR(var); + gdd->reg1 =3D cpu_to_le32(reg1); + + QTAILQ_FOREACH(kid, &BUS(bus)->children, sibling) { + DeviceState *qdev =3D kid->child; + MCBDevice *mdev =3D MCB_DEVICE(qdev); + + if (mdev->gdd) { + offset =3D mdev->gdd->offset; + end =3D offset + mdev->gdd->size; + } + } + + gdd->offset =3D offset + end; + gdd->size =3D size; + + return gdd; +} + +static void mcb_irq_handler(void *opaque, int irq_num, int level) +{ + MCBDevice *dev =3D opaque; + MCBus *bus =3D MCB_BUS(qdev_get_parent_bus(DEVICE(dev))); + + if (bus->set_irq) { + bus->set_irq(dev, irq_num, level); + } +} + +qemu_irq mcb_allocate_irq(MCBDevice *dev) +{ + int irq =3D 0; + return qemu_allocate_irq(mcb_irq_handler, dev, irq); +} + +MCBDevice *mcb_device_find(MCBus *bus, hwaddr addr) +{ + BusChild *kid; + uint32_t start; + uint32_t end; + + QTAILQ_FOREACH(kid, &BUS(bus)->children, sibling) { + DeviceState *qdev =3D kid->child; + MCBDevice *mdev =3D MCB_DEVICE(qdev); + + start =3D mdev->gdd->offset; + end =3D start + mdev->gdd->size; + + if (addr >=3D start && addr <=3D end) { + return mdev; + } + } + return NULL; +} + +void mcb_bus_new_inplace(MCBus *bus, size_t bus_size, + DeviceState *parent, + const char *name, uint8_t slots, + qemu_irq_handler handler) +{ + qbus_create_inplace(bus, bus_size, TYPE_MCB_BUS, parent, name); + bus->n_slots =3D slots; + bus->set_irq =3D handler; +} + +static void mcb_device_realize(DeviceState *dev, Error **errp) +{ + MCBDevice *mdev =3D MCB_DEVICE(dev); + MCBus *bus =3D MCB_BUS(qdev_get_parent_bus(dev)); + MCBDeviceClass *k =3D MCB_DEVICE_GET_CLASS(dev); + + if (mdev->slot < 0) { + mdev->slot =3D bus->free_slot; + } + + if (mdev->slot >=3D bus->n_slots) { + error_setg(errp, "Only %" PRIu8 " slots available.", bus->n_slots); + return; + } + bus->free_slot =3D mdev->slot + 1; + + mdev->irq =3D qemu_allocate_irqs(bus->set_irq, mdev, 1); + + k->realize(dev, errp); +} + +static void mcb_device_unrealize(DeviceState *dev, Error **errp) +{ + MCBDevice *mdev =3D MCB_DEVICE(dev); + MCBDeviceClass *k =3D MCB_DEVICE_GET_CLASS(dev); + Error *err =3D NULL; + + if (k->unrealize) { + k->unrealize(dev, &err); + error_propagate(errp, err); + return; + } + + qemu_free_irqs(mdev->irq, 1); +} + +static Property mcb_device_props[] =3D { + DEFINE_PROP_INT32("slot", MCBDevice, slot, -1), + DEFINE_PROP_END_OF_LIST() +}; + +static void mcb_device_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *k =3D DEVICE_CLASS(klass); + + set_bit(DEVICE_CATEGORY_INPUT, k->categories); + k->bus_type =3D TYPE_MCB_BUS; + k->realize =3D mcb_device_realize; + k->unrealize =3D mcb_device_unrealize; + k->props =3D mcb_device_props; +} + +const VMStateDescription vmstate_mcb_device =3D { + .name =3D "mcb_device", + .version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_INT32(slot, MCBDevice), + VMSTATE_END_OF_LIST() + } +}; + +static const TypeInfo mcb_device_info =3D { + .name =3D TYPE_MCB_DEVICE, + .parent =3D TYPE_DEVICE, + .instance_size =3D sizeof(MCBDevice), + .class_size =3D sizeof(MCBDeviceClass), + .class_init =3D mcb_device_class_init, + .abstract =3D true, +}; + +static const TypeInfo mcb_bus_info =3D { + .name =3D TYPE_MCB_BUS, + .parent =3D TYPE_BUS, + .instance_size =3D sizeof(MCBus), +}; + +static void mcb_register_types(void) +{ + type_register_static(&mcb_device_info); + type_register_static(&mcb_bus_info); +} + +type_init(mcb_register_types); diff --git a/include/hw/mcb/mcb.h b/include/hw/mcb/mcb.h new file mode 100644 index 000000000000..64a425b24f8c --- /dev/null +++ b/include/hw/mcb/mcb.h @@ -0,0 +1,104 @@ +/* + * QEMU MEN Chameleon Bus emulation + * + * Copyright (C) 2016 Johannes Thumshirn + * + * This code is licensed under the GNU GPL v2 or (at your opinion) any + * later version + */ + +#ifndef QEMU_MCB_H +#define QEMU_MCB_H + +#include "hw/qdev.h" + +#define CHAMELEON_DTYPE_GENERAL 0x0 +#define CHAMELEON_DTYPE_END 0xf + +typedef struct { + uint32_t reg1; + uint32_t reg2; + uint32_t offset; + uint32_t size; +} ChameleonDeviceDescriptor; + +#define GDD_DEV(x) (((x) & 0x3ff) << 18) +#define GDD_DTY(x) (((x) & 0xf) << 28) +#define GDD_REV(x) (((x) & 0x3f) << 5) +#define GDD_VAR(x) (((x) & 0x3f) << 11) + +/* GDD Register 1 fields */ +#define GDD_IRQ(x) ((x) & 0x1f) + +/* GDD Register 2 fields */ +#define GDD_BAR(x) ((x) & 0x7) +#define GDD_INS(x) (((x) >> 3) & 0x3f) +#define GDD_GRP(x) (((x) >> 9) & 0x3f) + +typedef struct MCBus MCBus; + +#define TYPE_MCB_BUS "MEN Chameleon Bus" +#define MCB_BUS(obj) OBJECT_CHECK(MCBus, (obj), TYPE_MCB_BUS) + +struct MCBus { + /*< private >*/ + BusState parent_obj; + + uint8_t n_slots; + uint8_t free_slot; + qemu_irq_handler set_irq; + MemoryRegion mmio_region; +}; + +typedef struct MCBDevice MCBDevice; +typedef struct MCBDeviceClass MCBDeviceClass; + +#define TYPE_MCB_DEVICE "mcb-device" +#define MCB_DEVICE(obj) \ + OBJECT_CHECK(MCBDevice, (obj), TYPE_MCB_DEVICE) +#define MCB_DEVICE_CLASS(klass) \ + OBJECT_CLASS_CHECK(MCBDeviceClass, (klass), TYPE_MCB_DEVICE) +#define MCB_DEVICE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(MCBDeviceClass, (obj), TYPE_MCB_DEVICE) + +struct MCBDeviceClass { + /*< private >*/ + DeviceClass parent_class; + /*< public >*/ + + + DeviceRealize realize; + DeviceUnrealize unrealize; +}; + +struct MCBDevice { + /*< private >*/ + DeviceState parent_obj; + /*< public >*/ + + qemu_irq *irq; + ChameleonDeviceDescriptor *gdd; + int slot; + + uint8_t rev; + uint8_t var; +}; + +extern const VMStateDescription vmstate_mcb_device; + +ChameleonDeviceDescriptor *mcb_new_chameleon_descriptor(MCBus *bus, uint8_= t id, + uint8_t rev, + uint8_t var, + uint32_t size); + +#define VMSTATE_MCB_DEVICE(_field, _state) \ + VMSTATE_STRUCT(_field, _state, 1, vmstate_mcb_device, MCBDevice) + +MCBDevice *mcb_device_find(MCBus *bus, hwaddr addr); +void mcb_bus_new_inplace(MCBus *bus, size_t bus_size, + DeviceState *parent, + const char *name, uint8_t slots, + qemu_irq_handler handler); + +qemu_irq mcb_allocate_irq(MCBDevice *dev); +#endif --=20 2.16.4