From nobody Wed Nov 5 08:14:58 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1533559151147970.3736368415131; Mon, 6 Aug 2018 05:39:11 -0700 (PDT) Received: from localhost ([::1]:33913 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fmemw-0005sC-Qn for importer@patchew.org; Mon, 06 Aug 2018 08:39:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38425) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fmej2-00033k-L8 for qemu-devel@nongnu.org; Mon, 06 Aug 2018 08:35:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fmej1-0006g3-Nm for qemu-devel@nongnu.org; Mon, 06 Aug 2018 08:35:04 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:44086) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fmeiz-0006ZZ-75; Mon, 06 Aug 2018 08:35:01 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fmeis-0000xh-Ad; Mon, 06 Aug 2018 13:34:54 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 6 Aug 2018 13:34:44 +0100 Message-Id: <20180806123445.1459-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180806123445.1459-1-peter.maydell@linaro.org> References: <20180806123445.1459-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH for-3.0 v2 4/5] hw/intc/arm_gicv3_common: Move post_load hooks to top-level VMSD X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Shannon Zhao , Shannon Zhao , Juan Quintela , "Dr . David Alan Gilbert" , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Contrary to the the impression given in docs/devel/migration.rst, the migration code does not run the pre_load hook for a subsection unless the subsection appears on the wire, and so this is not a place where you can set the default value for state for the "subsection not present" case. Instead this needs to be done in a pre_load hook for whatever is the parent VMSD of the subsection. We got this wrong in two of the subsection definitions in the GICv3 migration structs; fix this. Signed-off-by: Peter Maydell Reviewed-by: Dr. David Alan Gilbert Reviewed-by: Juan Quintela --- hw/intc/arm_gicv3_common.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index e1a8999cf5b..8175889f1e7 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -73,7 +73,7 @@ static const VMStateDescription vmstate_gicv3_cpu_virt = =3D { } }; =20 -static int icc_sre_el1_reg_pre_load(void *opaque) +static int vmstate_gicv3_cpu_pre_load(void *opaque) { GICv3CPUState *cs =3D opaque; =20 @@ -97,7 +97,6 @@ const VMStateDescription vmstate_gicv3_cpu_sre_el1 =3D { .name =3D "arm_gicv3_cpu/sre_el1", .version_id =3D 1, .minimum_version_id =3D 1, - .pre_load =3D icc_sre_el1_reg_pre_load, .needed =3D icc_sre_el1_reg_needed, .fields =3D (VMStateField[]) { VMSTATE_UINT64(icc_sre_el1, GICv3CPUState), @@ -109,6 +108,7 @@ static const VMStateDescription vmstate_gicv3_cpu =3D { .name =3D "arm_gicv3_cpu", .version_id =3D 1, .minimum_version_id =3D 1, + .pre_load =3D vmstate_gicv3_cpu_pre_load, .fields =3D (VMStateField[]) { VMSTATE_UINT32(level, GICv3CPUState), VMSTATE_UINT32(gicr_ctlr, GICv3CPUState), @@ -139,7 +139,7 @@ static const VMStateDescription vmstate_gicv3_cpu =3D { } }; =20 -static int gicv3_gicd_no_migration_shift_bug_pre_load(void *opaque) +static int gicv3_pre_load(void *opaque) { GICv3State *cs =3D opaque; =20 @@ -210,7 +210,6 @@ const VMStateDescription vmstate_gicv3_gicd_no_migratio= n_shift_bug =3D { .version_id =3D 1, .minimum_version_id =3D 1, .needed =3D needed_always, - .pre_load =3D gicv3_gicd_no_migration_shift_bug_pre_load, .post_load =3D gicv3_gicd_no_migration_shift_bug_post_load, .fields =3D (VMStateField[]) { VMSTATE_BOOL(gicd_no_migration_shift_bug, GICv3State), @@ -222,6 +221,7 @@ static const VMStateDescription vmstate_gicv3 =3D { .name =3D "arm_gicv3", .version_id =3D 1, .minimum_version_id =3D 1, + .pre_load =3D gicv3_pre_load, .pre_save =3D gicv3_pre_save, .post_load =3D gicv3_post_load, .priority =3D MIG_PRI_GICV3, --=20 2.17.1