From nobody Mon Feb 9 08:57:17 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1533307818138419.11284429225816; Fri, 3 Aug 2018 07:50:18 -0700 (PDT) Received: from localhost ([::1]:51731 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flbPE-0004K2-Qm for importer@patchew.org; Fri, 03 Aug 2018 10:50:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49851) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flbMh-0002iZ-Cv for qemu-devel@nongnu.org; Fri, 03 Aug 2018 10:47:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1flbMe-0007f7-Ea for qemu-devel@nongnu.org; Fri, 03 Aug 2018 10:47:37 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:32946 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1flbMZ-0007bg-MH; Fri, 03 Aug 2018 10:47:31 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0690D818A6A9; Fri, 3 Aug 2018 14:47:31 +0000 (UTC) Received: from localhost (ovpn-117-231.ams2.redhat.com [10.36.117.231]) by smtp.corp.redhat.com (Postfix) with ESMTP id A67BA215670D; Fri, 3 Aug 2018 14:47:30 +0000 (UTC) From: Stefan Hajnoczi To: Date: Fri, 3 Aug 2018 15:47:16 +0100 Message-Id: <20180803144721.17036-2-stefanha@redhat.com> In-Reply-To: <20180803144721.17036-1-stefanha@redhat.com> References: <20180803144721.17036-1-stefanha@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Fri, 03 Aug 2018 14:47:31 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Fri, 03 Aug 2018 14:47:31 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'stefanha@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v4 1/6] hw/arm: make bitbanded IO optional on ARMv7-M X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , jim@groklearning.com, mail@steffen-goertz.de, Su Hang , ilg@livius.net, Alistair Francis , Subbaraya Sundeep , Steffen Gortz , qemu-arm@nongnu.org, Joel Stanley , Stefan Hajnoczi , jusual@mail.ru Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some ARM CPUs have bitbanded IO, a memory region that allows convenient bit access via 32-bit memory loads/stores. This eliminates the need for read-modify-update instruction sequences. This patch makes this optional feature an ARMv7MState qdev property, allowing boards to choose whether they want bitbanding or not. Status of boards: * iotkit (Cortex M33), no bitband * mps2 (Cortex M3), bitband * msf2 (Cortex M3), bitband * stellaris (Cortex M3), bitband * stm32f205 (Cortex M3), bitband As a side-effect of this patch, Peter Maydell noted that the Ethernet controller on mps2 board is now accessible. Previously they were hidden by the bitband region (which does not exist on the real board). Signed-off-by: Stefan Hajnoczi Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/armv7m.h | 2 ++ hw/arm/armv7m.c | 37 ++++++++++++++++++++----------------- hw/arm/mps2.c | 1 + hw/arm/msf2-soc.c | 1 + hw/arm/stellaris.c | 1 + hw/arm/stm32f205_soc.c | 1 + 6 files changed, 26 insertions(+), 17 deletions(-) diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index 78308d1484..2ba24953b6 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -43,6 +43,7 @@ typedef struct { * devices will be automatically layered on top of this view.) * + Property "idau": IDAU interface (forwarded to CPU object) * + Property "init-svtor": secure VTOR reset value (forwarded to CPU obje= ct) + * + Property "enable-bitband": expose bitbanded IO */ typedef struct ARMv7MState { /*< private >*/ @@ -63,6 +64,7 @@ typedef struct ARMv7MState { MemoryRegion *board_memory; Object *idau; uint32_t init_svtor; + bool enable_bitband; } ARMv7MState; =20 #endif diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 6b07666057..878613994d 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -211,25 +211,27 @@ static void armv7m_realize(DeviceState *dev, Error **= errp) memory_region_add_subregion(&s->container, 0xe000e000, sysbus_mmio_get_region(sbd, 0)); =20 - for (i =3D 0; i < ARRAY_SIZE(s->bitband); i++) { - Object *obj =3D OBJECT(&s->bitband[i]); - SysBusDevice *sbd =3D SYS_BUS_DEVICE(&s->bitband[i]); + if (s->enable_bitband) { + for (i =3D 0; i < ARRAY_SIZE(s->bitband); i++) { + Object *obj =3D OBJECT(&s->bitband[i]); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(&s->bitband[i]); =20 - object_property_set_int(obj, bitband_input_addr[i], "base", &err); - if (err !=3D NULL) { - error_propagate(errp, err); - return; - } - object_property_set_link(obj, OBJECT(s->board_memory), - "source-memory", &error_abort); - object_property_set_bool(obj, true, "realized", &err); - if (err !=3D NULL) { - error_propagate(errp, err); - return; - } + object_property_set_int(obj, bitband_input_addr[i], "base", &e= rr); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } + object_property_set_link(obj, OBJECT(s->board_memory), + "source-memory", &error_abort); + object_property_set_bool(obj, true, "realized", &err); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } =20 - memory_region_add_subregion(&s->container, bitband_output_addr[i], - sysbus_mmio_get_region(sbd, 0)); + memory_region_add_subregion(&s->container, bitband_output_addr= [i], + sysbus_mmio_get_region(sbd, 0)); + } } } =20 @@ -239,6 +241,7 @@ static Property armv7m_properties[] =3D { MemoryRegion *), DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Objec= t *), DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0), + DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index c3946da317..0a0ae867d9 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -186,6 +186,7 @@ static void mps2_common_init(MachineState *machine) g_assert_not_reached(); } qdev_prop_set_string(armv7m, "cpu-type", machine->cpu_type); + qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&mms->armv7m), OBJECT(system_memory), "memory", &error_abort); object_property_set_bool(OBJECT(&mms->armv7m), true, "realized", diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index dbefade644..2702e90b45 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -117,6 +117,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Er= ror **errp) armv7m =3D DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 81); qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); + qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory(= )), "memory", &error_abort); object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index dc521b4a5a..6c69ce79b2 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1304,6 +1304,7 @@ static void stellaris_init(MachineState *ms, stellari= s_board_info *board) nvic =3D qdev_create(NULL, TYPE_ARMV7M); qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES); qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type); + qdev_prop_set_bit(nvic, "enable-bitband", true); object_property_set_link(OBJECT(nvic), OBJECT(get_system_memory()), "memory", &error_abort); /* This will exit with an error if the user passed us a bad cpu_type */ diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index c486d06a8b..980e5af13c 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -109,6 +109,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc,= Error **errp) armv7m =3D DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 96); qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); + qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory(= )), "memory", &error_abort); object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); --=20 2.17.1