From nobody Wed Nov 5 05:08:44 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 153322518400770.60655694876198; Thu, 2 Aug 2018 08:53:04 -0700 (PDT) Received: from localhost ([::1]:46588 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flFuL-0002gX-OA for importer@patchew.org; Thu, 02 Aug 2018 11:52:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58175) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flFtK-0002Pa-6V for qemu-devel@nongnu.org; Thu, 02 Aug 2018 11:51:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1flFtJ-0006Rj-CZ for qemu-devel@nongnu.org; Thu, 02 Aug 2018 11:51:54 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:43918) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1flFtJ-0006RS-3f for qemu-devel@nongnu.org; Thu, 02 Aug 2018 11:51:53 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1flFtG-0006Ou-QL; Thu, 02 Aug 2018 16:51:50 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 2 Aug 2018 16:51:46 +0100 Message-Id: <20180802155147.1863-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180802155147.1863-1-peter.maydell@linaro.org> References: <20180802155147.1863-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 1/2] hw/display/vga-isa-mm: Convert away from old_mmio X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Gerd Hoffmann , Aleksandar Markovic , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Convert the vga-isa-mm device away from the old_mmio MemoryRegion accessors. This device is only used by the MIPS 'jazz' boards "magnum" and "pica61". Signed-off-by: Peter Maydell Reviewed-by: Herv=C3=A9 Poussineau Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Herv=C3=A9 Poussineau --- hw/display/vga-isa-mm.c | 60 +++++++++-------------------------------- 1 file changed, 13 insertions(+), 47 deletions(-) diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c index 232216cad0a..215e6497190 100644 --- a/hw/display/vga-isa-mm.c +++ b/hw/display/vga-isa-mm.c @@ -36,64 +36,30 @@ typedef struct ISAVGAMMState { } ISAVGAMMState; =20 /* Memory mapped interface */ -static uint32_t vga_mm_readb (void *opaque, hwaddr addr) +static uint64_t vga_mm_read(void *opaque, hwaddr addr, unsigned size) { ISAVGAMMState *s =3D opaque; =20 - return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff; + return vga_ioport_read(&s->vga, addr >> s->it_shift) & + MAKE_64BIT_MASK(0, size * 8); } =20 -static void vga_mm_writeb (void *opaque, - hwaddr addr, uint32_t value) +static void vga_mm_write(void *opaque, hwaddr addr, uint64_t value, + unsigned size) { ISAVGAMMState *s =3D opaque; =20 - vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff); -} - -static uint32_t vga_mm_readw (void *opaque, hwaddr addr) -{ - ISAVGAMMState *s =3D opaque; - - return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff; -} - -static void vga_mm_writew (void *opaque, - hwaddr addr, uint32_t value) -{ - ISAVGAMMState *s =3D opaque; - - vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff); -} - -static uint32_t vga_mm_readl (void *opaque, hwaddr addr) -{ - ISAVGAMMState *s =3D opaque; - - return vga_ioport_read(&s->vga, addr >> s->it_shift); -} - -static void vga_mm_writel (void *opaque, - hwaddr addr, uint32_t value) -{ - ISAVGAMMState *s =3D opaque; - - vga_ioport_write(&s->vga, addr >> s->it_shift, value); + vga_ioport_write(&s->vga, addr >> s->it_shift, + value & MAKE_64BIT_MASK(0, size * 8)); } =20 static const MemoryRegionOps vga_mm_ctrl_ops =3D { - .old_mmio =3D { - .read =3D { - vga_mm_readb, - vga_mm_readw, - vga_mm_readl, - }, - .write =3D { - vga_mm_writeb, - vga_mm_writew, - vga_mm_writel, - }, - }, + .read =3D vga_mm_read, + .write =3D vga_mm_write, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 4, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 4, .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 --=20 2.17.1 From nobody Wed Nov 5 05:08:44 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1533225366696827.4726510395668; Thu, 2 Aug 2018 08:56:06 -0700 (PDT) Received: from localhost ([::1]:46601 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flFxN-00042B-E7 for importer@patchew.org; Thu, 02 Aug 2018 11:56:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flFw5-00039J-7d for qemu-devel@nongnu.org; Thu, 02 Aug 2018 11:54:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1flFw3-0007mq-Lv for qemu-devel@nongnu.org; Thu, 02 Aug 2018 11:54:45 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:43940) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1flFw3-0007lv-Ab for qemu-devel@nongnu.org; Thu, 02 Aug 2018 11:54:43 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1flFtH-0006PC-N9; Thu, 02 Aug 2018 16:51:51 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 2 Aug 2018 16:51:47 +0100 Message-Id: <20180802155147.1863-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180802155147.1863-1-peter.maydell@linaro.org> References: <20180802155147.1863-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 2/2] hw/pci-host/bonito: Move away from old_mmio accessors X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Gerd Hoffmann , Aleksandar Markovic , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RDMRC_1 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Move away from the old_mmio MemoryRegion accessors in the bonito pci controller. This device is used only in the MIPS "fulong2e" machine. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/pci-host/bonito.c | 145 +++++-------------------------------------- 1 file changed, 15 insertions(+), 130 deletions(-) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 2d25e9bf7ca..9868e2eccc6 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -460,8 +460,8 @@ static uint32_t bonito_sbridge_pciaddr(void *opaque, hw= addr addr) return pciaddr; } =20 -static void bonito_spciconf_writeb(void *opaque, hwaddr addr, - uint32_t val) +static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) { PCIBonitoState *s =3D opaque; PCIDevice *d =3D PCI_DEVICE(s); @@ -469,34 +469,8 @@ static void bonito_spciconf_writeb(void *opaque, hwadd= r addr, uint32_t pciaddr; uint16_t status; =20 - DPRINTF("bonito_spciconf_writeb "TARGET_FMT_plx" val %x\n", addr, val); - pciaddr =3D bonito_sbridge_pciaddr(s, addr); - - if (pciaddr =3D=3D 0xffffffff) { - return; - } - - /* set the pci address in s->config_reg */ - phb->config_reg =3D (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val & 0xff, 1); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status =3D pci_get_word(d->config + PCI_STATUS); - status &=3D ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABOR= T); - pci_set_word(d->config + PCI_STATUS, status); -} - -static void bonito_spciconf_writew(void *opaque, hwaddr addr, - uint32_t val) -{ - PCIBonitoState *s =3D opaque; - PCIDevice *d =3D PCI_DEVICE(s); - PCIHostState *phb =3D PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_writew "TARGET_FMT_plx" val %x\n", addr, val); - assert((addr & 0x1) =3D=3D 0); + DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %x\n", + addr, size, val); =20 pciaddr =3D bonito_sbridge_pciaddr(s, addr); =20 @@ -506,7 +480,7 @@ static void bonito_spciconf_writew(void *opaque, hwaddr= addr, =20 /* set the pci address in s->config_reg */ phb->config_reg =3D (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val, 2); + pci_data_write(phb->bus, phb->config_reg, val, size); =20 /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ status =3D pci_get_word(d->config + PCI_STATUS); @@ -514,8 +488,7 @@ static void bonito_spciconf_writew(void *opaque, hwaddr= addr, pci_set_word(d->config + PCI_STATUS, status); } =20 -static void bonito_spciconf_writel(void *opaque, hwaddr addr, - uint32_t val) +static uint64_t bonito_spciconf_read(void *opaque, hwaddr addr, unsigned s= ize) { PCIBonitoState *s =3D opaque; PCIDevice *d =3D PCI_DEVICE(s); @@ -523,38 +496,12 @@ static void bonito_spciconf_writel(void *opaque, hwad= dr addr, uint32_t pciaddr; uint16_t status; =20 - DPRINTF("bonito_spciconf_writel "TARGET_FMT_plx" val %x\n", addr, val); - assert((addr & 0x3) =3D=3D 0); + DPRINTF("bonito_spciconf_read "TARGET_FMT_plx" size %d\n", addr, size); =20 pciaddr =3D bonito_sbridge_pciaddr(s, addr); =20 if (pciaddr =3D=3D 0xffffffff) { - return; - } - - /* set the pci address in s->config_reg */ - phb->config_reg =3D (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val, 4); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status =3D pci_get_word(d->config + PCI_STATUS); - status &=3D ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABOR= T); - pci_set_word(d->config + PCI_STATUS, status); -} - -static uint32_t bonito_spciconf_readb(void *opaque, hwaddr addr) -{ - PCIBonitoState *s =3D opaque; - PCIDevice *d =3D PCI_DEVICE(s); - PCIHostState *phb =3D PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readb "TARGET_FMT_plx"\n", addr); - pciaddr =3D bonito_sbridge_pciaddr(s, addr); - - if (pciaddr =3D=3D 0xffffffff) { - return 0xff; + return MAKE_64BIT_MASK(0, size * 8); } =20 /* set the pci address in s->config_reg */ @@ -565,79 +512,17 @@ static uint32_t bonito_spciconf_readb(void *opaque, h= waddr addr) status &=3D ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABOR= T); pci_set_word(d->config + PCI_STATUS, status); =20 - return pci_data_read(phb->bus, phb->config_reg, 1); -} - -static uint32_t bonito_spciconf_readw(void *opaque, hwaddr addr) -{ - PCIBonitoState *s =3D opaque; - PCIDevice *d =3D PCI_DEVICE(s); - PCIHostState *phb =3D PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readw "TARGET_FMT_plx"\n", addr); - assert((addr & 0x1) =3D=3D 0); - - pciaddr =3D bonito_sbridge_pciaddr(s, addr); - - if (pciaddr =3D=3D 0xffffffff) { - return 0xffff; - } - - /* set the pci address in s->config_reg */ - phb->config_reg =3D (pciaddr) | (1u << 31); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status =3D pci_get_word(d->config + PCI_STATUS); - status &=3D ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABOR= T); - pci_set_word(d->config + PCI_STATUS, status); - - return pci_data_read(phb->bus, phb->config_reg, 2); -} - -static uint32_t bonito_spciconf_readl(void *opaque, hwaddr addr) -{ - PCIBonitoState *s =3D opaque; - PCIDevice *d =3D PCI_DEVICE(s); - PCIHostState *phb =3D PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readl "TARGET_FMT_plx"\n", addr); - assert((addr & 0x3) =3D=3D 0); - - pciaddr =3D bonito_sbridge_pciaddr(s, addr); - - if (pciaddr =3D=3D 0xffffffff) { - return 0xffffffff; - } - - /* set the pci address in s->config_reg */ - phb->config_reg =3D (pciaddr) | (1u << 31); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status =3D pci_get_word(d->config + PCI_STATUS); - status &=3D ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABOR= T); - pci_set_word(d->config + PCI_STATUS, status); - - return pci_data_read(phb->bus, phb->config_reg, 4); + return pci_data_read(phb->bus, phb->config_reg, size); } =20 /* south bridge PCI configure space. 0x1fe8 0000 - 0x1fef ffff */ static const MemoryRegionOps bonito_spciconf_ops =3D { - .old_mmio =3D { - .read =3D { - bonito_spciconf_readb, - bonito_spciconf_readw, - bonito_spciconf_readl, - }, - .write =3D { - bonito_spciconf_writeb, - bonito_spciconf_writew, - bonito_spciconf_writel, - }, - }, + .read =3D bonito_spciconf_read, + .write =3D bonito_spciconf_write, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 4, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 4, .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 --=20 2.17.1