From nobody Wed Feb 11 03:25:54 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1532686268791484.976969890256; Fri, 27 Jul 2018 03:11:08 -0700 (PDT) Received: from localhost ([::1]:40126 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fizhd-0008Le-Pg for importer@patchew.org; Fri, 27 Jul 2018 06:10:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58396) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fizSm-0003vY-9u for qemu-devel@nongnu.org; Fri, 27 Jul 2018 05:55:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fizSi-0006N8-Aw for qemu-devel@nongnu.org; Fri, 27 Jul 2018 05:55:08 -0400 Received: from greensocs.com ([193.104.36.180]:47526) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fizSZ-00069I-18; Fri, 27 Jul 2018 05:54:55 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id 8594A44A0F6; Fri, 27 Jul 2018 11:54:50 +0200 (CEST) Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zC4pEp7RQr7p; Fri, 27 Jul 2018 11:54:49 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id A60584434A7; Fri, 27 Jul 2018 11:54:48 +0200 (CEST) Received: from michell-laptop.bar.greensocs.com (antfield.tima.u-ga.fr [147.171.129.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: luc.michel@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id 20CB9443485; Fri, 27 Jul 2018 11:54:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532685290; bh=cHsBGH+B8QsVcvDWbU048HeIcJif0GXd7IS1ZEW5Egw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=BXSfjHLN2HjhquaZmuf2m+SpHbvmTDUF4uSIALRLa53nblcEJn9ynLDasibf2PRm0 0fQ1kKL8z2us5Vc2jFb+olFB5PWRgtT6O6xMVSNm0NH7oZc1oqmCXIJCOhr1kwsk24 tQbzM3+Q1/vO+mXmUeYWmmvhKjfWTpq24//+vucE= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=v1yHMrwP; dkim=pass (1024-bit key) header.d=greensocs.com header.b=v1yHMrwP DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532685288; bh=cHsBGH+B8QsVcvDWbU048HeIcJif0GXd7IS1ZEW5Egw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=v1yHMrwPgUdTbK8x9bUJMWw+buVPTjtj7i+mLWdNVWZWZYneUJLusWB2Mh57lLNWX vXHybOZtLLvLcKEt1opjp9dHub3azHsmGXzXwyoDcYh75QwMPSdMcqSJeYehFMEaIC hmtUrADd5PDcU0qTqeyVU1ZqZ9ypRxWw8Mqx1yZk= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532685288; bh=cHsBGH+B8QsVcvDWbU048HeIcJif0GXd7IS1ZEW5Egw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=v1yHMrwPgUdTbK8x9bUJMWw+buVPTjtj7i+mLWdNVWZWZYneUJLusWB2Mh57lLNWX vXHybOZtLLvLcKEt1opjp9dHub3azHsmGXzXwyoDcYh75QwMPSdMcqSJeYehFMEaIC hmtUrADd5PDcU0qTqeyVU1ZqZ9ypRxWw8Mqx1yZk= From: Luc Michel To: qemu-devel@nongnu.org Date: Fri, 27 Jul 2018 11:54:15 +0200 Message-Id: <20180727095421.386-15-luc.michel@greensocs.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180727095421.386-1-luc.michel@greensocs.com> References: <20180727095421.386-1-luc.michel@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [PATCH v5 14/20] intc/arm_gic: Wire the vCPU interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , mark.burton@greensocs.com, saipava@xilinx.com, edgari@xilinx.com, qemu-arm@nongnu.org, Jan Kiszka , Luc Michel Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (found 2 invalid signatures) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the read/write functions to handle accesses to the vCPU interface. Those accesses are forwarded to the real CPU interface, with the CPU id being converted to the corresponding vCPU id (vCPU id =3D CPU id + GIC_NCPU). Signed-off-by: Luc Michel --- hw/intc/arm_gic.c | 37 +++++++++++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 0e1b23047e..7ee2e6bcbb 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -1553,10 +1553,27 @@ static MemTxResult gic_do_cpu_write(void *opaque, h= waddr addr, GICState *s =3D *backref; int id =3D (backref - s->backref); return gic_cpu_write(s, id, addr, value, attrs); } =20 +static MemTxResult gic_thisvcpu_read(void *opaque, hwaddr addr, uint64_t *= data, + unsigned size, MemTxAttrs attrs) +{ + GICState *s =3D (GICState *)opaque; + + return gic_cpu_read(s, gic_get_current_vcpu(s), addr, data, attrs); +} + +static MemTxResult gic_thisvcpu_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size, + MemTxAttrs attrs) +{ + GICState *s =3D (GICState *)opaque; + + return gic_cpu_write(s, gic_get_current_vcpu(s), addr, value, attrs); +} + static const MemoryRegionOps gic_ops[2] =3D { { .read_with_attrs =3D gic_dist_read, .write_with_attrs =3D gic_dist_write, .endianness =3D DEVICE_NATIVE_ENDIAN, @@ -1572,10 +1589,23 @@ static const MemoryRegionOps gic_cpu_ops =3D { .read_with_attrs =3D gic_do_cpu_read, .write_with_attrs =3D gic_do_cpu_write, .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 +static const MemoryRegionOps gic_virt_ops[2] =3D { + { + .read_with_attrs =3D NULL, + .write_with_attrs =3D NULL, + .endianness =3D DEVICE_NATIVE_ENDIAN, + }, + { + .read_with_attrs =3D gic_thisvcpu_read, + .write_with_attrs =3D gic_thisvcpu_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + } +}; + static void arm_gic_realize(DeviceState *dev, Error **errp) { /* Device instance realize function for the GIC sysbus device */ int i; GICState *s =3D ARM_GIC(dev); @@ -1593,12 +1623,15 @@ static void arm_gic_realize(DeviceState *dev, Error= **errp) error_setg(errp, "KVM with user space irqchip only works when the " "host kernel supports KVM_CAP_ARM_USER_IRQ"); return; } =20 - /* This creates distributor and main CPU interface (s->cpuiomem[0]) */ - gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops, NULL); + /* This creates distributor, main CPU interface (s->cpuiomem[0]) and if + * enabled, virtualization extensions related interfaces (main virtual + * interface (s->vifaceiomem[0]) and virtual CPU interface). + */ + gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops, gic_virt_ops); =20 /* Extra core-specific regions for the CPU interfaces. This is * necessary for "franken-GIC" implementations, for example on * Exynos 4. * NB that the memory region size of 0x100 applies for the 11MPCore --=20 2.18.0