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[76.251.165.188]) by smtp.gmail.com with ESMTPSA id m62-v6sm26387051oik.30.2018.07.23.13.20.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Jul 2018 13:20:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=/GJkBe1r4wQptuy97THglNYn4b/4p6mfnUmhtPMpMHI=; b=YWSRITgpCHIMTzphmcReurutL6ik2bL5EHIi/oX+Qy3dG4rnJztGdJYxSiekKHwsaM 7L0mG2x6Jw7Yv96sE/G9oOySRXQ9EnNxm7oaOLCMOB94d3sMGnTbwh5I5sI8SHEsmtLQ IWqopcPU8eeR76yg5o+idbAYFDiyF6ygB9eU0HHaVE2RjYlm0FxDsb9rqi75ggfS6FgT EWBpwHURJk6WKed/b12nY+xQqhcGOv+9ZAFbkS3Im8ukhUGW50UMUTRJehTa0rOb3DaH wCqwrY3CEG7FpP7H6+dvOJWyeM3bogt8pTuwtT/M3zhX5BJg5CQgFSuuOh3ai5EGVI9E MVcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=/GJkBe1r4wQptuy97THglNYn4b/4p6mfnUmhtPMpMHI=; b=qZNCl+sH/peEaT+12zprM5lLq9bTAocjnqSsK20WPOksp74mReVwiU8z5Hb/ySurOY /hzdm4iCNW/VGK/0thCnCcgN2tl5xyhaiH5kYtdwbHacpGImlvbMh8M4TKucNpMyNazW 9z0X4kMKdcbvVgvEFFfh9xmCuDcFPrYbEhsjzgxaPmwn6+OHf8otoadnPH2bNshoJZ5L prkffrWwUgFEbCSTU+vJxhz+mc2VeYlRRK5tk3l1gTlCTb1w+5qRLNOZ7F1eg0ECXpnq 3If+M/tS1/Mu+WuwgZ/ihNb/J4T8FRPoTr+KhIj8W86YcrlPSIQvQdRcXepJmYYS5Oon J5vg== X-Gm-Message-State: AOUpUlG0Zisby3CI+AUECjs76awCWY9vv+Wvl6JqOKbzJYMLpu7y5XTB fJN5vjUPFCZwjrooqGM0M8glCrECFUZc0w== X-Google-Smtp-Source: AAOMgpefX36DTncIZoMaiajUJoiPXoyxRN3DYGZpLDD6BhSUGfTRM6s45Qg15Jkf06W+4M2wavTrvw== X-Received: by 2002:aca:e6cd:: with SMTP id d196-v6mr324201oih.94.1532377233866; Mon, 23 Jul 2018 13:20:33 -0700 (PDT) From: Michael Roth To: qemu-devel@nongnu.org Date: Mon, 23 Jul 2018 15:17:06 -0500 Message-Id: <20180723201748.25573-58-mdroth@linux.vnet.ibm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180723201748.25573-1-mdroth@linux.vnet.ibm.com> References: <20180723201748.25573-1-mdroth@linux.vnet.ibm.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4003:c06::22d Subject: [Qemu-devel] [PATCH 57/99] qapi: fill in CpuInfoFast.arch in query-cpus-fast X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laszlo Ersek , Cornelia Huck , qemu-stable@nongnu.org, Viktor VM Mihajlovski , Markus Armbruster Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Laszlo Ersek * Commit ca230ff33f89 added the @arch field to @CpuInfoFast, but it failed to set the new field in qmp_query_cpus_fast(), when TARGET_S390X was not defined. The updated @query-cpus-fast example in "qapi-schema.json" showed "arch":"x86" only because qmp_query_cpus_fast() calls g_malloc0() to allocate @CpuInfoFast, and the CPU_INFO_ARCH_X86 enum constant is generated with value 0. All @arch values other than @s390 implied the @CpuInfoOther sub-struct for @CpuInfoFast -- at the time of writing the patch --, thus no fields other than @arch needed to be set when TARGET_S390X was not defined. Set @arch now, by copying the corresponding assignments from qmp_query_cpus(). * Commit 25fa194b7b11 added the @riscv enum constant to @CpuInfoArch (used in both @CpuInfo and @CpuInfoFast -- the return types of the @query-cpus and @query-cpus-fast commands, respectively), and assigned, in both return structures, the @CpuInfoRISCV sub-structure to the new enum value. However, qmp_query_cpus_fast() would not populate either the @arch field or the @CpuInfoRISCV sub-structure, when TARGET_RISCV was defined; only qmp_query_cpus() would. Assign @CpuInfoOther to the @riscv enum constant in @CpuInfoFast, and populate only the @arch field in qmp_query_cpus_fast(). Getting CPU state without interrupting KVM is an exceptional thing that only S390X does currently. Quoting Cornelia Huck , "s390x is exceptional in that it has state in QEMU that is actually interesting for upper layers and can be retrieved without performance penalty". See also . Cc: Cornelia Huck Cc: Eric Blake Cc: Markus Armbruster Cc: Viktor VM Mihajlovski Cc: qemu-stable@nongnu.org Fixes: ca230ff33f89bf7102cbfbc2328716da6750aaed Fixes: 25fa194b7b11901561532e435beb83d046899f7a Signed-off-by: Laszlo Ersek Reviewed-by: Eric Blake Reviewed-by: Cornelia Huck Reviewed-by: Markus Armbruster Message-Id: <20180427192852.15013-2-lersek@redhat.com> Signed-off-by: Markus Armbruster (cherry picked from commit 96054f56396eaa0b9b5c681fc3e42a0004b17ade) Signed-off-by: Michael Roth --- cpus.c | 16 +++++++++++++++- qapi/misc.json | 2 +- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/cpus.c b/cpus.c index e1d94038fd..6fa701e423 100644 --- a/cpus.c +++ b/cpus.c @@ -2218,11 +2218,25 @@ CpuInfoFastList *qmp_query_cpus_fast(Error **errp) info->value->props =3D props; } =20 -#if defined(TARGET_S390X) +#if defined(TARGET_I386) + info->value->arch =3D CPU_INFO_ARCH_X86; +#elif defined(TARGET_PPC) + info->value->arch =3D CPU_INFO_ARCH_PPC; +#elif defined(TARGET_SPARC) + info->value->arch =3D CPU_INFO_ARCH_SPARC; +#elif defined(TARGET_MIPS) + info->value->arch =3D CPU_INFO_ARCH_MIPS; +#elif defined(TARGET_TRICORE) + info->value->arch =3D CPU_INFO_ARCH_TRICORE; +#elif defined(TARGET_S390X) s390_cpu =3D S390_CPU(cpu); env =3D &s390_cpu->env; info->value->arch =3D CPU_INFO_ARCH_S390; info->value->u.s390.cpu_state =3D env->cpu_state; +#elif defined(TARGET_RISCV) + info->value->arch =3D CPU_INFO_ARCH_RISCV; +#else + info->value->arch =3D CPU_INFO_ARCH_OTHER; #endif if (!cur_item) { head =3D cur_item =3D info; diff --git a/qapi/misc.json b/qapi/misc.json index 5636f4a149..104d013adb 100644 --- a/qapi/misc.json +++ b/qapi/misc.json @@ -573,7 +573,7 @@ 'mips': 'CpuInfoOther', 'tricore': 'CpuInfoOther', 's390': 'CpuInfoS390', - 'riscv': 'CpuInfoRISCV', + 'riscv': 'CpuInfoOther', 'other': 'CpuInfoOther' } } =20 ## --=20 2.17.1