From nobody Mon Feb 9 21:37:37 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1532098925776204.524512879535; Fri, 20 Jul 2018 08:02:05 -0700 (PDT) Received: from localhost ([::1]:48528 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fgWuy-0004F0-Oy for importer@patchew.org; Fri, 20 Jul 2018 11:02:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48746) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fgWqB-0000Y2-6L for qemu-devel@nongnu.org; Fri, 20 Jul 2018 10:57:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fgWqA-00064d-7R for qemu-devel@nongnu.org; Fri, 20 Jul 2018 10:57:07 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:43636) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fgWq4-0005xz-8C; Fri, 20 Jul 2018 10:57:00 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fgWpt-0004zg-4R; Fri, 20 Jul 2018 15:56:49 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Fri, 20 Jul 2018 15:56:44 +0100 Message-Id: <20180720145647.8810-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180720145647.8810-1-peter.maydell@linaro.org> References: <20180720145647.8810-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 1/4] target/arm: Improve exception-taken logging X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Improve the exception-taken logging by logging in v7m_exception_taken() the exception we're going to take and whether it is secure/nonsecure. This requires us to move logging at many callsites from after the call to before it, so that the logging appears in a sensible order. (This will make tail-chaining produce more useful logs; for the current callers of v7m_exception_taken() we know which exception we're going to take, so custom log messages at the callsite sufficed; for tail-chaining only v7m_exception_taken() knows the exception number that we're going to tail-chain to.) Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/helper.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 6f5bb198c3b..3ec6114599b 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6840,6 +6840,8 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t= lr, bool dotailchain, bool push_failed =3D false; =20 armv7m_nvic_get_pending_irq_info(env->nvic, &exc, &targets_secure); + qemu_log_mask(CPU_LOG_INT, "...taking pending %s exception %d\n", + targets_secure ? "secure" : "nonsecure", exc); =20 if (arm_feature(env, ARM_FEATURE_V8)) { if (arm_feature(env, ARM_FEATURE_M_SECURITY) && @@ -6913,12 +6915,15 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32= _t lr, bool dotailchain, * we might now want to take a different exception which * targets a different security state, so try again from the top. */ + qemu_log_mask(CPU_LOG_INT, + "...derived exception on callee-saves register stack= ing"); v7m_exception_taken(cpu, lr, true, true); return; } =20 if (!arm_v7m_load_vector(cpu, exc, targets_secure, &addr)) { /* Vector load failed: derived exception */ + qemu_log_mask(CPU_LOG_INT, "...derived exception on vector table l= oad"); v7m_exception_taken(cpu, lr, true, true); return; } @@ -7129,9 +7134,9 @@ static void do_v7m_exception_exit(ARMCPU *cpu) if (sfault) { env->v7m.sfsr |=3D R_V7M_SFSR_INVER_MASK; armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); - v7m_exception_taken(cpu, excret, true, false); qemu_log_mask(CPU_LOG_INT, "...taking SecureFault on existing " "stackframe: failed EXC_RETURN.ES validity check\n"); + v7m_exception_taken(cpu, excret, true, false); return; } =20 @@ -7141,9 +7146,9 @@ static void do_v7m_exception_exit(ARMCPU *cpu) */ env->v7m.cfsr[env->v7m.secure] |=3D R_V7M_CFSR_INVPC_MASK; armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.sec= ure); - v7m_exception_taken(cpu, excret, true, false); qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on existing " "stackframe: failed exception return integrity check= \n"); + v7m_exception_taken(cpu, excret, true, false); return; } =20 @@ -7198,10 +7203,10 @@ static void do_v7m_exception_exit(ARMCPU *cpu) /* Take a SecureFault on the current stack */ env->v7m.sfsr |=3D R_V7M_SFSR_INVIS_MASK; armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, fal= se); - v7m_exception_taken(cpu, excret, true, false); qemu_log_mask(CPU_LOG_INT, "...taking SecureFault on exist= ing " "stackframe: failed exception return integri= ty " "signature check\n"); + v7m_exception_taken(cpu, excret, true, false); return; } =20 @@ -7234,6 +7239,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu) /* v7m_stack_read() pended a fault, so take it (as a tail * chained exception on the same stack frame) */ + qemu_log_mask(CPU_LOG_INT, "...derived exception on unstacking= \n"); v7m_exception_taken(cpu, excret, true, false); return; } @@ -7270,10 +7276,10 @@ static void do_v7m_exception_exit(ARMCPU *cpu) armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); env->v7m.cfsr[env->v7m.secure] |=3D R_V7M_CFSR_INVPC_MASK; - v7m_exception_taken(cpu, excret, true, false); qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on existi= ng " "stackframe: failed exception return integri= ty " "check\n"); + v7m_exception_taken(cpu, excret, true, false); return; } } @@ -7309,9 +7315,9 @@ static void do_v7m_exception_exit(ARMCPU *cpu) armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, false); env->v7m.cfsr[env->v7m.secure] |=3D R_V7M_CFSR_INVPC_MASK; ignore_stackfaults =3D v7m_push_stack(cpu); - v7m_exception_taken(cpu, excret, false, ignore_stackfaults); qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on new stackframe= : " "failed exception return integrity check\n"); + v7m_exception_taken(cpu, excret, false, ignore_stackfaults); return; } =20 @@ -7727,7 +7733,6 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) =20 ignore_stackfaults =3D v7m_push_stack(cpu); v7m_exception_taken(cpu, lr, false, ignore_stackfaults); - qemu_log_mask(CPU_LOG_INT, "... as %d\n", env->v7m.exception); } =20 /* Function used to synchronize QEMU's AArch64 register set with AArch32 --=20 2.17.1