From nobody Wed Feb 11 03:02:22 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1531239315593567.0904292377145; Tue, 10 Jul 2018 09:15:15 -0700 (PDT) Received: from localhost ([::1]:48727 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fcvII-00071I-Hs for importer@patchew.org; Tue, 10 Jul 2018 12:15:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49143) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fcv47-0003ZU-8Q for qemu-devel@nongnu.org; Tue, 10 Jul 2018 12:00:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fcv43-0002N3-5j for qemu-devel@nongnu.org; Tue, 10 Jul 2018 12:00:35 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:43370) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fcv3z-0002Aw-Op; Tue, 10 Jul 2018 12:00:27 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fcv3q-0001pJ-2O; Tue, 10 Jul 2018 17:00:18 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 10 Jul 2018 17:00:11 +0100 Message-Id: <20180710160013.26559-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180710160013.26559-1-peter.maydell@linaro.org> References: <20180710160013.26559-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 4/6] accel/tcg: tb_gen_code(): Create single-insn TB for execution from non-RAM X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org, KONRAD Frederic , "Emilio G . Cota" , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , "Edgar E. Iglesias" , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" If get_page_addr_code() returns -1, this indicates that there is no RAM page we can read a full TB from. Instead we must create a TB which contains a single instruction and which we do not cache, so it is executed only once. Since this means we can now have TBs which are not in any page list, we also need to make tb_phys_invalidate() handle them (by not trying to remove them from a nonexistent page list). Signed-off-by: Peter Maydell Reviewed-by: Emilio G. Cota Reviewed-by: Richard Henderson --- accel/tcg/translate-all.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index d18018fa99d..4c12d94dd13 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1493,7 +1493,7 @@ static void tb_phys_invalidate__locked(TranslationBlo= ck *tb) */ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr) { - if (page_addr =3D=3D -1) { + if (page_addr =3D=3D -1 && tb->page_addr[0] !=3D -1) { page_lock_tb(tb); do_tb_phys_invalidate(tb, true); page_unlock_tb(tb); @@ -1608,6 +1608,17 @@ tb_link_page(TranslationBlock *tb, tb_page_addr_t ph= ys_pc, =20 assert_memory_lock(); =20 + if (phys_pc =3D=3D -1) { + /* + * If the TB is not associated with a physical RAM page then + * it must be a temporary one-insn TB, and we have nothing to do + * except fill in the page_addr[] fields. + */ + assert(tb->cflags & CF_NOCACHE); + tb->page_addr[0] =3D tb->page_addr[1] =3D -1; + return tb; + } + /* * Add the TB to the page list, acquiring first the pages's locks. * We keep the locks held until after inserting the TB in the hash tab= le, @@ -1677,6 +1688,12 @@ TranslationBlock *tb_gen_code(CPUState *cpu, =20 phys_pc =3D get_page_addr_code(env, pc); =20 + if (phys_pc =3D=3D -1) { + /* Generate a temporary TB with 1 insn in it */ + cflags &=3D ~CF_COUNT_MASK; + cflags |=3D CF_NOCACHE | 1; + } + buffer_overflow: tb =3D tb_alloc(pc); if (unlikely(!tb)) { --=20 2.17.1