From nobody Tue Nov 4 18:50:18 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530894210083133.6686756959839; Fri, 6 Jul 2018 09:23:30 -0700 (PDT) Received: from localhost ([::1]:58766 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fbTVz-0007Nr-6g for importer@patchew.org; Fri, 06 Jul 2018 12:23:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39502) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fbTUl-0006lz-4y for qemu-devel@nongnu.org; Fri, 06 Jul 2018 12:22:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fbTUj-00073m-VX for qemu-devel@nongnu.org; Fri, 06 Jul 2018 12:22:07 -0400 Received: from mail-qk0-x242.google.com ([2607:f8b0:400d:c09::242]:42198) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fbTUj-00073S-Qx; Fri, 06 Jul 2018 12:22:05 -0400 Received: by mail-qk0-x242.google.com with SMTP id u62-v6so6591739qkf.9; Fri, 06 Jul 2018 09:22:05 -0700 (PDT) Received: from x1.local ([138.117.48.222]) by smtp.gmail.com with ESMTPSA id p63-v6sm5875372qkb.46.2018.07.06.09.22.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Jul 2018 09:22:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=T55/G6QSkk3MOH+7GvT7f+1CG5bIIE7Dhrrl7KzXDl4=; b=LKxLtzp2aZBxMIS+L1rw0ADSGhi+TZ07YphOOV+snpYXbgyUJEP+gxh6Uyb1Z09wKW xL/R4TDdMoy7EtaLCZKzlYvL0xmxZIKNvFbfUB2Gsh866MgZ4LGLsbpUC9EHu56vGZ0e 0fSDXtQVlMGljReTL12lsvcQ5CoruH1r7EugeKbL+aUfFACwAUbtFHpV5KZaFcboWljn /4Mgt5kC3bRYqXOB1WGKXL+iyVDghJsjaD7f5cuRFQYOqhQ3mSoGhohPosjlZtaCaXuM v83HdTuQF+IEckTj4zH4Q2gINk4+FJom4G52Ak5hv/dycYtJhsaSoYfkAX3ZHxXbYhrz 9pYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=T55/G6QSkk3MOH+7GvT7f+1CG5bIIE7Dhrrl7KzXDl4=; b=gD5BPLBMM0BQsPTaNVmhC5nBa4C0tsnxg4qdMcoZWFajD1UJU4FrrzfpPTwoGzALr3 gXkVShmhSL+voDc0Cxpw/tIxruMibRHkNNKlTLmU7T1nn/+jQo36TejH8ncmCF0b6bWw upazPcifAyC1nCAan0MXs2Z/iuG/iqmQ2yICYax95oktkuU+Ao2pCtyMiZ5Rn9DiM4ZH ksXmukVAAFvlTK0a5fpa7ow4213vvyKcttcN+bimtUSS055rhRTjl8ASkBdirn7kJBaV XnzSWpd+5voddJMuDGjFijh1t8d0BkhvBRlsU/fJ5Ov+8r/4uGZ9Gxqw8PS2rHUW0qrP Y6Wg== X-Gm-Message-State: APt69E1giiwNITnZyCkNKmP2wSBTj8c7ovw0MhLmfnL7RlXuRQedHoWj G08borrXibm4HPgCegzWaMA= X-Google-Smtp-Source: AAOMgpdpirHIi07xFgWpTJqBuS0syDHzM0Q7//HUm2KBIFrokicEBdR3Lj1I91P9VgrIQ4e48HgeBw== X-Received: by 2002:a37:82c7:: with SMTP id e190-v6mr9186220qkd.313.1530894125299; Fri, 06 Jul 2018 09:22:05 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Peter Maydell , Andrzej Zaborowski Date: Fri, 6 Jul 2018 13:21:55 -0300 Message-Id: <20180706162155.8432-2-f4bug@amsat.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180706162155.8432-1-f4bug@amsat.org> References: <20180706162155.8432-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::242 Subject: [Qemu-devel] [PATCH for-3.0 1/1] hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset' X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 DeviceClass::reset models a "cold power-on" reset which can also be use to powercycle a device; but there is no "hot reset" (a.k.a. soft-reset) method available. The OMAP MMC Power-Up Control bit is not designed to powercycle a card, but to disable it without powering it off (pseudo-reset): Multimedia Card (MMC/SD/SDIO) Interface [SPRU765A] MMC_CON[11] Power-Up Control (POW) This bit must be set to 1 before any valid transaction to either MMC/SD or SPI memory cards. When 1, the card is considered powered-up and the controller core is enabled. When 0, the card is considered powered-down (system dependent), and the controller core logic is in pseudo-reset state. This is, the MMC_STAT flags and the FIFO pointers are reset, any access to MMC_DATA[DATA] has no effect, a write into the MMC.CMD register is ignored, and a setting of MMC_SPI[STR] to 1 is ignored. By spliting the 'pseudo-reset' code out of the 'power-on' reset function, this patch fixes a latent bug in omap_mmc_write(MMC_CON)i recently exposed by ecd219f7abb. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- --- hw/sd/omap_mmc.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c index 671264b650..d0c98ca021 100644 --- a/hw/sd/omap_mmc.c +++ b/hw/sd/omap_mmc.c @@ -1,6 +1,8 @@ /* * OMAP on-chip MMC/SD host emulation. * + * Datasheet: TI Multimedia Card (MMC/SD/SDIO) Interface (SPRU765A) + * * Copyright (C) 2006-2007 Andrzej Zaborowski * * This program is free software; you can redistribute it and/or @@ -278,6 +280,12 @@ static void omap_mmc_update(void *opaque) omap_mmc_interrupts_update(s); } =20 +static void omap_mmc_pseudo_reset(struct omap_mmc_s *host) +{ + host->status =3D 0; + host->fifo_len =3D 0; +} + void omap_mmc_reset(struct omap_mmc_s *host) { host->last_cmd =3D 0; @@ -286,11 +294,9 @@ void omap_mmc_reset(struct omap_mmc_s *host) host->dw =3D 0; host->mode =3D 0; host->enable =3D 0; - host->status =3D 0; host->mask =3D 0; host->cto =3D 0; host->dto =3D 0; - host->fifo_len =3D 0; host->blen =3D 0; host->blen_counter =3D 0; host->nblk =3D 0; @@ -305,6 +311,8 @@ void omap_mmc_reset(struct omap_mmc_s *host) qemu_set_irq(host->coverswitch, host->cdet_state); host->clkdiv =3D 0; =20 + omap_mmc_pseudo_reset(host); + /* Since we're still using the legacy SD API the card is not plugged * into any bus, and we must reset it manually. When omap_mmc is * QOMified this must move into the QOM reset function. @@ -459,7 +467,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset, if (s->dw !=3D 0 && s->lines < 4) printf("4-bit SD bus enabled\n"); if (!s->enable) - omap_mmc_reset(s); + omap_mmc_pseudo_reset(s); break; =20 case 0x10: /* MMC_STAT */ --=20 2.18.0