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[97.126.112.211]) by smtp.gmail.com with ESMTPSA id s185-v6sm4834201pfb.116.2018.07.03.08.17.34 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 08:17:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eZ2NTaqa03xWjVw1EbNchX+4D4CGNGoex5E3ASWvXK8=; b=ZCB6IEucnmVhss5RFtTElFxMI093643vHWfE47x9gtn8RJ4DlOm8Xrkezp2ct4Y3qA xmu0y0D/GMWAbZUP/NyJ9s5phwBcCoNaeXb2AvZXSLxOw8cd9BXlKoJteaxZOsZ27tOK NvppcvhK8tG5rPUrhZ3Yr5T6lcA0BHVpG55n8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eZ2NTaqa03xWjVw1EbNchX+4D4CGNGoex5E3ASWvXK8=; b=BafSO1cX7WrZH/JHWYHVK03hfjJDJj+LVhHlk1x2u/eZOdK2opBMmgXn28YOjbuvj1 dKmgNPiUPVWJN4EweyVo5709URL2AJXVnRTCTgCH2aJf3Wo1xnreNOI3UAz7b4YomLOP 2nR3oM9OZcLmVCDGMq9q0C3Fg694AX3Q4Qt8gZBi3k1mLz2VyIQUgjmlfLhU8ZGFPBgM wbsY4NuZmlKPYxE32BCgNxaYwNMjF/jM3rldd8ptdZS87JjD+HPRq3ZvMnSvkN6t6dlL JJj9oxTeHwJVMf1MZa4nBlyVUKCsEpsB8j2ghiVMEwGxL7R1w/TAyhAHd+kz+sQhM2lk pt6Q== X-Gm-Message-State: APt69E2hLzTppIgoUz/L6xKqCKxUuYNz3otuiKd8YcbL3fe88c37SZDm DmrjnxrBOOJXwZVuAAPIhteiZA5J5kk= X-Google-Smtp-Source: AAOMgpfCsDfN7TuX6AVZYfytbCHDt8Z+uPY6kP1BZk0g136qEANzpjnBhthx6/1RxPQF1WdCFxMJiA== X-Received: by 2002:a63:9a52:: with SMTP id e18-v6mr9207857pgo.188.1530631055917; Tue, 03 Jul 2018 08:17:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 3 Jul 2018 08:17:26 -0700 Message-Id: <20180703151732.29843-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703151732.29843-1-richard.henderson@linaro.org> References: <20180703151732.29843-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::236 Subject: [Qemu-devel] [PATCH 1/7] target/ppc: Enable fp exceptions for user-only X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: programmingkidx@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" While just setting the MSR bits is sufficient, we can tidy the helper code by extracting the MSR test to a helper and then forcing it true for user-only. Signed-off-by: Richard Henderson --- target/ppc/fpu_helper.c | 15 ++++++++++++--- target/ppc/translate_init.inc.c | 2 ++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 7714bfe0f9..119826b5a7 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -36,6 +36,15 @@ static inline float128 float128_snan_to_qnan(float128 x) #define float32_snan_to_qnan(x) ((x) | 0x00400000) #define float16_snan_to_qnan(x) ((x) | 0x0200) =20 +static inline bool fp_exceptions_enabled(CPUPPCState *env) +{ +#ifdef CONFIG_USER_ONLY + return true; +#else + return (env->msr & ((1U << MSR_FE0) | (1U << MSR_FE1))) !=3D 0; +#endif +} + /*************************************************************************= ****/ /* Floating point operations helpers */ uint64_t helper_float32_to_float64(CPUPPCState *env, uint32_t arg) @@ -207,7 +216,7 @@ uint64_t float_invalid_op_excp(CPUPPCState *env, int op= , int set_fpcc) if (ve !=3D 0) { /* Update the floating-point enabled exception summary */ env->fpscr |=3D 1 << FPSCR_FEX; - if (msr_fe0 !=3D 0 || msr_fe1 !=3D 0) { + if (fp_exceptions_enabled(env)) { /* GETPC() works here because this is inline */ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op, GETPC()); @@ -225,7 +234,7 @@ static inline void float_zero_divide_excp(CPUPPCState *= env, uintptr_t raddr) if (fpscr_ze !=3D 0) { /* Update the floating-point enabled exception summary */ env->fpscr |=3D 1 << FPSCR_FEX; - if (msr_fe0 !=3D 0 || msr_fe1 !=3D 0) { + if (fp_exceptions_enabled(env)) { raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX, raddr); @@ -547,7 +556,7 @@ static void do_float_check_status(CPUPPCState *env, uin= tptr_t raddr) if (cs->exception_index =3D=3D POWERPC_EXCP_PROGRAM && (env->error_code & POWERPC_EXCP_FP)) { /* Differred floating-point exception after target FPR update */ - if (msr_fe0 !=3D 0 || msr_fe1 !=3D 0) { + if (fp_exceptions_enabled(env)) { raise_exception_err_ra(env, cs->exception_index, env->error_code, raddr); } diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index 76d6f3fd5e..ffa74a1026 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -10278,6 +10278,8 @@ static void ppc_cpu_reset(CPUState *s) #endif #if defined(CONFIG_USER_ONLY) msr |=3D (target_ulong)1 << MSR_FP; /* Allow floating point usage */ + msr |=3D (target_ulong)1 << MSR_FE0; /* Allow floating point exception= s */ + msr |=3D (target_ulong)1 << MSR_FE1; msr |=3D (target_ulong)1 << MSR_VR; /* Allow altivec usage */ msr |=3D (target_ulong)1 << MSR_VSX; /* Allow VSX usage */ msr |=3D (target_ulong)1 << MSR_SPE; /* Allow SPE usage */ --=20 2.17.1 From nobody Tue Nov 4 15:28:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530631373109214.57783876993108; Tue, 3 Jul 2018 08:22:53 -0700 (PDT) Received: from localhost ([::1]:41064 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN8m-0001gh-9J for importer@patchew.org; Tue, 03 Jul 2018 11:22:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57650) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN3k-0006IR-3K for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1faN3i-0000Mh-L5 for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:40 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:42184) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1faN3i-0000MG-FI for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:38 -0400 Received: by mail-pg0-x244.google.com with SMTP id c10-v6so1126279pgu.9 for ; Tue, 03 Jul 2018 08:17:38 -0700 (PDT) Received: from cloudburst.twiddle.net (97-126-112-211.tukw.qwest.net. [97.126.112.211]) by smtp.gmail.com with ESMTPSA id s185-v6sm4834201pfb.116.2018.07.03.08.17.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 08:17:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=x2t1XFI2QFPK2VzG0H6uB4M9ibalVxnRLpzzWNvPaFo=; b=eMQZWc/sw7hB9QWhhfnqh1BxXPNc4BdZM8QgKiRX/2Hp4YtKyjXCI0hgojchkFovhp BxjCjaWfMheb/pMx8n1bFR+SVXJPQNHOXrFfy49Tp37E0UwTLX52moY1GRq3wF5O8L7v tkspR2bL8HCX6k9LoKGzyruI/l0mug1cfMM5E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=x2t1XFI2QFPK2VzG0H6uB4M9ibalVxnRLpzzWNvPaFo=; b=kZP3CWmeBcxT4dF+Nv9wHEDZ2g34T8ZLd2qDbS4rkNRR1xLtRqDlO3hZ1X02NKXEO+ w1kB8xtYOZZkapaFKd88sd7xg7przk5mcQ0KY7NIZ5nD/LjR32VCUXqIVYtFbU88FE22 sbtw596AQUGmf2RoRH/pulyJ1PM0xxIbUp29Jj6JJ8vMELuzfIDGN6BKN/6aRc3z2oMe 6bJFQ+P3cgOmkuy/eGk/y0uBYaAE6TX7O/lFMTTJ0jOS83CfGQKgC5HJ17xSBUPT6LU0 x+icnnFzrRAm+neOK5h7EcNSMsdtcAgZw9I9gJX0WsLc1042dhwo6nNweKsc9r7WKS4g I1kQ== X-Gm-Message-State: APt69E3ccwyJNlaip2KWo0Q99JjkcQOt+JDnLZb+oZPOgrJncW9981bi eYC9SR7IMxkAUJBqMvML/IaySlGm/jY= X-Google-Smtp-Source: ADUXVKJAF9cUR+AelxmEyntW4g4L3XQ5yMpRcBqStGshXqALf4O9R39s6vJoTcr/Ml3pacFVNJoBpg== X-Received: by 2002:a65:4e09:: with SMTP id r9-v6mr25493523pgt.369.1530631057244; Tue, 03 Jul 2018 08:17:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 3 Jul 2018 08:17:27 -0700 Message-Id: <20180703151732.29843-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703151732.29843-1-richard.henderson@linaro.org> References: <20180703151732.29843-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH 2/7] target/ppc: Honor fpscr_ze semantics and tidy fdiv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: programmingkidx@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Divide by zero, exception taken, leaves the destination register unmodified. Therefore we must raise the exception before returning from helper_fdiv. Move the check from do_float_check_status into helper_fdiv. At the same time, tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. At the same time, pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson --- target/ppc/helper.h | 2 +- target/ppc/fpu_helper.c | 44 ++++++++++++++++++++--------------------- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index d751f0e219..151437d8fc 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -88,7 +88,7 @@ DEF_HELPER_2(frim, i64, env, i64) DEF_HELPER_3(fadd, i64, env, i64, i64) DEF_HELPER_3(fsub, i64, env, i64, i64) DEF_HELPER_3(fmul, i64, env, i64, i64) -DEF_HELPER_3(fdiv, i64, env, i64, i64) +DEF_HELPER_3(fdiv, f64, env, f64, f64) DEF_HELPER_4(fmadd, i64, env, i64, i64, i64) DEF_HELPER_4(fmsub, i64, env, i64, i64, i64) DEF_HELPER_4(fnmadd, i64, env, i64, i64, i64) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 119826b5a7..0df7e31c10 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -543,9 +543,7 @@ static void do_float_check_status(CPUPPCState *env, uin= tptr_t raddr) CPUState *cs =3D CPU(ppc_env_get_cpu(env)); int status =3D get_float_exception_flags(&env->fp_status); =20 - if (status & float_flag_divbyzero) { - float_zero_divide_excp(env, raddr); - } else if (status & float_flag_overflow) { + if (status & float_flag_overflow) { float_overflow_excp(env); } else if (status & float_flag_underflow) { float_underflow_excp(env); @@ -653,30 +651,32 @@ uint64_t helper_fmul(CPUPPCState *env, uint64_t arg1,= uint64_t arg2) } =20 /* fdiv - fdiv. */ -uint64_t helper_fdiv(CPUPPCState *env, uint64_t arg1, uint64_t arg2) +float64 helper_fdiv(CPUPPCState *env, float64 arg1, float64 arg2) { - CPU_DoubleU farg1, farg2; + float64 ret =3D float64_div(arg1, arg2, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - farg1.ll =3D arg1; - farg2.ll =3D arg2; - - if (unlikely(float64_is_infinity(farg1.d) && - float64_is_infinity(farg2.d))) { - /* Division of infinity by infinity */ - farg1.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIDI, 1); - } else if (unlikely(float64_is_zero(farg1.d) && float64_is_zero(farg2.= d))) { - /* Division of zero by zero */ - farg1.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXZDZ, 1); - } else { - if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || - float64_is_signaling_nan(farg2.d, &env->fp_status))) { - /* sNaN division */ - float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + if (unlikely(status)) { + if (status & float_flag_invalid) { + /* Determine what kind of invalid operation was seen. */ + if (float64_is_infinity(arg1) && float64_is_infinity(arg2)) { + /* Division of infinity by infinity */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIDI, 1); + } else if (float64_is_zero(arg1) && float64_is_zero(arg2)) { + /* Division of zero by zero */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXZDZ, 1); + } else if (float64_is_signaling_nan(arg1, &env->fp_status) || + float64_is_signaling_nan(arg2, &env->fp_status)) { + /* sNaN division */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + } + } + if (status & float_flag_divbyzero) { + float_zero_divide_excp(env, GETPC()); } - farg1.d =3D float64_div(farg1.d, farg2.d, &env->fp_status); } =20 - return farg1.ll; + return ret; } =20 =20 --=20 2.17.1 From nobody Tue Nov 4 15:28:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530631328852740.24508984577; Tue, 3 Jul 2018 08:22:08 -0700 (PDT) Received: from localhost ([::1]:41061 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN84-00012Y-3l for importer@patchew.org; Tue, 03 Jul 2018 11:22:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57696) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN3n-0006Ia-HR for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1faN3k-0000Nk-99 for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:41 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:44464) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1faN3k-0000NB-3I for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:40 -0400 Received: by mail-pf0-x242.google.com with SMTP id j3-v6so1169497pfh.11 for ; Tue, 03 Jul 2018 08:17:40 -0700 (PDT) Received: from cloudburst.twiddle.net (97-126-112-211.tukw.qwest.net. [97.126.112.211]) by smtp.gmail.com with ESMTPSA id s185-v6sm4834201pfb.116.2018.07.03.08.17.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 08:17:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kjNhSDETLhKZX1kPr5wWZdIwC2gZUpxU/1MvpywHh/8=; b=AYJ1TRV2v5yc943DrtvdZ/FHOWru8oVjZgyd3YyGa+JA7RRl1ut+0tO33QYPCw9Fbb 9ls7eCBEc+staJkbGxHIL0uzGh3g6r5ZN/CbcwMeUu5RML+W0kWMuaURV9zS92SxAc0L S89KNgCqisgVPdEWxkrSRAF7ofdBtcdHUY3Ds= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kjNhSDETLhKZX1kPr5wWZdIwC2gZUpxU/1MvpywHh/8=; b=n78bHaBpeOZuE57qtGvv5dvQFt2EZi0DNAUa843MumBK6dn5mDVgjfN4W4HI2DpgxY v8lRP4UHIF//SNnOtyA7a9MX7MVpR1uqA1duuchsCK8+kl8LljQkTihVbSW3Ko1x8RFA mclT48aVHdR3NHpFG0VNUPujIzosOkmgzqHEoid3sUR0jrvJ15jYl2oFGb6tU96hcMon 8+jojHmzUPAyA6SCoUgHOXI6Zn5+V8oFahLVfk4Xx6PKj+TYctOOTZdr0a80SPczIqQg rT51/MffbNHJS0mLnHs0W6qiOiSZ5NnPodfjqR3BcePUxCThtATFrKUkedQhEb/gYI57 Hnfw== X-Gm-Message-State: APt69E3iyweKOAvgMbWjepknKpq/JrWXVYaK1e32KIXaIbxskQq9obqy 3BoYgoiajueLy15lbcYUUtNHtQqnIkk= X-Google-Smtp-Source: AAOMgpeP7WGiN8a72RaoH0d9K3Eyf8MJBeJn8/DZOhihLyvrpDYUoN0fGekC5keMw55ezt7VWiHr/A== X-Received: by 2002:a65:4541:: with SMTP id x1-v6mr20775618pgr.26.1530631058915; Tue, 03 Jul 2018 08:17:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 3 Jul 2018 08:17:28 -0700 Message-Id: <20180703151732.29843-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703151732.29843-1-richard.henderson@linaro.org> References: <20180703151732.29843-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH 3/7] target/ppc: Tidy helper_fmul X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: programmingkidx@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. Pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson --- target/ppc/helper.h | 2 +- target/ppc/fpu_helper.c | 25 +++++++++++-------------- 2 files changed, 12 insertions(+), 15 deletions(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 151437d8fc..7ddbc0fc19 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -87,7 +87,7 @@ DEF_HELPER_2(frim, i64, env, i64) =20 DEF_HELPER_3(fadd, i64, env, i64, i64) DEF_HELPER_3(fsub, i64, env, i64, i64) -DEF_HELPER_3(fmul, i64, env, i64, i64) +DEF_HELPER_3(fmul, f64, env, f64, f64) DEF_HELPER_3(fdiv, f64, env, f64, f64) DEF_HELPER_4(fmadd, i64, env, i64, i64, i64) DEF_HELPER_4(fmsub, i64, env, i64, i64, i64) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 0df7e31c10..5642734b5b 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -627,27 +627,24 @@ uint64_t helper_fsub(CPUPPCState *env, uint64_t arg1,= uint64_t arg2) } =20 /* fmul - fmul. */ -uint64_t helper_fmul(CPUPPCState *env, uint64_t arg1, uint64_t arg2) +float64 helper_fmul(CPUPPCState *env, float64 arg1, float64 arg2) { - CPU_DoubleU farg1, farg2; + float64 ret =3D float64_mul(arg1, arg2, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - farg1.ll =3D arg1; - farg2.ll =3D arg2; - - if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)= ) || - (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)= ))) { - /* Multiplication of zero by infinity */ - farg1.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); - } else { - if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || - float64_is_signaling_nan(farg2.d, &env->fp_status))) { + if (unlikely(status & float_flag_invalid)) { + if ((float64_is_infinity(arg1) && float64_is_zero(arg2)) || + (float64_is_zero(arg1) && float64_is_infinity(arg2))) { + /* Multiplication of zero by infinity */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); + } else if (float64_is_signaling_nan(arg1, &env->fp_status) || + float64_is_signaling_nan(arg2, &env->fp_status)) { /* sNaN multiplication */ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } - farg1.d =3D float64_mul(farg1.d, farg2.d, &env->fp_status); } =20 - return farg1.ll; + return ret; } =20 /* fdiv - fdiv. */ --=20 2.17.1 From nobody Tue Nov 4 15:28:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530631711319283.69968330363656; Tue, 3 Jul 2018 08:28:31 -0700 (PDT) Received: from localhost ([::1]:41100 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faNEE-0005zL-Ib for importer@patchew.org; Tue, 03 Jul 2018 11:28:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57801) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN3r-0006N1-Ur for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1faN3m-0000P5-1b for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:47 -0400 Received: from mail-pf0-x22f.google.com ([2607:f8b0:400e:c00::22f]:46327) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1faN3l-0000OC-KZ for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:41 -0400 Received: by mail-pf0-x22f.google.com with SMTP id l123-v6so1169848pfl.13 for ; Tue, 03 Jul 2018 08:17:41 -0700 (PDT) Received: from cloudburst.twiddle.net (97-126-112-211.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c00::22f Subject: [Qemu-devel] [PATCH 4/7] target/ppc: Tidy helper_fadd, helper_fsub X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: programmingkidx@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. Pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Note that because we know float_flag_invalid was set, we do not have to re-check the signs of the infinities. Signed-off-by: Richard Henderson --- target/ppc/helper.h | 4 ++-- target/ppc/fpu_helper.c | 50 +++++++++++++++++------------------------ 2 files changed, 23 insertions(+), 31 deletions(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 7ddbc0fc19..3262e2feaf 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -85,8 +85,8 @@ DEF_HELPER_2(friz, i64, env, i64) DEF_HELPER_2(frip, i64, env, i64) DEF_HELPER_2(frim, i64, env, i64) =20 -DEF_HELPER_3(fadd, i64, env, i64, i64) -DEF_HELPER_3(fsub, i64, env, i64, i64) +DEF_HELPER_3(fadd, f64, env, f64, f64) +DEF_HELPER_3(fsub, f64, env, f64, f64) DEF_HELPER_3(fmul, f64, env, f64, f64) DEF_HELPER_3(fdiv, f64, env, f64, f64) DEF_HELPER_4(fmadd, i64, env, i64, i64, i64) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 5642734b5b..2d56c93498 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -579,51 +579,43 @@ void helper_reset_fpstatus(CPUPPCState *env) } =20 /* fadd - fadd. */ -uint64_t helper_fadd(CPUPPCState *env, uint64_t arg1, uint64_t arg2) +float64 helper_fadd(CPUPPCState *env, float64 arg1, float64 arg2) { - CPU_DoubleU farg1, farg2; + float64 ret =3D float64_add(arg1, arg2, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - farg1.ll =3D arg1; - farg2.ll =3D arg2; - - if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2= .d) && - float64_is_neg(farg1.d) !=3D float64_is_neg(farg2.d))) { - /* Magnitude subtraction of infinities */ - farg1.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); - } else { - if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || - float64_is_signaling_nan(farg2.d, &env->fp_status))) { + if (unlikely(status & float_flag_invalid)) { + if (float64_is_infinity(arg1) && float64_is_infinity(arg2)) { + /* Magnitude subtraction of infinities */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); + } else if (float64_is_signaling_nan(arg1, &env->fp_status) || + float64_is_signaling_nan(arg2, &env->fp_status)) { /* sNaN addition */ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } - farg1.d =3D float64_add(farg1.d, farg2.d, &env->fp_status); } =20 - return farg1.ll; + return ret; } =20 /* fsub - fsub. */ -uint64_t helper_fsub(CPUPPCState *env, uint64_t arg1, uint64_t arg2) +float64 helper_fsub(CPUPPCState *env, float64 arg1, float64 arg2) { - CPU_DoubleU farg1, farg2; + float64 ret =3D float64_sub(arg1, arg2, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - farg1.ll =3D arg1; - farg2.ll =3D arg2; - - if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2= .d) && - float64_is_neg(farg1.d) =3D=3D float64_is_neg(farg2.d))) { - /* Magnitude subtraction of infinities */ - farg1.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); - } else { - if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || - float64_is_signaling_nan(farg2.d, &env->fp_status))) { - /* sNaN subtraction */ + if (unlikely(status & float_flag_invalid)) { + if (float64_is_infinity(arg1) && float64_is_infinity(arg2)) { + /* Magnitude subtraction of infinities */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); + } else if (float64_is_signaling_nan(arg1, &env->fp_status) || + float64_is_signaling_nan(arg2, &env->fp_status)) { + /* sNaN addition */ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } - farg1.d =3D float64_sub(farg1.d, farg2.d, &env->fp_status); } =20 - return farg1.ll; + return ret; } =20 /* fmul - fmul. */ --=20 2.17.1 From nobody Tue Nov 4 15:28:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530631565634750.4368450613925; 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[97.126.112.211]) by smtp.gmail.com with ESMTPSA id s185-v6sm4834201pfb.116.2018.07.03.08.17.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 08:17:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Vuw9aNVINwU0Fma3pN+BCiR5nbGceZcI602O5ht19Ck=; b=gl5tJcMeFySECiJ+OOOsfkIzuNHuOPbz5bDexUUl5MZg5YjOBPZ5TxIyAtfNviyiz7 2Zeutz6vTTK8tBdUqL0XySXOTjlqIpahUwg5PkTJqR/z3mWY0tXC7M/1gkAfIMrGgIH3 K58vds/KBZln8xZMDs8MFqLDPM7MWYGqWzEfs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Vuw9aNVINwU0Fma3pN+BCiR5nbGceZcI602O5ht19Ck=; b=cKoOWVQfPZc8uQLqLIMvOTv89rxmy1gciVVuB5ZzLWQ1ElpatGJTqAv9+rg1FaU9eI Y+s9Yjhnhqal/z28SuDLspPLtoT8Uk7u54Kt5B3P0WayfSdHPbGDMLta0uU4Yvf4sw2U m7n+aGqUIhh/Zja1AhplZMXyc9yfov/St/rAyhblYUbg0V2IRj3mVIfvDZbUBK8pA0Vx Xtp6qz0koZJ6z6GIBdpbl/oKqe3JBAhN/AL7PfjHOQRS2epOUc0tm1ArfZV6QKEHYcH1 ciD6kQCM8Ew0kkehaBixfK5DFa+2hZHlwZlgXqESKXY/Y1tgHpaF4bZfgrz7IwAT7Pdr l34g== X-Gm-Message-State: APt69E2bJ+sh+QgHQMdoRCOBQLsc9gPJrBBiLSkrHQO264MhreLPMkG7 B5w5mhozbV73mSD6gaX/IIKbSLZcm8U= X-Google-Smtp-Source: AAOMgpflw+1ehtt0JtWLYlhuMRQtIXXvygIPYyfjYSwddDD2LmtUry4Tgaym6ClldsL/r4vE3SkAJw== X-Received: by 2002:a63:2043:: with SMTP id r3-v6mr10834305pgm.105.1530631062264; Tue, 03 Jul 2018 08:17:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 3 Jul 2018 08:17:30 -0700 Message-Id: <20180703151732.29843-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703151732.29843-1-richard.henderson@linaro.org> References: <20180703151732.29843-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::229 Subject: [Qemu-devel] [PATCH 5/7] target/ppc: Tidy helper_fsqrt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: programmingkidx@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. Pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson --- target/ppc/helper.h | 2 +- target/ppc/fpu_helper.c | 29 ++++++++++++++--------------- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 3262e2feaf..cc3d031407 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -93,7 +93,7 @@ DEF_HELPER_4(fmadd, i64, env, i64, i64, i64) DEF_HELPER_4(fmsub, i64, env, i64, i64, i64) DEF_HELPER_4(fnmadd, i64, env, i64, i64, i64) DEF_HELPER_4(fnmsub, i64, env, i64, i64, i64) -DEF_HELPER_2(fsqrt, i64, env, i64) +DEF_HELPER_2(fsqrt, f64, env, f64) DEF_HELPER_2(fre, i64, env, i64) DEF_HELPER_2(fres, i64, env, i64) DEF_HELPER_2(frsqrte, i64, env, i64) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 2d56c93498..c8a2dd6408 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -850,25 +850,24 @@ uint64_t helper_frsp(CPUPPCState *env, uint64_t arg) } =20 /* fsqrt - fsqrt. */ -uint64_t helper_fsqrt(CPUPPCState *env, uint64_t arg) +float64 helper_fsqrt(CPUPPCState *env, float64 arg) { - CPU_DoubleU farg; + float64 ret =3D float64_sqrt(arg, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - farg.ll =3D arg; - - if (unlikely(float64_is_any_nan(farg.d))) { - if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { - /* sNaN reciprocal square root */ - float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); - farg.ll =3D float64_snan_to_qnan(farg.ll); + if (unlikely(status & float_flag_invalid)) { + if (unlikely(float64_is_any_nan(arg))) { + if (unlikely(float64_is_signaling_nan(arg, &env->fp_status))) { + /* sNaN square root */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + } + } else { + /* Square root of a negative nonzero number */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); } - } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d)= )) { - /* Square root of a negative nonzero number */ - farg.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); - } else { - farg.d =3D float64_sqrt(farg.d, &env->fp_status); } - return farg.ll; + + return ret; } =20 /* fre - fre. */ --=20 2.17.1 From nobody Tue Nov 4 15:28:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530631571814111.87032060238528; Tue, 3 Jul 2018 08:26:11 -0700 (PDT) Received: from localhost ([::1]:41089 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faNBy-00048C-Qp for importer@patchew.org; Tue, 03 Jul 2018 11:26:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57819) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN3u-0006Q7-7q for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1faN3p-0000RJ-17 for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:50 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:39030) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1faN3o-0000Qg-S6 for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:44 -0400 Received: by mail-pf0-x242.google.com with SMTP id s21-v6so1178114pfm.6 for ; Tue, 03 Jul 2018 08:17:44 -0700 (PDT) Received: from cloudburst.twiddle.net (97-126-112-211.tukw.qwest.net. [97.126.112.211]) by smtp.gmail.com with ESMTPSA id s185-v6sm4834201pfb.116.2018.07.03.08.17.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 08:17:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pH8EovXGz1h8tlGLK9DZKB5EE5L+qrmSbfLNiXlUNU0=; b=jLkjL8CUyEXFeVRhlE2Ajv/X5qXYJ9Lqq4w0WUK61PDYRxzMpm8hRwgPjKV3k1z+PR b2K+gx0DD2kZQGe3KwxEfPCQXgPACU2GHbNvA5m+YL2jx7/OmbvqoX6283VNVipx01BX QSNpZauAh35dBk34z02AKxepjH08DfJjqz2CE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pH8EovXGz1h8tlGLK9DZKB5EE5L+qrmSbfLNiXlUNU0=; b=jSZ4wzPeVVvABIZJbNgH0FV5Jhkf130ndux6jfN8pZM7Zv4o1twap9AOTDGkVK/hFw Xk59USqG9GtUv/Ookvr4zan/7IFMxiHdeqz2UlVJdtMCdwCJiVM9CWpjtTT2TntzVuYd hAotRJcc/zhxSR5FOcgfIo/5XX4UIPJSCC++yUEZBlUHoK6ibwufyIAqKOYHogr++zpw k2qWjO2VUpKbSpoArjmuK2UIv70layCfERmqmwbxr+qbeAiI7HUTApqgl8AuVKRaQQpO NdOov6hK/8L8rM5WgNmn+9akY7EtBLCDlTTZB1LhBRQi3wjrOlJEXx9A61F3LXl5f5Iz HSiA== X-Gm-Message-State: APt69E0qqPKIWSsiDYQ1Pij3GKePW0cJDjTpUnnovWwAyblVT3zbDqRx t66Y+2aObn7hHbh9hlCTVn53nO4NYqQ= X-Google-Smtp-Source: ADUXVKKSceaODFpblqzUh/1Je5fLK2yQHMXAtC/sX6OEcHtZG6JEyq+j9MDc5wxsNHV1YeuojZ9geg== X-Received: by 2002:a63:4002:: with SMTP id n2-v6mr25398977pga.285.1530631063683; Tue, 03 Jul 2018 08:17:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 3 Jul 2018 08:17:31 -0700 Message-Id: <20180703151732.29843-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703151732.29843-1-richard.henderson@linaro.org> References: <20180703151732.29843-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH 6/7] target/ppc: Honor fpscr_ze semantics and tidy fre, fresqrt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: programmingkidx@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Divide by zero, exception taken, leaves the destination register unmodified. Therefore we must raise the exception before returning from the respective helpers. From helper_fre, divide by zero exception not taken, return the documented +/- 0.5. At the same time, tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. At the same time, pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson --- target/ppc/fpu_helper.c | 62 ++++++++++++++++++++++++----------------- 1 file changed, 37 insertions(+), 25 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index c8a2dd6408..1e195487d3 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -871,18 +871,27 @@ float64 helper_fsqrt(CPUPPCState *env, float64 arg) } =20 /* fre - fre. */ -uint64_t helper_fre(CPUPPCState *env, uint64_t arg) +float64 helper_fre(CPUPPCState *env, float64 arg) { - CPU_DoubleU farg; + /* "Estimate" the reciprocal with actual division. */ + float64 ret =3D float64_div(float64_one, arg, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - farg.ll =3D arg; - - if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { - /* sNaN reciprocal */ - float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + if (unlikely(status)) { + if (status & float_flag_invalid) { + if (float64_is_signaling_nan(arg, &env->fp_status)) { + /* sNaN reciprocal */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + } + } + if (status & float_flag_divbyzero) { + float_zero_divide_excp(env, GETPC()); + /* For FPSCR.ZE =3D=3D 0, the result is 1/2. */ + ret =3D float64_set_sign(float64_half, float64_is_neg(arg)); + } } - farg.d =3D float64_div(float64_one, farg.d, &env->fp_status); - return farg.d; + + return ret; } =20 /* fres - fres. */ @@ -905,27 +914,30 @@ uint64_t helper_fres(CPUPPCState *env, uint64_t arg) } =20 /* frsqrte - frsqrte. */ -uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg) +float64 helper_frsqrte(CPUPPCState *env, float64 arg) { - CPU_DoubleU farg; + /* "Estimate" the reciprocal with actual division. */ + float64 rets =3D float64_sqrt(arg, &env->fp_status); + float64 retd =3D float64_div(float64_one, rets, &env->fp_status); + int status =3D get_float_exception_flags(&env->fp_status); =20 - farg.ll =3D arg; - - if (unlikely(float64_is_any_nan(farg.d))) { - if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { - /* sNaN reciprocal square root */ - float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); - farg.ll =3D float64_snan_to_qnan(farg.ll); + if (unlikely(status)) { + if (status & float_flag_invalid) { + if (float64_is_signaling_nan(arg, &env->fp_status)) { + /* sNaN reciprocal */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + } else { + /* Square root of a negative nonzero number */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); + } + } + if (status & float_flag_divbyzero) { + /* Reciprocal of (square root of) zero. */ + float_zero_divide_excp(env, GETPC()); } - } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d)= )) { - /* Reciprocal square root of a negative nonzero number */ - farg.ll =3D float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); - } else { - farg.d =3D float64_sqrt(farg.d, &env->fp_status); - farg.d =3D float64_div(float64_one, farg.d, &env->fp_status); } =20 - return farg.ll; + return retd; } =20 /* fsel - fsel. */ --=20 2.17.1 From nobody Tue Nov 4 15:28:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530631265420630.8639871153949; Tue, 3 Jul 2018 08:21:05 -0700 (PDT) Received: from localhost ([::1]:41054 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN6z-0008R0-3J for importer@patchew.org; Tue, 03 Jul 2018 11:21:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57807) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faN3t-0006Oa-4W for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1faN3r-0000SC-0K for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:49 -0400 Received: from mail-pf0-x22e.google.com ([2607:f8b0:400e:c00::22e]:41189) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1faN3q-0000Rm-GO for qemu-devel@nongnu.org; Tue, 03 Jul 2018 11:17:46 -0400 Received: by mail-pf0-x22e.google.com with SMTP id a11-v6so1172551pff.8 for ; Tue, 03 Jul 2018 08:17:46 -0700 (PDT) Received: from cloudburst.twiddle.net (97-126-112-211.tukw.qwest.net. [97.126.112.211]) by smtp.gmail.com with ESMTPSA id s185-v6sm4834201pfb.116.2018.07.03.08.17.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 08:17:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=m+eauDzkbLO8Pb2FKzAIybKR1kdYA2iqGOrOBkGxKK4=; b=B5rGs70Sk7Gw9OC8cwZcVZGU1+fQm3F69JhCioDp3eMVSRwasiEttbr7ggGWKar81+ RQ3gJxGIvsEeV0mNv52FdKwHNUfc77dNSNOoWqE3mbvdJdiI7cypue/0uOaF8xuCatNq HtKCAdK/UWEHFYLx0LCR7k6AG463UGeRb2+wM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=m+eauDzkbLO8Pb2FKzAIybKR1kdYA2iqGOrOBkGxKK4=; b=lQj/EP0tG2pu1CBUapdGxxk5Ad2YSHipdK9yROrgOn7YT+KQNoRq8j6Ir+rTz6oFxa oH+ptjISSi31UsdlWUEa1lxHjp0O+DZTxk9FWSSl5InXnaP3yUhwxuO8OV9neufR/XBx Pxd2GE3VaVQTjWPHvvlNXOm3+GSyS2Co7xRNs67bhSGzJ1jGqW/Iw6eNAZHiW72IEq5n Zsz0WHiaDRT/7xTVFhSw9Zo/K7VNTatGg3ZOQQxZDDZP33n/cRVF8Wr15HRy13xK64XP L1oyY7/fAOdmHNydWIPIJueK9Ygn+CXtcIFvSmMoD77j47O6tipbh8etwF7DFVwk9Ypw jMzQ== X-Gm-Message-State: APt69E3IeURpPNrMBwpGl7TfmTDLfTPT5Ca7aRHZJ5zLYjDx7zP/WjCe SJkOEMDai/kQuN4WZCE4bw3q4e0Xttw= X-Google-Smtp-Source: AAOMgpcOSOlEdbNmiRPBO3g2BZUYYiqwMdOQbSrmXDsxkpqH524N9j2Im7oRU5lon70vIYyC6ssqvQ== X-Received: by 2002:a63:161a:: with SMTP id w26-v6mr5252151pgl.257.1530631065339; Tue, 03 Jul 2018 08:17:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 3 Jul 2018 08:17:32 -0700 Message-Id: <20180703151732.29843-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703151732.29843-1-richard.henderson@linaro.org> References: <20180703151732.29843-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::22e Subject: [Qemu-devel] [PATCH 7/7] target/ppc: Use non-arithmetic conversions for fp load/store X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: programmingkidx@gmail.com, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Memory operations have no side effects on fp state. The use of a "real" conversions between float64 and float32 would raise exceptions for SNaN and out-of-range inputs. Signed-off-by: Richard Henderson --- target/ppc/helper.h | 4 +- target/ppc/fpu_helper.c | 63 ++++++++++++++++++++++++------ target/ppc/translate/fp-impl.inc.c | 26 +++++------- 3 files changed, 62 insertions(+), 31 deletions(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index cc3d031407..33e6e1df60 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -61,8 +61,8 @@ DEF_HELPER_2(compute_fprf_float64, void, env, i64) DEF_HELPER_3(store_fpscr, void, env, i64, i32) DEF_HELPER_2(fpscr_clrbit, void, env, i32) DEF_HELPER_2(fpscr_setbit, void, env, i32) -DEF_HELPER_2(float64_to_float32, i32, env, i64) -DEF_HELPER_2(float32_to_float64, i64, env, i32) +DEF_HELPER_FLAGS_1(todouble, TCG_CALL_NO_RWG_SE, i64, i32) +DEF_HELPER_FLAGS_1(tosingle, TCG_CALL_NO_RWG_SE, i32, i64) =20 DEF_HELPER_4(fcmpo, void, env, i64, i64, i32) DEF_HELPER_4(fcmpu, void, env, i64, i64, i32) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 1e195487d3..d4e9e3bccb 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -47,24 +47,61 @@ static inline bool fp_exceptions_enabled(CPUPPCState *e= nv) =20 /*************************************************************************= ****/ /* Floating point operations helpers */ -uint64_t helper_float32_to_float64(CPUPPCState *env, uint32_t arg) -{ - CPU_FloatU f; - CPU_DoubleU d; =20 - f.l =3D arg; - d.d =3D float32_to_float64(f.f, &env->fp_status); - return d.ll; +/* + * This is the non-arithmatic conversion that happens e.g. on loads. + * In the Power ISA pseudocode, this is called DOUBLE. + */ +uint64_t helper_todouble(uint32_t arg) +{ + uint32_t abs_arg =3D arg & 0x7fffffff; + uint64_t ret; + + if (likely(abs_arg >=3D 0x00800000)) { + /* Normalized operand, or Inf, or NaN. */ + ret =3D (uint64_t)extract32(arg, 30, 2) << 62; + ret |=3D ((extract32(arg, 30, 1) ^ 1) * (uint64_t)7) << 59; + ret |=3D (uint64_t)extract32(arg, 0, 29) << 29; + } else { + /* Zero or Denormalized operand. */ + ret =3D (uint64_t)extract32(arg, 31, 1) << 63; + if (unlikely(abs_arg !=3D 0)) { + /* Denormalized operand. */ + int shift =3D clz32(abs_arg) - 9; + int exp =3D -126 - shift + 1023; + ret |=3D (uint64_t)exp << 52; + ret |=3D abs_arg << (shift + 29); + } + } + return ret; } =20 -uint32_t helper_float64_to_float32(CPUPPCState *env, uint64_t arg) +/* + * This is the non-arithmatic conversion that happens e.g. on stores. + * In the Power ISA pseudocode, this is called SINGLE. + */ +uint32_t helper_tosingle(uint64_t arg) { - CPU_FloatU f; - CPU_DoubleU d; + int exp =3D extract64(arg, 52, 11); + uint32_t ret; =20 - d.ll =3D arg; - f.f =3D float64_to_float32(d.d, &env->fp_status); - return f.l; + if (likely(exp > 896)) { + /* No denormalization required (includes Inf, NaN). */ + ret =3D extract64(arg, 62, 2) << 30; + ret |=3D extract64(arg, 29, 29); + } else { + /* Zero or Denormal result. If the exponent is in bounds for + * a single-precision denormal result, extract the proper bits. + * If the input is not zero, and the exponent is out of bounds, + * then the result is undefined; this underflows to zero. + */ + ret =3D extract64(arg, 63, 1) << 63; + if (unlikely(exp >=3D 874)) { + /* Denormal result. */ + ret |=3D ((1ULL << 52) | extract64(arg, 0, 52)) >> (896 + 30 -= exp); + } + } + return ret; } =20 static inline int ppc_float32_get_unbiased_exp(float32 f) diff --git a/target/ppc/translate/fp-impl.inc.c b/target/ppc/translate/fp-i= mpl.inc.c index 2fbd4d4f38..a6f522b85c 100644 --- a/target/ppc/translate/fp-impl.inc.c +++ b/target/ppc/translate/fp-impl.inc.c @@ -660,15 +660,12 @@ GEN_LDUF(name, ldop, op | 0x21, type); = \ GEN_LDUXF(name, ldop, op | 0x01, type); = \ GEN_LDXF(name, ldop, 0x17, op | 0x00, type) =20 -static inline void gen_qemu_ld32fs(DisasContext *ctx, TCGv_i64 arg1, TCGv = arg2) +static void gen_qemu_ld32fs(DisasContext *ctx, TCGv_i64 dest, TCGv addr) { - TCGv t0 =3D tcg_temp_new(); - TCGv_i32 t1 =3D tcg_temp_new_i32(); - gen_qemu_ld32u(ctx, t0, arg2); - tcg_gen_trunc_tl_i32(t1, t0); - tcg_temp_free(t0); - gen_helper_float32_to_float64(arg1, cpu_env, t1); - tcg_temp_free_i32(t1); + TCGv_i32 tmp =3D tcg_temp_new_i32(); + tcg_gen_qemu_ld_i32(tmp, addr, ctx->mem_idx, DEF_MEMOP(MO_UL)); + gen_helper_todouble(dest, tmp); + tcg_temp_free_i32(tmp); } =20 /* lfd lfdu lfdux lfdx */ @@ -836,15 +833,12 @@ GEN_STUF(name, stop, op | 0x21, type); = \ GEN_STUXF(name, stop, op | 0x01, type); = \ GEN_STXF(name, stop, 0x17, op | 0x00, type) =20 -static inline void gen_qemu_st32fs(DisasContext *ctx, TCGv_i64 arg1, TCGv = arg2) +static void gen_qemu_st32fs(DisasContext *ctx, TCGv_i64 src, TCGv addr) { - TCGv_i32 t0 =3D tcg_temp_new_i32(); - TCGv t1 =3D tcg_temp_new(); - gen_helper_float64_to_float32(t0, cpu_env, arg1); - tcg_gen_extu_i32_tl(t1, t0); - tcg_temp_free_i32(t0); - gen_qemu_st32(ctx, t1, arg2); - tcg_temp_free(t1); + TCGv_i32 tmp =3D tcg_temp_new_i32(); + gen_helper_tosingle(tmp, src); + tcg_gen_qemu_st_i32(tmp, addr, ctx->mem_idx, DEF_MEMOP(MO_UL)); + tcg_temp_free_i32(tmp); } =20 /* stfd stfdu stfdux stfdx */ --=20 2.17.1