From nobody Tue Nov 4 18:52:28 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530598184468716.9760648072289; Mon, 2 Jul 2018 23:09:44 -0700 (PDT) Received: from localhost ([::1]:37989 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faEVT-00033f-Hp for importer@patchew.org; Tue, 03 Jul 2018 02:09:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39575) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1faEKP-0002lX-So for qemu-devel@nongnu.org; Tue, 03 Jul 2018 01:58:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1faEKO-0006sy-3x for qemu-devel@nongnu.org; Tue, 03 Jul 2018 01:58:17 -0400 Received: from ozlabs.org ([203.11.71.1]:53929) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1faEKN-0006ie-F1; Tue, 03 Jul 2018 01:58:16 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 41KYM55j23z9s47; Tue, 3 Jul 2018 15:58:08 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1530597489; bh=BGRo2Zq1oxU7IIBKCeAnCP2UaipZODTx41HKR8QmLtY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TEOcTPQhFBTNtkGMk4aItn4VtCbEQHMVJQm8xXhg4Yc9hGVsh/2E28096dQdLZwJG Mli2KlpH2Sa3iYchwibdlCVtsJSiHqm7wv3uwq8wDsxv6olI5M6sLr3Myw7ZVnUGcG gwENHwAjmjwrlL1qEYVqMCx5FtoZP7rXYW5VGYOA= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 3 Jul 2018 15:57:34 +1000 Message-Id: <20180703055804.13449-6-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180703055804.13449-1-david@gibson.dropbear.id.au> References: <20180703055804.13449-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 05/35] ppc/xics: introduce a parent_realize in ICSStateClass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, aik@ozlabs.ru, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater This makes possible to move the common ICSState code of the realize handlers in the ics-base class. Signed-off-by: C=C3=A9dric Le Goater Signed-off-by: David Gibson --- hw/intc/xics.c | 37 ++++++++++++++++++++++--------------- hw/intc/xics_kvm.c | 20 +++++++++++++++----- include/hw/ppc/xics.h | 3 ++- 3 files changed, 39 insertions(+), 21 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 063491f387..d6066d561f 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -618,30 +618,31 @@ static void ics_simple_initfn(Object *obj) ics->offset =3D XICS_IRQ_BASE; } =20 -static void ics_simple_realize(ICSState *ics, Error **errp) +static void ics_simple_realize(DeviceState *dev, Error **errp) { - if (!ics->nr_irqs) { - error_setg(errp, "Number of interrupts needs to be greater 0"); + ICSState *ics =3D ICS_SIMPLE(dev); + ICSStateClass *icsc =3D ICS_BASE_GET_CLASS(ics); + Error *local_err =3D NULL; + + icsc->parent_realize(dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); return; } - ics->irqs =3D g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); + ics->qirqs =3D qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irq= s); =20 qemu_register_reset(ics_simple_reset, ics); } =20 -static Property ics_simple_properties[] =3D { - DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0), - DEFINE_PROP_END_OF_LIST(), -}; - static void ics_simple_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); ICSStateClass *isc =3D ICS_BASE_CLASS(klass); =20 - isc->realize =3D ics_simple_realize; - dc->props =3D ics_simple_properties; + device_class_set_parent_realize(dc, ics_simple_realize, + &isc->parent_realize); + dc->vmsd =3D &vmstate_ics_simple; isc->reject =3D ics_simple_reject; isc->resend =3D ics_simple_resend; @@ -659,7 +660,6 @@ static const TypeInfo ics_simple_info =3D { =20 static void ics_base_realize(DeviceState *dev, Error **errp) { - ICSStateClass *icsc =3D ICS_BASE_GET_CLASS(dev); ICSState *ics =3D ICS_BASE(dev); Object *obj; Error *err =3D NULL; @@ -672,17 +672,24 @@ static void ics_base_realize(DeviceState *dev, Error = **errp) } ics->xics =3D XICS_FABRIC(obj); =20 - - if (icsc->realize) { - icsc->realize(ics, errp); + if (!ics->nr_irqs) { + error_setg(errp, "Number of interrupts needs to be greater 0"); + return; } + ics->irqs =3D g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); } =20 +static Property ics_base_properties[] =3D { + DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0), + DEFINE_PROP_END_OF_LIST(), +}; + static void ics_base_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->realize =3D ics_base_realize; + dc->props =3D ics_base_properties; } =20 static const TypeInfo ics_base_info =3D { diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index f511e50a80..1f27eb4979 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -345,13 +345,17 @@ static void ics_kvm_reset(void *dev) ics_set_kvm_state(ics, 1); } =20 -static void ics_kvm_realize(ICSState *ics, Error **errp) +static void ics_kvm_realize(DeviceState *dev, Error **errp) { - if (!ics->nr_irqs) { - error_setg(errp, "Number of interrupts needs to be greater 0"); + ICSState *ics =3D ICS_KVM(dev); + ICSStateClass *icsc =3D ICS_BASE_GET_CLASS(ics); + Error *local_err =3D NULL; + + icsc->parent_realize(dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); return; } - ics->irqs =3D g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); ics->qirqs =3D qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs); =20 qemu_register_reset(ics_kvm_reset, ics); @@ -360,8 +364,14 @@ static void ics_kvm_realize(ICSState *ics, Error **err= p) static void ics_kvm_class_init(ObjectClass *klass, void *data) { ICSStateClass *icsc =3D ICS_BASE_CLASS(klass); + DeviceClass *dc =3D DEVICE_CLASS(klass); + + /* + * Use device_class_set_parent_realize() when ics-kvm inherits + * directly from ics-base and not from ics-simple anymore. + */ + dc->realize =3D ics_kvm_realize; =20 - icsc->realize =3D ics_kvm_realize; icsc->pre_save =3D ics_get_kvm_state; icsc->post_load =3D ics_set_kvm_state; icsc->synchronize_state =3D ics_synchronize_state; diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 4b04b295a7..44e96e6400 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -115,7 +115,8 @@ struct PnvICPState { struct ICSStateClass { DeviceClass parent_class; =20 - void (*realize)(ICSState *s, Error **errp); + DeviceRealize parent_realize; + void (*pre_save)(ICSState *s); int (*post_load)(ICSState *s, int version_id); void (*reject)(ICSState *s, uint32_t irq); --=20 2.17.1