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[124.44.6.90]) by smtp.gmail.com with ESMTPSA id h10-v6sm26532005pgn.42.2018.07.02.06.58.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Jul 2018 06:58:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0AwTJ+88ZGHtSYhFlyrIVloh3Xf4GpNuS/w+tenewKg=; b=WLFSMkYLPp+yaV+eGbxjr286Bu89Jn4M5k9qWsf58G8nJz9PxDkHru/BboQ9w3yMpO 34Y/GBC5ITBcXuzuDtq76gH/uTxeIzqZhzyhtGGmo1/a+zvarKiTAxZ3kX/5yMS2hd8r 1wKF7WWYQE6eWhihSGhBVlRxzagi6N9d7z1DeUxb7LiwD39ROrRyExaKuHXe74YJ+gBd WDQKluQJojA1h21mFFyjOMZlyAUZaUhwzgb+7SBMHJRKUHdKqbyVU2Fn7+K1jbMsJ9pt kkqGLSW9UlVqMvns7bdyVOkYZP7GBUqCYRwHaeJQlTUUEkHDUExuNRsEAim/hANL2T4o HD3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0AwTJ+88ZGHtSYhFlyrIVloh3Xf4GpNuS/w+tenewKg=; b=EdPdI+jrmo5vKudogLfPbaLfG+o8lMHGho6KN2NgUfDx0r7jZ+yexwxIDRV4x/PECm MojPl+XIdQF9VF11ooq4JeKOW98yHNkby9BbXxlZ4zhTZPvgUXwLLKx3chuHXBIFI1tG DKvtAAVCpFqEYdxip6T+tj5eLJdCTMBA2JOJaUiNyUKRf527oVWpJluyET96QMDPNreO FnekpM5hvLspcxoySUE1dTHWIf/AX9yD+m3VcAL2ZJ7RS0fJ5FAr0NxOU00gE0nmQOmm es75e14TdkWkZkBZALXm9MaP4dRykPtRLD14IGiK8YgsiNR+Tux6N0Gqrv1t2syQVphK R4bw== X-Gm-Message-State: APt69E3iW0OXTUfmOgWXR9r8Cad21O7TAKKO9aCbUJJtm4fy6b27ocxP uxq6xD7WPTdPe3doTC1Hbcg= X-Google-Smtp-Source: AAOMgpd3hGSi2owVY2DN9NPDGcFqdVekvFC320ZRWcdWAU/2IfbIQ4kCKB2ZmHCyyLGq75Y4XyJC3Q== X-Received: by 2002:a63:4f63:: with SMTP id p35-v6mr170490pgl.167.1530539910143; Mon, 02 Jul 2018 06:58:30 -0700 (PDT) From: Stafford Horne To: Peter Maydell Date: Mon, 2 Jul 2018 22:57:48 +0900 Message-Id: <20180702135806.7087-8-shorne@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180702135806.7087-1-shorne@gmail.com> References: <20180702135806.7087-1-shorne@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PULL 07/25] target/openrisc: Link more translation blocks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stafford Horne , Richard Henderson , QEMU Development Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Track direct jumps via dc->jmp_pc_imm. Use that in preference to jmp_pc when possible. Emit goto_tb in that case, and lookup_and_goto_tb otherwise. Reviewed-by: Stafford Horne Signed-off-by: Richard Henderson Signed-off-by: Stafford Horne --- target/openrisc/translate.c | 96 +++++++++++++++++++++---------------- 1 file changed, 55 insertions(+), 41 deletions(-) diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 22848b17ad..a618d39242 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -38,13 +38,16 @@ =20 /* is_jmp field values */ #define DISAS_EXIT DISAS_TARGET_0 /* force exit to main loop */ -#define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically= */ +#define DISAS_JUMP DISAS_TARGET_1 /* exit via jmp_pc/jmp_pc_imm */ =20 typedef struct DisasContext { DisasContextBase base; uint32_t mem_idx; uint32_t tb_flags; uint32_t delayed_branch; + + /* If not -1, jmp_pc contains this value and so is a direct jump. */ + target_ulong jmp_pc_imm; } DisasContext; =20 /* Include the auto-generated decoder. */ @@ -160,34 +163,6 @@ static void check_ov64s(DisasContext *dc) } \ } while (0) =20 -static inline bool use_goto_tb(DisasContext *dc, target_ulong dest) -{ - if (unlikely(dc->base.singlestep_enabled)) { - return false; - } - -#ifndef CONFIG_USER_ONLY - return (dc->base.tb->pc & TARGET_PAGE_MASK) =3D=3D (dest & TARGET_PAGE= _MASK); -#else - return true; -#endif -} - -static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest) -{ - if (use_goto_tb(dc, dest)) { - tcg_gen_movi_tl(cpu_pc, dest); - tcg_gen_goto_tb(n); - tcg_gen_exit_tb(dc->base.tb, n); - } else { - tcg_gen_movi_tl(cpu_pc, dest); - if (dc->base.singlestep_enabled) { - gen_exception(dc, EXCP_DEBUG); - } - tcg_gen_exit_tb(NULL, 0); - } -} - static void gen_ove_cy(DisasContext *dc) { if (dc->tb_flags & SR_OVE) { @@ -621,6 +596,7 @@ static bool trans_l_j(DisasContext *dc, arg_l_j *a, uin= t32_t insn) target_ulong tmp_pc =3D dc->base.pc_next + a->n * 4; =20 tcg_gen_movi_tl(jmp_pc, tmp_pc); + dc->jmp_pc_imm =3D tmp_pc; dc->delayed_branch =3D 2; return true; } @@ -634,6 +610,7 @@ static bool trans_l_jal(DisasContext *dc, arg_l_jal *a,= uint32_t insn) /* Optimize jal being used to load the PC for PIC. */ if (tmp_pc !=3D ret_pc) { tcg_gen_movi_tl(jmp_pc, tmp_pc); + dc->jmp_pc_imm =3D tmp_pc; dc->delayed_branch =3D 2; } return true; @@ -1267,6 +1244,8 @@ static void openrisc_tr_init_disas_context(DisasConte= xtBase *dcb, CPUState *cs) dc->mem_idx =3D cpu_mmu_index(env, false); dc->tb_flags =3D dc->base.tb->flags; dc->delayed_branch =3D (dc->tb_flags & TB_FLAGS_DFLAG) !=3D 0; + dc->jmp_pc_imm =3D -1; + bound =3D -(dc->base.pc_first | TARGET_PAGE_MASK) / 4; dc->base.max_insns =3D MIN(dc->base.max_insns, bound); } @@ -1319,37 +1298,72 @@ static void openrisc_tr_translate_insn(DisasContext= Base *dcbase, CPUState *cs) } dc->base.pc_next +=3D 4; =20 - /* delay slot */ - if (dc->delayed_branch) { - dc->delayed_branch--; - if (!dc->delayed_branch) { - tcg_gen_mov_tl(cpu_pc, jmp_pc); - tcg_gen_discard_tl(jmp_pc); - dc->base.is_jmp =3D DISAS_UPDATE; - return; - } + /* When exiting the delay slot normally, exit via jmp_pc. + * For DISAS_NORETURN, we have raised an exception and already exited. + * For DISAS_EXIT, we found l.rfe in a delay slot. There's nothing + * in the manual saying this is illegal, but it surely it should. + * At least or1ksim overrides pcnext and ignores the branch. + */ + if (dc->delayed_branch + && --dc->delayed_branch =3D=3D 0 + && dc->base.is_jmp =3D=3D DISAS_NEXT) { + dc->base.is_jmp =3D DISAS_JUMP; } } =20 static void openrisc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); + target_ulong jmp_dest; =20 /* If we have already exited the TB, nothing following has effect. */ if (dc->base.is_jmp =3D=3D DISAS_NORETURN) { return; } =20 + /* Adjust the delayed branch state for the next TB. */ if ((dc->tb_flags & TB_FLAGS_DFLAG ? 1 : 0) !=3D (dc->delayed_branch != =3D 0)) { tcg_gen_movi_i32(cpu_dflag, dc->delayed_branch !=3D 0); } =20 - tcg_gen_movi_tl(cpu_ppc, dc->base.pc_next - 4); + /* For DISAS_TOO_MANY, jump to the next insn. */ + jmp_dest =3D dc->base.pc_next; + tcg_gen_movi_tl(cpu_ppc, jmp_dest - 4); + switch (dc->base.is_jmp) { + case DISAS_JUMP: + jmp_dest =3D dc->jmp_pc_imm; + if (jmp_dest =3D=3D -1) { + /* The jump destination is indirect/computed; use jmp_pc. */ + tcg_gen_mov_tl(cpu_pc, jmp_pc); + tcg_gen_discard_tl(jmp_pc); + if (unlikely(dc->base.singlestep_enabled)) { + gen_exception(dc, EXCP_DEBUG); + } else { + tcg_gen_lookup_and_goto_ptr(); + } + break; + } + /* The jump destination is direct; use jmp_pc_imm. + However, we will have stored into jmp_pc as well; + we know now that it wasn't needed. */ + tcg_gen_discard_tl(jmp_pc); + /* fallthru */ + case DISAS_TOO_MANY: - gen_goto_tb(dc, 0, dc->base.pc_next); + if (unlikely(dc->base.singlestep_enabled)) { + tcg_gen_movi_tl(cpu_pc, jmp_dest); + gen_exception(dc, EXCP_DEBUG); + } else if ((dc->base.pc_first ^ jmp_dest) & TARGET_PAGE_MASK) { + tcg_gen_movi_tl(cpu_pc, jmp_dest); + tcg_gen_lookup_and_goto_ptr(); + } else { + tcg_gen_goto_tb(0); + tcg_gen_movi_tl(cpu_pc, jmp_dest); + tcg_gen_exit_tb(dc->base.tb, 0); + } break; - case DISAS_UPDATE: + case DISAS_EXIT: if (unlikely(dc->base.singlestep_enabled)) { gen_exception(dc, EXCP_DEBUG); --=20 2.17.0