From nobody Thu Dec 18 22:21:26 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530286019592442.63584635676784; Fri, 29 Jun 2018 08:26:59 -0700 (PDT) Received: from localhost ([::1]:42946 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYvIY-0001k7-Lc for importer@patchew.org; Fri, 29 Jun 2018 11:26:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34211) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYun4-0007lZ-7x for qemu-devel@nongnu.org; Fri, 29 Jun 2018 10:54:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fYun3-0007Wy-EU for qemu-devel@nongnu.org; Fri, 29 Jun 2018 10:54:26 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:43122) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fYun3-0007UV-7c for qemu-devel@nongnu.org; Fri, 29 Jun 2018 10:54:25 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fYun2-0004mZ-4Y for qemu-devel@nongnu.org; Fri, 29 Jun 2018 15:54:24 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 29 Jun 2018 15:53:34 +0100 Message-Id: <20180629145347.652-43-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180629145347.652-1-peter.maydell@linaro.org> References: <20180629145347.652-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 42/55] target/arm: support reading of CNT[VCT|FRQ]_EL0 from user-space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e Since kernel commit a86bd139f2 (arm64: arch_timer: Enable CNTVCT_EL0 trap..), released in kernel version v4.12, user-space has been able to read these system registers. As we can't use QEMUTimer's in linux-user mode we just directly call cpu_get_clock(). Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Message-id: 20180625160009.17437-2-alex.bennee@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/helper.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index b19c7ace785..d0786e0c210 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2167,11 +2167,32 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[= ] =3D { }; =20 #else -/* In user-mode none of the generic timer registers are accessible, - * and their implementation depends on QEMU_CLOCK_VIRTUAL and qdev gpio ou= tputs, - * so instead just don't register any of them. + +/* In user-mode most of the generic timer registers are inaccessible + * however modern kernels (4.12+) allow access to cntvct_el0 */ + +static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri) +{ + /* Currently we have no support for QEMUTimer in linux-user so we + * can't call gt_get_countervalue(env), instead we directly + * call the lower level functions. + */ + return cpu_get_clock() / GTIMER_SCALE; +} + static const ARMCPRegInfo generic_timer_cp_reginfo[] =3D { + { .name =3D "CNTFRQ_EL0", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 3, .crn =3D 14, .crm =3D 0, .opc2 =3D 0, + .type =3D ARM_CP_CONST, .access =3D PL0_R /* no PL1_RW in linux-user= */, + .fieldoffset =3D offsetof(CPUARMState, cp15.c14_cntfrq), + .resetvalue =3D NANOSECONDS_PER_SECOND / GTIMER_SCALE, + }, + { .name =3D "CNTVCT_EL0", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 3, .crn =3D 14, .crm =3D 0, .opc2 =3D 2, + .access =3D PL0_R, .type =3D ARM_CP_NO_RAW | ARM_CP_IO, + .readfn =3D gt_virt_cnt_read, + }, REGINFO_SENTINEL }; =20 --=20 2.17.1