From nobody Tue Feb 10 11:34:18 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530279454057152.67324689033444; Fri, 29 Jun 2018 06:37:34 -0700 (PDT) Received: from localhost ([::1]:42190 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYtaf-0004ZI-9W for importer@patchew.org; Fri, 29 Jun 2018 09:37:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38103) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYtUH-0007hV-A8 for qemu-devel@nongnu.org; Fri, 29 Jun 2018 09:31:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fYtUC-0007JW-Uj for qemu-devel@nongnu.org; Fri, 29 Jun 2018 09:30:57 -0400 Received: from greensocs.com ([193.104.36.180]:58622) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYtU2-0006nW-H2; Fri, 29 Jun 2018 09:30:43 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id F36D44434B5; Fri, 29 Jun 2018 15:30:40 +0200 (CEST) Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id te0kfxsKMRLD; Fri, 29 Jun 2018 15:30:39 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id 3CF154434BA; Fri, 29 Jun 2018 15:30:39 +0200 (CEST) Received: from michell-laptop.hive.antfield.fr (LFbn-LYO-1-488-36.w2-7.abo.wanadoo.fr [2.7.77.36]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: luc.michel@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id BD2EF4434B8; Fri, 29 Jun 2018 15:30:38 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1530279041; bh=PIhnC8PVzlvZ+ddBfg9Qq1hRX0bI4MURM++5ytkZF98=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=YBFeVsEYmdoAp75dxdQRN6tv1MbHuF0SovfzQLxAkosNhMR9oFmKqYQptl+micFXY pg9+tAdbCalNiYnm6hd2ejhlwuMj7tkz/Ent0OS7XTGKsUqcdzCbIdqOBUlsost9o8 QNlJkgOCSi6+ujLuKdFQgg0x8l5y2BqP0kj4Fv4E= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=KcgyqTr4; dkim=pass (1024-bit key) header.d=greensocs.com header.b=KcgyqTr4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1530279039; bh=PIhnC8PVzlvZ+ddBfg9Qq1hRX0bI4MURM++5ytkZF98=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=KcgyqTr44Gymd6XuT+qQ3tEpFb6ZgGDe4OeTQpOJLTTksDD63ThvFV8S0VvYlDrVl +YtgR7jEq8YhXz1p3WvVlK6g27ySqKiY71rqPfvOYXRtitMi0d7okepMcMOXTeu6ca 4HkLwnJYYQEUM8YygTQye25fAnzJpLJjdN9aqbkU= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1530279039; bh=PIhnC8PVzlvZ+ddBfg9Qq1hRX0bI4MURM++5ytkZF98=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=KcgyqTr44Gymd6XuT+qQ3tEpFb6ZgGDe4OeTQpOJLTTksDD63ThvFV8S0VvYlDrVl +YtgR7jEq8YhXz1p3WvVlK6g27ySqKiY71rqPfvOYXRtitMi0d7okepMcMOXTeu6ca 4HkLwnJYYQEUM8YygTQye25fAnzJpLJjdN9aqbkU= From: Luc Michel To: qemu-devel@nongnu.org Date: Fri, 29 Jun 2018 15:29:48 +0200 Message-Id: <20180629132954.24269-15-luc.michel@greensocs.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180629132954.24269-1-luc.michel@greensocs.com> References: <20180629132954.24269-1-luc.michel@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [PATCH v3 14/20] intc/arm_gic: Wire the vCPU interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , mark.burton@greensocs.com, saipava@xilinx.com, edgari@xilinx.com, qemu-arm@nongnu.org, Jan Kiszka , Luc Michel Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (found 2 invalid signatures) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the read/write functions to handle accesses to the vCPU interface. Those accesses are forwarded to the real CPU interface, with the CPU id being converted to the corresponding vCPU id (vCPU id =3D CPU id + GIC_NCPU). As for the CPU interface, we create a base region for the vCPU interface that fetches the current vCPU id using the current_cpu global variable, and one mirror region per vCPU which maps to that specific vCPU id. This is required by the GIC architecture specification. Signed-off-by: Luc Michel --- hw/intc/arm_gic.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 70 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 2b1fa280eb..9bbd544a5c 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -1488,6 +1488,46 @@ static MemTxResult gic_do_cpu_write(void *opaque, hw= addr addr, GICState *s =3D *backref; int id =3D (backref - s->backref); return gic_cpu_write(s, id, addr, value, attrs); + +} + +static MemTxResult gic_thisvcpu_read(void *opaque, hwaddr addr, uint64_t *= data, + unsigned size, MemTxAttrs attrs) +{ + GICState *s =3D (GICState *)opaque; + + return gic_cpu_read(s, gic_get_current_vcpu(s), addr, data, attrs); +} + +static MemTxResult gic_thisvcpu_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size, + MemTxAttrs attrs) +{ + GICState *s =3D (GICState *)opaque; + + return gic_cpu_write(s, gic_get_current_vcpu(s), addr, value, attrs); +} + +static MemTxResult gic_do_vcpu_read(void *opaque, hwaddr addr, uint64_t *d= ata, + unsigned size, MemTxAttrs attrs) +{ + GICState **backref =3D (GICState **)opaque; + GICState *s =3D *backref; + int id =3D (backref - s->backref); + + return gic_cpu_read(s, id + GIC_NCPU, addr, data, attrs); +} + +static MemTxResult gic_do_vcpu_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size, + MemTxAttrs attrs) +{ + GICState **backref =3D (GICState **)opaque; + GICState *s =3D *backref; + int id =3D (backref - s->backref); + + return gic_cpu_write(s, id + GIC_NCPU, addr, value, attrs); + } =20 static const MemoryRegionOps gic_ops[2] =3D { @@ -1509,6 +1549,25 @@ static const MemoryRegionOps gic_cpu_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 +static const MemoryRegionOps gic_virt_ops[2] =3D { + { + .read_with_attrs =3D NULL, + .write_with_attrs =3D NULL, + .endianness =3D DEVICE_NATIVE_ENDIAN, + }, + { + .read_with_attrs =3D gic_thisvcpu_read, + .write_with_attrs =3D gic_thisvcpu_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + } +}; + +static const MemoryRegionOps gic_vcpu_ops =3D { + .read_with_attrs =3D gic_do_vcpu_read, + .write_with_attrs =3D gic_do_vcpu_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, +}; + static void arm_gic_realize(DeviceState *dev, Error **errp) { /* Device instance realize function for the GIC sysbus device */ @@ -1531,7 +1590,7 @@ static void arm_gic_realize(DeviceState *dev, Error *= *errp) } =20 /* This creates distributor and main CPU interface (s->cpuiomem[0]) */ - gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops, NULL); + gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops, gic_virt_ops); =20 /* Extra core-specific regions for the CPU interfaces. This is * necessary for "franken-GIC" implementations, for example on @@ -1547,6 +1606,16 @@ static void arm_gic_realize(DeviceState *dev, Error = **errp) &s->backref[i], "gic_cpu", 0x100); sysbus_init_mmio(sbd, &s->cpuiomem[i+1]); } + + if (s->virt_extn) { + for (i =3D 0; i < s->num_cpu; i++) { + memory_region_init_io(&s->vcpuiomem[i + 1], OBJECT(s), + &gic_vcpu_ops, &s->backref[i], + "gic_vcpu", 0x2000); + sysbus_init_mmio(sbd, &s->vcpuiomem[i + 1]); + } + } + } =20 static void arm_gic_class_init(ObjectClass *klass, void *data) --=20 2.17.1