From nobody Mon Feb 9 12:00:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530071501388268.97284380704366; Tue, 26 Jun 2018 20:51:41 -0700 (PDT) Received: from localhost ([::1]:56321 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1UY-0007ZY-9J for importer@patchew.org; Tue, 26 Jun 2018 23:51:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35772) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1Su-0006eN-9p for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fY1Sr-00061a-6r for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:56 -0400 Received: from aserp2130.oracle.com ([141.146.126.79]:59414) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fY1Sq-0005wt-Th for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:53 -0400 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5R3mwSf074521; Wed, 27 Jun 2018 03:49:49 GMT Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by aserp2130.oracle.com with ESMTP id 2jukmtu4r7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:49 +0000 Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w5R3nn6h011862 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:49 GMT Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w5R3nmXX019323; Wed, 27 Jun 2018 03:49:48 GMT Received: from troi.attlocal.net (/10.154.103.180) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 26 Jun 2018 20:49:48 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=tiIYSssSEiM69+O27q16WonleeIxnikCjunTkJg7fEQ=; b=Qtv9Qs45LDqKXhd5z6kg9g+lRn2Vrah/OmlAaAqej6h4jMxT4YI6PWkDdVCfBYej/cZ/ qQ3ZjQtlQLPminqTFN1WZk0F2FedRlpduN4eObBEGeIeoZkrHzgsAO4+Clw/RofIg1ou FKBw+3T447m1bV8S9KOgCZnrFvor+boouKKZ6HO2k3WPOeq4I7j6/cLtE4r+j5Z3BevH DS9tJq1WXaHVn4NPUPOj3FHzNulfv8P6MI+X9nVD5oU/XQHj3Ufn6IriyOyzEldrkoSo kK9322TeJGTR5JGJ5A6ieJLtkJFXtML1sfQfkEMHQLdlsjO7B4pFRPLGckeHuONzyeYn YA== From: Venu Busireddy To: venu.busireddy@oracle.com, "Michael S . Tsirkin" , Marcel Apfelbaum Date: Tue, 26 Jun 2018 22:49:31 -0500 Message-Id: <20180627034935.20276-2-venu.busireddy@oracle.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180627034935.20276-1-venu.busireddy@oracle.com> References: <20180627034935.20276-1-venu.busireddy@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8936 signatures=668703 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1806270042 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 141.146.126.79 Subject: [Qemu-devel] [PATCH v2 1/4] Add a true or false option to the DEFINE_PROP_UUID macro. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: virtio-dev@lists.oasis-open.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" It may not always be desirable to have a random UUID stuffed into the '_field' member. Add a new boolean option '_default' that will allow the caller to specify if a random UUID needs be generated or not. Also modified the instance where this macro is used. Signed-off-by: Venu Busireddy --- hw/acpi/vmgenid.c | 2 +- include/hw/qdev-properties.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c index d78b579a20..6d53757ee5 100644 --- a/hw/acpi/vmgenid.c +++ b/hw/acpi/vmgenid.c @@ -215,7 +215,7 @@ static void vmgenid_realize(DeviceState *dev, Error **e= rrp) } =20 static Property vmgenid_device_properties[] =3D { - DEFINE_PROP_UUID(VMGENID_GUID, VmGenIdState, guid), + DEFINE_PROP_UUID(VMGENID_GUID, VmGenIdState, guid, true), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index 4f60cc88f3..7d39a4bdcd 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -218,12 +218,12 @@ extern const PropertyInfo qdev_prop_off_auto_pcibar; DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_off_auto_pcibar, \ OffAutoPCIBAR) =20 -#define DEFINE_PROP_UUID(_name, _state, _field) { \ +#define DEFINE_PROP_UUID(_name, _state, _field, _default) { \ .name =3D (_name), \ .info =3D &qdev_prop_uuid, \ .offset =3D offsetof(_state, _field) \ + type_check(QemuUUID, typeof_field(_state, _field)), \ - .set_default =3D true, \ + .set_default =3D _default, \ } =20 #define DEFINE_PROP_END_OF_LIST() \ From nobody Mon Feb 9 12:00:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530071516724202.01817253010165; Tue, 26 Jun 2018 20:51:56 -0700 (PDT) Received: from localhost ([::1]:56322 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1Uq-0007mO-44 for importer@patchew.org; Tue, 26 Jun 2018 23:51:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35944) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1T4-0006lP-DL for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:50:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fY1T1-0006JC-9O for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:50:06 -0400 Received: from userp2130.oracle.com ([156.151.31.86]:58370) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fY1T0-0006I1-WF for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:50:03 -0400 Received: from pps.filterd (userp2130.oracle.com [127.0.0.1]) by userp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5R3nNig039329; Wed, 27 Jun 2018 03:50:00 GMT Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by userp2130.oracle.com with ESMTP id 2jum57u0jp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:50:00 +0000 Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w5R3nx0Z023575 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:59 GMT Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w5R3nxKZ019347; Wed, 27 Jun 2018 03:49:59 GMT Received: from troi.attlocal.net (/10.154.103.180) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 26 Jun 2018 20:49:58 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=Ovi+bRGIFjE2acKcnI/FbOa54O4jprl/f0zyjrZsID4=; b=rPGzewaFE4gQEDjCXus4+if47UHrfaaM69BGvq7Guw0u0JB/6Cz6IqMFagPbNII5V5Oa iBzECZRR8M+jvk/ILyZryJ6RZcx+/bgKf2RR/NbMzP3nbu0W90N4+OpI8Q8z1iE8kbFk H0F+ejARdmO5H89fvo1gectKXsMhR3gRnjsbyGDL+GNVFfKEy3ktnunx2Gx7zNT9/oWP h5ngDV5h+j+nQXoqbRa+6fTBwQ3HjeRXNDoWudKjGQp+/k91/4dHPe5rI8jfNLDQn45R Rxzn4cDjrZjoUmmLsDl+RG1XK02DEDkJyNBPymTH9x12yCAqwNoigJMLwHTXw5B9bx0n ug== From: Venu Busireddy To: venu.busireddy@oracle.com, "Michael S . Tsirkin" , Marcel Apfelbaum Date: Tue, 26 Jun 2018 22:49:35 -0500 Message-Id: <20180627034935.20276-6-venu.busireddy@oracle.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180627034935.20276-1-venu.busireddy@oracle.com> References: <20180627034935.20276-1-venu.busireddy@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8936 signatures=668703 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=984 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1806270042 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 156.151.31.86 Subject: [Qemu-devel] [PATCH v2 virtio 1/1] Add "Group Identifier" to virtio PCI capabilities. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: virtio-dev@lists.oasis-open.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add VIRTIO_PCI_CAP_GROUP_ID_CFG (Group Identifier) capability to the virtio PCI capabilities to allow for the grouping of devices. Signed-off-by: Venu Busireddy --- content.tex | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/content.tex b/content.tex index be18234..27581c1 100644 --- a/content.tex +++ b/content.tex @@ -599,6 +599,8 @@ The fields are interpreted as follows: #define VIRTIO_PCI_CAP_DEVICE_CFG 4 /* PCI configuration access */ #define VIRTIO_PCI_CAP_PCI_CFG 5 +/* Group Identifier */ +#define VIRTIO_PCI_CAP_GROUP_ID_CFG 6 \end{lstlisting} =20 Any other value is reserved for future use. @@ -997,6 +999,40 @@ address \field{cap.length} bytes within a BAR range specified by some other Virtio Structure PCI Capability of type other than \field{VIRTIO_PCI_CAP_PCI_CFG}. =20 +\subsubsection{Group Identifier capability}\label{sec:Virtio Transport Opt= ions / Virtio Over PCI Bus / PCI Device Layout / Group Identifier capabilit= y} + +The VIRTIO_PCI_CAP_GROUP_ID_CFG capability provides means for grouping dev= ices together. + +The capability is immediately followed by an identifier of arbitrary size = as below: + +\begin{lstlisting} +struct virtio_pci_group_id_cap { + struct virtio_pci_cap cap; + u8 group_id[]; /* Group Identifier */ +}; +\end{lstlisting} + +The fields \field{cap.bar}, \field{cap.length}, \field{cap.offset} +and \field{group_id} are read-only for the driver. + +The specification does not impose any restrictions on the structure +or size of group_id[], except that the size must be a multiple of 4. +Devices are free to declare this array as large as needed, as long as +the combined size of all capabilities can be accommodated within the +PCI configuration space. + +The field \field{cap.cap_len} indicates the length of the group identifier +\field{group_id}. The fields \field{cap.bar}, \field{cap.offset} and +\field{cap.length} should be set to 0. + +\devicenormative{\paragraph}{Group Identifier capability}{Virtio Transport= Options / Virtio Over PCI Bus / PCI Device Layout / Group Identifier capab= ility} + +The device MAY present the VIRTIO_PCI_CAP_GROUP_ID_CFG capability. + +\drivernormative{\paragraph}{Group Identifier capability}{Virtio Transport= Options / Virtio Over PCI Bus / PCI Device Layout / Group Identifier capab= ility} + +The driver MUST NOT write to group_id[] area. + \subsubsection{Legacy Interfaces: A Note on PCI Device Layout}\label{sec:V= irtio Transport Options / Virtio Over PCI Bus / PCI Device Layout / Legacy = Interfaces: A Note on PCI Device Layout} =20 Transitional devices MUST present part of configuration From nobody Mon Feb 9 12:00:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530071628144879.8070715099358; Tue, 26 Jun 2018 20:53:48 -0700 (PDT) Received: from localhost ([::1]:56332 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1Wd-0000hg-GC for importer@patchew.org; Tue, 26 Jun 2018 23:53:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35778) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1Su-0006eQ-Hf for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fY1Sr-00062Z-Tq for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:56 -0400 Received: from aserp2130.oracle.com ([141.146.126.79]:59440) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fY1Sr-00061V-K8 for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:53 -0400 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5R3nqVA075548; Wed, 27 Jun 2018 03:49:52 GMT Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by aserp2130.oracle.com with ESMTP id 2jukmtu4r9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:52 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w5R3np5O011927 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:51 GMT Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w5R3npHb007663; Wed, 27 Jun 2018 03:49:51 GMT Received: from troi.attlocal.net (/10.154.103.180) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 26 Jun 2018 20:49:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=uUW37LS1Y3akMqHPmM/UOhBtSjW/Vp26LlO7HXSizqY=; b=k9xYugaPIEyAq9fqo8feHptfygAf0wGfkrYt9UQ2yPKeLIpCM9Qb/U9aAgBVP/D7+POE tRCnCQSIZdLN1/W+2v2fPx5Ad+yk9hqNS5xMgOIB3Riokxr/ZuRpEL7OQGzH9J2yXVTF 4eXzuPQ1LMVWkLHYyK2oKLC8LtkHutYp/kNW52i5VgAeLjNQhdH76+wj+bfKyzkGh1dI NPAPpFnyZxT60FgoDFW7RJMiIxO8BgLGw7HErUJ2FZyqR4tjwjzF12OOQxUB5+REeUNY 62A6rK0de9N3tS5ePTyhI3zqCeRqEbPYvnYniSfrLw09F5zQKWLJQAZZwBAylYQPpbGF 2w== From: Venu Busireddy To: venu.busireddy@oracle.com, "Michael S . Tsirkin" , Marcel Apfelbaum Date: Tue, 26 Jun 2018 22:49:32 -0500 Message-Id: <20180627034935.20276-3-venu.busireddy@oracle.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180627034935.20276-1-venu.busireddy@oracle.com> References: <20180627034935.20276-1-venu.busireddy@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8936 signatures=668703 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1806270042 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 141.146.126.79 Subject: [Qemu-devel] [PATCH v2 2/4] Add "Group Identifier" support to virtio devices. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: virtio-dev@lists.oasis-open.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Use the virtio PCI capability "VIRTIO_PCI_CAP_GROUP_ID_CFG" to store the "Group Identifier" (UUID) specified via the command line option "uuid" for the virtio device. The capability will be present in the virtio device's configuration space iff the "uuid" option is specified. Group Identifier is used to pair a virtio device with a passthrough device. Signed-off-by: Venu Busireddy --- hw/virtio/virtio-pci.c | 15 +++++++++++++++ hw/virtio/virtio-pci.h | 3 ++- include/hw/pci/pci.h | 2 ++ include/standard-headers/linux/virtio_pci.h | 8 ++++++++ 4 files changed, 27 insertions(+), 1 deletion(-) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 3a01fe90f0..42703a5567 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -36,6 +36,7 @@ #include "qemu/range.h" #include "hw/virtio/virtio-bus.h" #include "qapi/visitor.h" +#include "qemu/uuid.h" =20 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present= (dev)) =20 @@ -1638,6 +1639,10 @@ static void virtio_pci_device_plugged(DeviceState *d= , Error **errp) .cap.cap_len =3D sizeof cfg, .cap.cfg_type =3D VIRTIO_PCI_CAP_PCI_CFG, }; + struct virtio_pci_group_id_cap group =3D { + .cap.cap_len =3D sizeof group, + .cap.cfg_type =3D VIRTIO_PCI_CAP_GROUP_ID_CFG, + }; struct virtio_pci_notify_cap notify_pio =3D { .cap.cap_len =3D sizeof notify, .notify_off_multiplier =3D cpu_to_le32(0x0), @@ -1647,6 +1652,11 @@ static void virtio_pci_device_plugged(DeviceState *d= , Error **errp) =20 virtio_pci_modern_regions_init(proxy); =20 + if (!qemu_uuid_is_null(&proxy->pci_dev.uuid)) { + memcpy(group.uuid, &proxy->pci_dev.uuid, sizeof(QemuUUID)); + virtio_pci_modern_mem_region_map(proxy, &proxy->group, &group.= cap); + } + virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); @@ -1763,6 +1773,10 @@ static void virtio_pci_realize(PCIDevice *pci_dev, E= rror **errp) proxy->device.size =3D 0x1000; proxy->device.type =3D VIRTIO_PCI_CAP_DEVICE_CFG; =20 + proxy->group.offset =3D 0; + proxy->group.size =3D 0; + proxy->group.type =3D VIRTIO_PCI_CAP_GROUP_ID_CFG; + proxy->notify.offset =3D 0x3000; proxy->notify.size =3D virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE= _MAX; proxy->notify.type =3D VIRTIO_PCI_CAP_NOTIFY_CFG; @@ -1898,6 +1912,7 @@ static Property virtio_pci_properties[] =3D { VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_INIT_PM_BIT, true), + DEFINE_PROP_UUID("uuid", PCIDevice, uuid, false), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 813082b0d7..e4592e90bf 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -164,10 +164,11 @@ struct VirtIOPCIProxy { VirtIOPCIRegion common; VirtIOPCIRegion isr; VirtIOPCIRegion device; + VirtIOPCIRegion group; VirtIOPCIRegion notify; VirtIOPCIRegion notify_pio; }; - VirtIOPCIRegion regs[5]; + VirtIOPCIRegion regs[6]; }; MemoryRegion modern_bar; MemoryRegion io_bar; diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 990d6fcbde..ee234c5a6f 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -4,6 +4,7 @@ #include "hw/qdev.h" #include "exec/memory.h" #include "sysemu/dma.h" +#include "qemu/uuid.h" =20 /* PCI includes legacy ISA access. */ #include "hw/isa/isa.h" @@ -343,6 +344,7 @@ struct PCIDevice { bool has_rom; MemoryRegion rom; uint32_t rom_bar; + QemuUUID uuid; =20 /* INTx routing notifier */ PCIINTxRoutingNotifier intx_routing_notifier; diff --git a/include/standard-headers/linux/virtio_pci.h b/include/standard= -headers/linux/virtio_pci.h index 9262acd130..f6de333f1d 100644 --- a/include/standard-headers/linux/virtio_pci.h +++ b/include/standard-headers/linux/virtio_pci.h @@ -113,6 +113,8 @@ #define VIRTIO_PCI_CAP_DEVICE_CFG 4 /* PCI configuration access */ #define VIRTIO_PCI_CAP_PCI_CFG 5 +/* Group Identifier */ +#define VIRTIO_PCI_CAP_GROUP_ID_CFG 6 =20 /* This is the PCI capability header: */ struct virtio_pci_cap { @@ -163,6 +165,12 @@ struct virtio_pci_cfg_cap { uint8_t pci_cfg_data[4]; /* Data for BAR access. */ }; =20 +/* Fields in VIRTIO_PCI_CAP_GROUP_ID_CFG: */ +struct virtio_pci_group_id_cap { + struct virtio_pci_cap cap; + uint8_t uuid[16]; +}; + /* Macro versions of offsets for the Old Timers! */ #define VIRTIO_PCI_CAP_VNDR 0 #define VIRTIO_PCI_CAP_NEXT 1 From nobody Mon Feb 9 12:00:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530071558073235.44528372113143; Tue, 26 Jun 2018 20:52:38 -0700 (PDT) Received: from localhost ([::1]:56323 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1VV-0008IL-E1 for importer@patchew.org; Tue, 26 Jun 2018 23:52:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35821) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1Sw-0006eg-36 for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fY1Sv-00069M-00 for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:58 -0400 Received: from aserp2130.oracle.com ([141.146.126.79]:59464) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fY1Su-00067q-QK for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:56 -0400 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5R3nKO9075160; Wed, 27 Jun 2018 03:49:55 GMT Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by aserp2130.oracle.com with ESMTP id 2jukmtu4rc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:55 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w5R3nshO011959 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:54 GMT Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w5R3nsfY007722; Wed, 27 Jun 2018 03:49:54 GMT Received: from troi.attlocal.net (/10.154.103.180) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 26 Jun 2018 20:49:54 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=C2tx10Sln0qnMBQrSH5Ft6DHhN+xGhhMzgBrZVD3K2M=; b=YbTQUpP5A7+P2fPyTeYq3FVFCaUIX7CgqL7aVxE3h6jbheZXJN9euz7VPoCa3Ce741Yq TKr0luc5vdnmbLgHuUNpO9QdIq0tdc2LyO0c+Jgu/TOFpSN7a/XtS0o4f60Il9TQF5/3 Xxbem7lkdv8/T0j5Qa6Ztc5j9r5+MlKcybwXyNcFgXikWlpKrsvZxm9MjbLWxxyg7Pi/ dHpm8YzkTZueojt2jiw0Yl+PFb229HVGDfL/k5XhkcvQSpUMswzKlFgPe5yzwH0s38kB RMbVs6TET32APDGisp42rSPMbo9xcD4TQrxgyUOJCuAsMyQuD+Zgbl90U8BO1QUHEnEP bg== From: Venu Busireddy To: venu.busireddy@oracle.com, "Michael S . Tsirkin" , Marcel Apfelbaum Date: Tue, 26 Jun 2018 22:49:33 -0500 Message-Id: <20180627034935.20276-4-venu.busireddy@oracle.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180627034935.20276-1-venu.busireddy@oracle.com> References: <20180627034935.20276-1-venu.busireddy@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8936 signatures=668703 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1806270042 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 141.146.126.79 Subject: [Qemu-devel] [PATCH v2 3/4] Add "Group Identifier" support to Red Hat PCI bridge. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: virtio-dev@lists.oasis-open.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the "Vendor-Specific" capability to the Red Hat PCI bridge device "pci-bridge", to contain the "Group Identifier" (UUID) that will be used to pair a virtio device with the passthrough device attached to that bridge. This capability is added to the bridge iff the "uuid" option is specified for the bridge. Signed-off-by: Venu Busireddy --- hw/pci-bridge/pci_bridge_dev.c | 8 ++++++++ hw/pci/pci_bridge.c | 26 ++++++++++++++++++++++++++ include/hw/pci/pcie.h | 1 + 3 files changed, 35 insertions(+) diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index b2d861d216..bbbc6fa1c6 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -71,6 +71,12 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error= **errp) bridge_dev->msi =3D ON_OFF_AUTO_OFF; } =20 + err =3D pci_bridge_vendor_init(dev, 0, errp); + if (err < 0) { + error_append_hint(errp, "Can't init group ID, error %d\n", err); + goto vendor_cap_err; + } + err =3D slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0, errp); if (err) { goto slotid_error; @@ -109,6 +115,7 @@ slotid_error: if (shpc_present(dev)) { shpc_cleanup(dev, &bridge_dev->bar); } +vendor_cap_err: shpc_error: pci_bridge_exitfn(dev); } @@ -162,6 +169,7 @@ static Property pci_bridge_dev_properties[] =3D { ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, PCI_BRIDGE_DEV_F_SHPC_REQ, true), + DEFINE_PROP_UUID(COMPAT_PROP_UUID, PCIDevice, uuid, false), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 40a39f57cb..cb8b3dad2a 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -34,12 +34,17 @@ #include "hw/pci/pci_bus.h" #include "qemu/range.h" #include "qapi/error.h" +#include "qemu/uuid.h" =20 /* PCI bridge subsystem vendor ID helper functions */ #define PCI_SSVID_SIZEOF 8 #define PCI_SSVID_SVID 4 #define PCI_SSVID_SSID 6 =20 +#define PCI_VENDOR_SIZEOF 20 +#define PCI_VENDOR_CAP_LEN_OFFSET 2 +#define PCI_VENDOR_GROUP_ID_OFFSET 4 + int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, uint16_t svid, uint16_t ssid, Error **errp) @@ -57,6 +62,27 @@ int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, return pos; } =20 +int pci_bridge_vendor_init(PCIDevice *d, uint8_t offset, Error **errp) +{ + int pos; + + if (qemu_uuid_is_null(&d->uuid)) { + return 0; + } + + pos =3D pci_add_capability(d, PCI_CAP_ID_VNDR, offset, PCI_VENDOR_SIZE= OF, + errp); + if (pos < 0) { + return pos; + } + + pci_set_word(d->config + pos + PCI_VENDOR_CAP_LEN_OFFSET, + PCI_VENDOR_SIZEOF); + memcpy(d->config + pos + PCI_VENDOR_GROUP_ID_OFFSET, &d->uuid, + sizeof(QemuUUID)); + return pos; +} + /* Accessor function to get parent bridge device from pci bus. */ PCIDevice *pci_bridge_get_device(PCIBus *bus) { diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index b71e369703..b4189d0ce3 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -82,6 +82,7 @@ struct PCIExpressDevice { }; =20 #define COMPAT_PROP_PCP "power_controller_present" +#define COMPAT_PROP_UUID "uuid" =20 /* PCI express capability helper functions */ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, From nobody Mon Feb 9 12:00:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530071673209917.790903570256; Tue, 26 Jun 2018 20:54:33 -0700 (PDT) Received: from localhost ([::1]:56334 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1XM-0001Bz-H8 for importer@patchew.org; Tue, 26 Jun 2018 23:54:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35915) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fY1T1-0006ig-4Z for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:50:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fY1Sx-0006Ek-Ue for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:50:03 -0400 Received: from userp2120.oracle.com ([156.151.31.85]:35166) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fY1Sx-0006D2-K8 for qemu-devel@nongnu.org; Tue, 26 Jun 2018 23:49:59 -0400 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5R3nvTn050293; Wed, 27 Jun 2018 03:49:57 GMT Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by userp2120.oracle.com with ESMTP id 2jum0a31p6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:57 +0000 Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w5R3nucW011993 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Jun 2018 03:49:56 GMT Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w5R3nurg023609; Wed, 27 Jun 2018 03:49:56 GMT Received: from troi.attlocal.net (/10.154.103.180) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 26 Jun 2018 20:49:56 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2017-10-26; bh=A425z6qu9SK4RIN8l2d3WWy8nFFEteRyR2g5aHAhAlE=; b=RR0BtBLxmEihQXjhcKwt8BdIVmEezKZVIHYaoLIMmGXsoVL/2gmvxPYNw2osp6bGmb1J oEWTWYQHtcXJfJ8puqRbFuT5foZgckmBT1OUGNBDwayHG3iAMf5+lgKGy9K0u7ewJyeW V+U6F8Fy7LNt7CbZqxFQqcbOoJsmYd7DvKBtH17yTIETl5/a3lk1hTMwwlD6yLxqqUds 50Dxk+mBFKLTWZA0Qj8ylcc+Vu5M7mM8iZJgRA8t15pSfNajEdt82eefpwt5bPeQg4ea MPFcjAbIvhz77NUtuXJB4aTTh0OGP1Ig0mJr1n9tle4EYw1+FZZbO90iKSsBw9EhMhuo Jw== From: Venu Busireddy To: venu.busireddy@oracle.com, "Michael S . Tsirkin" , Marcel Apfelbaum Date: Tue, 26 Jun 2018 22:49:34 -0500 Message-Id: <20180627034935.20276-5-venu.busireddy@oracle.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180627034935.20276-1-venu.busireddy@oracle.com> References: <20180627034935.20276-1-venu.busireddy@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8936 signatures=668703 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1806210000 definitions=main-1806270042 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 156.151.31.85 Subject: [Qemu-devel] [PATCH v2 4/4] Add "Group Identifier" support to Red Hat PCI Express bridge. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: virtio-dev@lists.oasis-open.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a new bridge device "pcie-downstream" with a Vendor ID of PCI_VENDOR_ID_REDHAT and Device ID of PCI_DEVICE_ID_REDHAT_DOWNSTREAM. Also add the "Vendor-Specific" capability to the bridge to contain the "Group Identifier" (UUID) that will be used to pair a virtio device with the passthrough device attached to that bridge. This capability is added to the bridge iff the "uuid" option is specified for the bridge. Signed-off-by: Venu Busireddy --- default-configs/arm-softmmu.mak | 1 + default-configs/i386-softmmu.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + hw/pci-bridge/Makefile.objs | 1 + hw/pci-bridge/pcie_downstream.c | 215 +++++++++++++++++++++++++++++ hw/pci-bridge/pcie_downstream.h | 10 ++ include/hw/pci/pci.h | 1 + 7 files changed, 230 insertions(+) create mode 100644 hw/pci-bridge/pcie_downstream.c create mode 100644 hw/pci-bridge/pcie_downstream.h diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.= mak index 834d45cfaf..b86c6fb122 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -139,6 +139,7 @@ CONFIG_IMX_I2C=3Dy CONFIG_PCIE_PORT=3Dy CONFIG_XIO3130=3Dy CONFIG_IOH3420=3Dy +CONFIG_PCIE_DOWNSTREAM=3Dy CONFIG_I82801B11=3Dy CONFIG_ACPI=3Dy CONFIG_SMBIOS=3Dy diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmm= u.mak index 8c7d4a0fa0..a900c8f052 100644 --- a/default-configs/i386-softmmu.mak +++ b/default-configs/i386-softmmu.mak @@ -56,6 +56,7 @@ CONFIG_ACPI_NVDIMM=3Dy CONFIG_PCIE_PORT=3Dy CONFIG_XIO3130=3Dy CONFIG_IOH3420=3Dy +CONFIG_PCIE_DOWNSTREAM=3Dy CONFIG_I82801B11=3Dy CONFIG_SMBIOS=3Dy CONFIG_HYPERV_TESTDEV=3D$(CONFIG_KVM) diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-so= ftmmu.mak index 0390b4303c..481e4764be 100644 --- a/default-configs/x86_64-softmmu.mak +++ b/default-configs/x86_64-softmmu.mak @@ -56,6 +56,7 @@ CONFIG_ACPI_NVDIMM=3Dy CONFIG_PCIE_PORT=3Dy CONFIG_XIO3130=3Dy CONFIG_IOH3420=3Dy +CONFIG_PCIE_DOWNSTREAM=3Dy CONFIG_I82801B11=3Dy CONFIG_SMBIOS=3Dy CONFIG_HYPERV_TESTDEV=3D$(CONFIG_KVM) diff --git a/hw/pci-bridge/Makefile.objs b/hw/pci-bridge/Makefile.objs index 47065f87d9..5b42212edc 100644 --- a/hw/pci-bridge/Makefile.objs +++ b/hw/pci-bridge/Makefile.objs @@ -3,6 +3,7 @@ common-obj-$(CONFIG_PCIE_PORT) +=3D pcie_root_port.o gen_pc= ie_root_port.o pcie_pci common-obj-$(CONFIG_PXB) +=3D pci_expander_bridge.o common-obj-$(CONFIG_XIO3130) +=3D xio3130_upstream.o xio3130_downstream.o common-obj-$(CONFIG_IOH3420) +=3D ioh3420.o +common-obj-$(CONFIG_PCIE_DOWNSTREAM) +=3D pcie_downstream.o common-obj-$(CONFIG_I82801B11) +=3D i82801b11.o # NewWorld PowerMac common-obj-$(CONFIG_DEC_PCI) +=3D dec.o diff --git a/hw/pci-bridge/pcie_downstream.c b/hw/pci-bridge/pcie_downstrea= m.c new file mode 100644 index 0000000000..78604504ea --- /dev/null +++ b/hw/pci-bridge/pcie_downstream.c @@ -0,0 +1,215 @@ +/* + * Red Hat PCI Express downstream port. + * + * pcie_downstream.c + * Most of this code is copied from xio3130_downstream.c + * + * Copyright (c) 2018 Oracle and/or its affiliates. + * Author: Venu Busireddy + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/pci/pci_ids.h" +#include "hw/pci/msi.h" +#include "hw/pci/pcie.h" +#include "pcie_downstream.h" +#include "qapi/error.h" + +#define REDHAT_PCIE_DS_REVISION 0x1 +#define REDHAT_PCIE_DS_MSI_OFFSET 0x70 +#define REDHAT_PCIE_DS_MSI_SUPPORTED_FLAGS PCI_MSI_FLAGS_64BIT +#define REDHAT_PCIE_DS_MSI_NR_VECTOR 1 +#define REDHAT_PCIE_DS_SSVID_OFFSET 0x80 +#define REDHAT_PCIE_DS_SSVID_SVID 0 +#define REDHAT_PCIE_DS_SSVID_SSID 0 +#define REDHAT_PCIE_DS_EXP_OFFSET 0x90 +#define REDHAT_PCIE_DS_VENDOR_OFFSET 0xCC +#define REDHAT_PCIE_DS_AER_OFFSET 0x100 + +static void pcie_ds_write_config(PCIDevice *d, uint32_t address, + uint32_t val, int len) +{ + pci_bridge_write_config(d, address, val, len); + pcie_cap_flr_write_config(d, address, val, len); + pcie_cap_slot_write_config(d, address, val, len); + pcie_aer_write_config(d, address, val, len); +} + +static void pcie_ds_reset(DeviceState *qdev) +{ + PCIDevice *d =3D PCI_DEVICE(qdev); + + pcie_cap_deverr_reset(d); + pcie_cap_slot_reset(d); + pcie_cap_arifwd_reset(d); + pci_bridge_reset(qdev); +} + +static void pcie_ds_realize(PCIDevice *d, Error **errp) +{ + PCIEPort *p =3D PCIE_PORT(d); + PCIESlot *s =3D PCIE_SLOT(d); + int rc; + + pci_bridge_initfn(d, TYPE_PCIE_BUS); + pcie_port_init_reg(d); + + rc =3D pci_bridge_vendor_init(d, REDHAT_PCIE_DS_VENDOR_OFFSET, errp); + if (rc < 0) { + error_append_hint(errp, "Can't init group ID, error %d\n", rc); + goto err_bridge; + } + + rc =3D msi_init(d, REDHAT_PCIE_DS_MSI_OFFSET, REDHAT_PCIE_DS_MSI_NR_VE= CTOR, + REDHAT_PCIE_DS_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_64BIT, + REDHAT_PCIE_DS_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, er= rp); + if (rc < 0) { + assert(rc =3D=3D -ENOTSUP); + goto err_bridge; + } + + rc =3D pci_bridge_ssvid_init(d, REDHAT_PCIE_DS_SSVID_OFFSET, + REDHAT_PCIE_DS_SSVID_SVID, REDHAT_PCIE_DS_SSVID_SSID, errp); + if (rc < 0) { + goto err_bridge; + } + + rc =3D pcie_cap_init(d, REDHAT_PCIE_DS_EXP_OFFSET, PCI_EXP_TYPE_DOWNST= REAM, + p->port, errp); + if (rc < 0) { + goto err_msi; + } + pcie_cap_flr_init(d); + pcie_cap_deverr_init(d); + pcie_cap_slot_init(d, s->slot); + pcie_cap_arifwd_init(d); + + pcie_chassis_create(s->chassis); + rc =3D pcie_chassis_add_slot(s); + if (rc < 0) { + error_setg(errp, "Can't add chassis slot, error %d", rc); + goto err_pcie_cap; + } + + rc =3D pcie_aer_init(d, PCI_ERR_VER, REDHAT_PCIE_DS_AER_OFFSET, + PCI_ERR_SIZEOF, errp); + if (rc < 0) { + goto err; + } + + return; + +err: + pcie_chassis_del_slot(s); +err_pcie_cap: + pcie_cap_exit(d); +err_msi: + msi_uninit(d); +err_bridge: + pci_bridge_exitfn(d); +} + +static void pcie_ds_exitfn(PCIDevice *d) +{ + PCIESlot *s =3D PCIE_SLOT(d); + + pcie_aer_exit(d); + pcie_chassis_del_slot(s); + pcie_cap_exit(d); + msi_uninit(d); + pci_bridge_exitfn(d); +} + +PCIESlot *pcie_ds_init(PCIBus *bus, int devfn, bool multifunction, + const char *bus_name, pci_map_irq_fn map_irq, + uint8_t port, uint8_t chassis, uint16_t slot) +{ + PCIDevice *d; + PCIBridge *br; + DeviceState *qdev; + + d =3D pci_create_multifunction(bus, devfn, multifunction, "pcie-downst= ream"); + if (!d) { + return NULL; + } + br =3D PCI_BRIDGE(d); + + qdev =3D DEVICE(d); + pci_bridge_map_irq(br, bus_name, map_irq); + qdev_prop_set_uint8(qdev, "port", port); + qdev_prop_set_uint8(qdev, "chassis", chassis); + qdev_prop_set_uint16(qdev, "slot", slot); + qdev_init_nofail(qdev); + + return PCIE_SLOT(d); +} + +static Property pcie_ds_props[] =3D { + DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, + QEMU_PCIE_SLTCAP_PCP_BITNR, true), + DEFINE_PROP_UUID(COMPAT_PROP_UUID, PCIDevice, uuid, false), + DEFINE_PROP_END_OF_LIST() +}; + +static const VMStateDescription vmstate_pcie_ds =3D { + .name =3D "pci-express-downstream-port", + .priority =3D MIG_PRI_PCI_BUS, + .version_id =3D 1, + .minimum_version_id =3D 1, + .post_load =3D pcie_cap_slot_post_load, + .fields =3D (VMStateField[]) { + VMSTATE_PCI_DEVICE(parent_obj.parent_obj.parent_obj, PCIESlot), + VMSTATE_STRUCT(parent_obj.parent_obj.parent_obj.exp.aer_log, + PCIESlot, 0, vmstate_pcie_aer_log, PCIEAERLog), + VMSTATE_END_OF_LIST() + } +}; + +static void pcie_ds_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->is_bridge =3D 1; + k->config_write =3D pcie_ds_write_config; + k->realize =3D pcie_ds_realize; + k->exit =3D pcie_ds_exitfn; + k->vendor_id =3D PCI_VENDOR_ID_REDHAT; + k->device_id =3D PCI_DEVICE_ID_REDHAT_DOWNSTREAM; + k->revision =3D REDHAT_PCIE_DS_REVISION; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->desc =3D "Red Hat PCIe Downstream Port"; + dc->reset =3D pcie_ds_reset; + dc->vmsd =3D &vmstate_pcie_ds; + dc->props =3D pcie_ds_props; +} + +static const TypeInfo pcie_ds_info =3D { + .name =3D "pcie-downstream", + .parent =3D TYPE_PCIE_SLOT, + .class_init =3D pcie_ds_class_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, +}; + +static void pcie_ds_register_types(void) +{ + type_register_static(&pcie_ds_info); +} + +type_init(pcie_ds_register_types) diff --git a/hw/pci-bridge/pcie_downstream.h b/hw/pci-bridge/pcie_downstrea= m.h new file mode 100644 index 0000000000..54f18be285 --- /dev/null +++ b/hw/pci-bridge/pcie_downstream.h @@ -0,0 +1,10 @@ +#ifndef QEMU_PCIE_DOWNSTREAM_H +#define QEMU_PCIE_DOWNSTREAM_H + +#include "hw/pci/pcie_port.h" + +PCIESlot *pcie_downstream_init(PCIBus *bus, int devfn, bool multifunction, + const char *bus_name, pci_map_irq_fn map_ir= q, + uint8_t port, uint8_t chassis, uint16_t slo= t); + +#endif /* QEMU_PCIE_DOWNSTREAM_H */ diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index ee234c5a6f..5c61a5b496 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -103,6 +103,7 @@ extern bool pci_available; #define PCI_DEVICE_ID_REDHAT_XHCI 0x000d #define PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE 0x000e #define PCI_DEVICE_ID_REDHAT_MDPY 0x000f +#define PCI_DEVICE_ID_REDHAT_DOWNSTREAM 0x0010 #define PCI_DEVICE_ID_REDHAT_QXL 0x0100 =20 #define FMT_PCIBUS PRIx64