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From: Peter Maydell <peter.maydell@linaro.org>
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Subject: [Qemu-devel] [PULL 01/32] aspeed/smc: fix dummy cycles count when
in dual IO mode
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From: C=C3=A9dric Le Goater <clg@kaod.org>
When configured in dual I/O mode, address and data are sent in dual
mode, including the dummy byte cycles in between. Adapt the count to
the IO setting.
Signed-off-by: C=C3=A9dric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 20180612065716.10587-2-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/ssi/aspeed_smc.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 5059396bc62..fce126e6ee9 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -66,6 +66,8 @@
=20
/* CEx Control Register */
#define R_CTRL0 (0x10 / 4)
+#define CTRL_IO_DUAL_DATA (1 << 29)
+#define CTRL_IO_DUAL_ADDR_DATA (1 << 28) /* Includes dummies */
#define CTRL_CMD_SHIFT 16
#define CTRL_CMD_MASK 0xff
#define CTRL_DUMMY_HIGH_SHIFT 14
@@ -492,8 +494,13 @@ static int aspeed_smc_flash_dummies(const AspeedSMCFla=
sh *fl)
uint32_t r_ctrl0 =3D s->regs[s->r_ctrl0 + fl->id];
uint32_t dummy_high =3D (r_ctrl0 >> CTRL_DUMMY_HIGH_SHIFT) & 0x1;
uint32_t dummy_low =3D (r_ctrl0 >> CTRL_DUMMY_LOW_SHIFT) & 0x3;
+ uint32_t dummies =3D ((dummy_high << 2) | dummy_low) * 8;
=20
- return ((dummy_high << 2) | dummy_low) * 8;
+ if (r_ctrl0 & CTRL_IO_DUAL_ADDR_DATA) {
+ dummies /=3D 2;
+ }
+
+ return dummies;
}
=20
static void aspeed_smc_flash_send_addr(AspeedSMCFlash *fl, uint32_t addr)
--=20
2.17.1