From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529676910891330.9548750171746; Fri, 22 Jun 2018 07:15:10 -0700 (PDT) Received: from localhost ([::1]:34284 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMqA-000889-8t for importer@patchew.org; Fri, 22 Jun 2018 10:15:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38427) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnM-00064W-Rt for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnH-00064F-Ri for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:12 -0400 Received: from mail-wr0-x242.google.com ([2a00:1450:400c:c0c::242]:38364) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnH-00063n-KK for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:07 -0400 Received: by mail-wr0-x242.google.com with SMTP id e18-v6so6870829wrs.5 for ; Fri, 22 Jun 2018 07:12:07 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id y8-v6sm9424721wrq.35.2018.06.22.07.12.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:05 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 616533E0158; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=931YubV2+E9ZfYjHLYQCQ/bvaaU7zlI7+soTJAfIXF4=; b=bRDBji18GliE0zADRu6QC9n1RJbmbahgYBAfQpZGq54z0wxsnvLPYJ73MfH5zx/OnH 8T5s1yqX855iYroJKFnhRskqcMg7q7syeQWq8VUFsUICD54e3EX4W7V7uygxBpyenCQ1 FQl97GEvYzc8J5NnkNWy1KUnWEAIlbKxFTVT4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=931YubV2+E9ZfYjHLYQCQ/bvaaU7zlI7+soTJAfIXF4=; b=lZSW4m6DmIiXmURc0di3RWs2G4nfeMI+LemHzAXS8pjccpsV8ONlnr037XRXNueNae Yb6zT4i/4lXpra9aaJi4NdfPopyJVgNp/SKcXNtWYVT2RVzmKVHb7Jy9ykOthwYQRV+V laVCbwTPtTOHt7oSwufhYuc2+mU/L/ZPNtJCsvzjGNDWxsDGjA9JqptrQwUwOVCDInWB kfN8nrSW2sVoEB4qTZm1dXdKnAu1HkHHDaGGlmEfZKkKS41IsHxoZlZ4vIxNvFqOsNPS nhWzbA8cuvAygNyIA0ROGVSTPfqVB8A6mfZ+gPW+88RNvqfTmtqNnanyUkA23jxRC1xB fiFw== X-Gm-Message-State: APt69E2EksbODsKn1o3yC4HBVqwqnD8SqeONJkoF5jx1NgQkNSx2lW+Z 2Xo96Pmbxjm4Ci5TmjWJ87VuQA== X-Google-Smtp-Source: AAOMgpc1LofsOcEvtosYBS92V1pg2WAkVSu2fY+YJ7Oa5919zx94GkN+lggBy/K8yL2pGtbCaLF/HA== X-Received: by 2002:adf:dd03:: with SMTP id a3-v6mr1880378wrm.2.1529676726578; Fri, 22 Jun 2018 07:12:06 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:44 +0100 Message-Id: <20180622141205.16306-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [RISU PATCH v4 01/22] risu_reginfo_aarch64: include signal.h for FPSIMD_MAGIC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Building with the Bionic Beaver cross compilers fails which probably means we were getting this as a side effect before. Include the correct header to get at these bits. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- risu_reginfo_aarch64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index e3fadde..3bb4339 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -13,6 +13,7 @@ #include #include #include +#include /* for FPSIMD_MAGIC */ =20 #include "risu.h" #include "risu_reginfo_aarch64.h" --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677117733509.56370673635024; Fri, 22 Jun 2018 07:18:37 -0700 (PDT) Received: from localhost ([::1]:34304 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMtZ-0002Pa-0R for importer@patchew.org; Fri, 22 Jun 2018 10:18:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38435) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnM-00064f-VN for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnI-00064i-Hb for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:12 -0400 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]:38321) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnI-000642-Ag for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:08 -0400 Received: by mail-wm0-x242.google.com with SMTP id 69-v6so2783062wmf.3 for ; Fri, 22 Jun 2018 07:12:08 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id f2-v6sm8425313wre.16.2018.06.22.07.12.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:05 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 6E5933E08B3; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bgMNNtAr5aCYiieHt/4kjMLdGIRPF8kWyQwrJxVNpCo=; b=SedgR4TNPJPg+p7redLaLbRJ5o7yFokv9iEKQP5WFewScchFfs5xBcYWTc/eCU5vOD Gy/8sffdBpkVknKOXN9RbYiLf0xF5+oeKWIcdcSh7KR0kAbM90Sr+KZ1ipsuu0Zygh70 62I3rVBGUomPK5DjYXsDT3kXWip5VfFYtJPpo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bgMNNtAr5aCYiieHt/4kjMLdGIRPF8kWyQwrJxVNpCo=; b=A9uVu2h3BDowL0UXwtctCVjxDTfOfcqjoEAoBdGx6P3rSk5nknBcchb653CGdByEds bX/Tdc6t/NOK/Albsy3ybYsBOfLzt/5xEo6mlzcq0aPYKbgB67Iw9J83N5LjoszAkp1j m0CjbyKOEMRd6bm2O/VHxh7HNzcQDM/SabMZ1OjrEVH7pQI0erSLUeV3p2tkzHNMYZPu o196SPcagPORpmCigsgxMHwinMWbD5DoWUEKzhaBvRg9JCxvXUGv8MC7Vawof6G80qEY eFOJxyXPdUwQDdvL9MC9csybXv7ovXN2kHEfYFBK32V1G5THS5oiD9gnNyVVeSy8kuok r1DA== X-Gm-Message-State: APt69E2DKethnE+cKFmqzZqGbRoUbFlZGKg3Ue8TXy1XdzpNih9IiKX5 afe6ShSYPUIranPtV1FQ2rTjJA== X-Google-Smtp-Source: ADUXVKIgGx5egc+Vu4slodgdIP2/PWLd77djyI4cF088eMjRi4t6U+VZW2BjnKy72Ppxgvp60seUbg== X-Received: by 2002:a1c:6f5a:: with SMTP id k87-v6mr1753120wmc.142.1529676727292; Fri, 22 Jun 2018 07:12:07 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:45 +0100 Message-Id: <20180622141205.16306-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::242 Subject: [Qemu-devel] [RISU PATCH v4 02/22] comms: include header for writev X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 The compiler complains about implicit declarations otherwise. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- comms.c | 1 + 1 file changed, 1 insertion(+) diff --git a/comms.c b/comms.c index 2900c33..6946fd9 100644 --- a/comms.c +++ b/comms.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include =20 --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677761255715.6380717922214; Fri, 22 Jun 2018 07:29:21 -0700 (PDT) Received: from localhost ([::1]:34393 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWN3w-0003AB-Ge for importer@patchew.org; Fri, 22 Jun 2018 10:29:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38442) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnN-00064m-0T for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnK-000666-2Z for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:12 -0400 Received: from mail-wm0-x235.google.com ([2a00:1450:400c:c09::235]:38167) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnJ-00065S-SU for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:10 -0400 Received: by mail-wm0-x235.google.com with SMTP id 69-v6so2783152wmf.3 for ; Fri, 22 Jun 2018 07:12:09 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id o13-v6sm1272887wmc.8.2018.06.22.07.12.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:05 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 79C443E08BB; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=l+WH06Feov5hiPGPGR0GWwYb3SlHAVq5TbDc9rdgEGw=; b=Z3eY5v32u7QQ4OwhjmVi+fZcJ7CzxRKgD7tXnTE6axsCnH+LpFjB9uGEaet5g+gTYv qfJplNIKorhLMKIg+HKML8NrNsW7mLSsDYrOT8XmTA5Hpl4670K8mamt4pcU/jq2Mrb2 KAC4RAgrHSN6rHqxEgnyIdleoLzwpSUfdPVOc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l+WH06Feov5hiPGPGR0GWwYb3SlHAVq5TbDc9rdgEGw=; b=gXEI1s0hccc+dA4F2gu2RI3FQVtjS9OeSBakm1QgC10SFw6eQ7kd5fwKIEW8LssbKb DJoaqEFHAM9t0P1JpyYU9b0z/4F6toKeMCsw9dsNkjQohPTgJ3jgbBQBvDjiMaTsZHpz iOTFbtnuXjB36svaQO4qfB//oGjteW/W2pue8nQraFLtozuMWy/+rlQom8Yb2uAr7WSa X1OU4Cw0IwBIxGSGvSyWBwtDB3Lx/L81wbAjIj7/BTjJYvbe0Mj1rAmyfxQzlRlYhAb5 0NSaPh992XEYt+fsqwmijm1KzwKZSP6GEOBhO3hH9noRpOPItXoxt8vPFQgPo/ZbsyQO XL3Q== X-Gm-Message-State: APt69E1isiTdkOgh3BlfGnt5/IEu7e4wJ0KTikPeOxmnvcH1W5xQSOsC mhZaDGoCMvLSdExgOfdpYhdBuRzcfmU= X-Google-Smtp-Source: ADUXVKKHkkipXwq8s/naZpAj/ZE+pe7gcBtyrBVj+4WY/lmG2z5JY7Wuv/ZMljkwaiFxCaYgFJbs5A== X-Received: by 2002:a1c:d391:: with SMTP id k139-v6mr1763726wmg.45.1529676728846; Fri, 22 Jun 2018 07:12:08 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:46 +0100 Message-Id: <20180622141205.16306-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::235 Subject: [Qemu-devel] [RISU PATCH v4 03/22] build-all-arches: expand the range of docker images X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 We won't actually want power, we want ppc64el for the 64 bit version. Also we will soon have m68k so include that as well. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- build-all-archs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/build-all-archs b/build-all-archs index fa2ac90..a2f5cff 100755 --- a/build-all-archs +++ b/build-all-archs @@ -39,7 +39,7 @@ while [[ "$1" =3D -* ]]; do ;; --use-docker) if [ -z "$arg" ]; then - default_tags=3D$(docker images qemu --format "{{.Repositor= y}}:{{.Tag}}" | grep "\(arm\|power\).*cross$") + default_tags=3D$(docker images qemu --format "{{.Repositor= y}}:{{.Tag}}" | grep "\(arm\|ppc64el\|m68k\).*cross$") docker_tags=3D$(echo $default_tags | sed 's/\n/\s/g' ) else docker_tags=3D"$arg" --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677688692746.3559619834838; Fri, 22 Jun 2018 07:28:08 -0700 (PDT) Received: from localhost ([::1]:34390 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWN2k-000258-U2 for importer@patchew.org; Fri, 22 Jun 2018 10:28:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38433) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnM-00064d-UW for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnL-00066w-2P for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:12 -0400 Received: from mail-wm0-x231.google.com ([2a00:1450:400c:c09::231]:33081) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnK-00066N-SJ for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:11 -0400 Received: by mail-wm0-x231.google.com with SMTP id z6-v6so6448559wma.0 for ; Fri, 22 Jun 2018 07:12:10 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id n7-v6sm8164956wri.27.2018.06.22.07.12.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:07 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 85CBB3E08C1; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I2gocXId63VjHU4zxg+0vNSJIkmrjZ9YOwljyIOrCkQ=; b=ZIU2j6Uo2U/qxCoQfiqr/uzsy+xJGQ4VzaPhlnG1DdGqLtBKopZmOHzdZHREwB/m2v RPaaEZEhlKodB7EEO8QQ7rD44C0D+Z01jChq1wJz7V9daRUK0C9L7pZ8qOYL5G/SDyhX 74SYHlPIyk1ckA6I/LclAlokHfbPtx/Z4sc4g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I2gocXId63VjHU4zxg+0vNSJIkmrjZ9YOwljyIOrCkQ=; b=mUD3+5ivVF3jdBa+w62UM7o5Noz2P6WqHItbShFPbqywx0UY39DeH1YOe7pdYKqMyP NbkMgHR/P7L99B+PV7mtKXTVPuSFXz3eijJ/ZoB/3O8X2SK4uvyVjbTIHi89xD3ZEXkm fDELxpWXsJh674e+3Mc0Tw8Lizej7tzt0O4UVaO04rq5zcNX0sPHxaT8y8PbKOV6FZdD LKR8PXd/YW93+DLfUr56CWJ3qhsIydhCSVpwPXXgfYqZmmFMw1HR9Yeolo3trALEP9oB u7RNgawmkCFtqAyeSyRKE+26hALbBMJu1hNum6nJ8tIal4aERtjk0+UpuIiM23c7v+8j jMfA== X-Gm-Message-State: APt69E2SQElo3VR0Lm+O6mzAlU2OwsPc6wErz+QedLKjlernJI95Ngoe 40eo5xcBPhq2VMTCuHXKILY3p4ZpV3M= X-Google-Smtp-Source: ADUXVKJVMPBEZkulRGOThq9Tcg/+Xp5noyTfE9JlYFe0dYrFa/8oqnmqCQPn/P9/XU4cN84Tdh2D2w== X-Received: by 2002:a1c:17d4:: with SMTP id 203-v6mr1801710wmx.75.1529676729807; Fri, 22 Jun 2018 07:12:09 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:47 +0100 Message-Id: <20180622141205.16306-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::231 Subject: [Qemu-devel] [RISU PATCH v4 04/22] build-all-arches: do a distclean $(SRC) configured X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 This can cause much confusion when you have been building in your source tree. I've added a distclean so we don't unexpectedly drop the config for normal make clean invocations. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- Makefile | 3 +++ build-all-archs | 10 ++++++++++ 2 files changed, 13 insertions(+) diff --git a/Makefile b/Makefile index ca80eef..16e48a0 100644 --- a/Makefile +++ b/Makefile @@ -51,3 +51,6 @@ $(PROG): $(OBJS) =20 clean: rm -f $(PROG) $(OBJS) $(BINS) + +distclean: clean + rm -f config.h Makefile.in diff --git a/build-all-archs b/build-all-archs index a2f5cff..a7cd7c2 100755 --- a/build-all-archs +++ b/build-all-archs @@ -54,6 +54,16 @@ while [[ "$1" =3D -* ]]; do esac done =20 +# +# If you are developing your primary architecture directly out of the +# source tree you can confuse any out-of-tree builds thanks to random +# crap in your VPATH. Let's detect that and save some hair pulling. +# +if [ -e Makefile.in ]; then + echo "Cleaning in-src-tree build" + make distclean +fi + # Debian stretch and Ubuntu Xenial have cross compiler packages for # all of these: # gcc-arm-linux-gnueabihf gcc-aarch64-linux-gnu gcc-m68k-linux-gnu --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677110431113.6968085086985; Fri, 22 Jun 2018 07:18:30 -0700 (PDT) Received: from localhost ([::1]:34303 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMtR-0002IX-Hw for importer@patchew.org; Fri, 22 Jun 2018 10:18:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38472) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnN-00065V-Ro for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnM-00067d-BU for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:13 -0400 Received: from mail-wr0-x234.google.com ([2a00:1450:400c:c0c::234]:37668) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnM-000675-4l for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:12 -0400 Received: by mail-wr0-x234.google.com with SMTP id k6-v6so6862379wrp.4 for ; Fri, 22 Jun 2018 07:12:12 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id y3-v6sm8625644wro.21.2018.06.22.07.12.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:08 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 912063E08E5; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fnpGrO7LfHgDM9qOgnz9eQOPP3P2qdZCTNj/MmDlLto=; b=NRnkXG3761JwfTYGy50uWxWbCiC0QaZAtJNK5Ma7E3+eJHTX8w0fl7rNdLRj1G7lyV Xln+7DNZcCTx8KXY7div8OWDMswfdNNY4sMBEUFJHN8P9uwapMecz0dioyR8EsEU4mjO /FDWPigI34lhcT6QmdD4wJH3SS0P71H65bfnQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fnpGrO7LfHgDM9qOgnz9eQOPP3P2qdZCTNj/MmDlLto=; b=OUjF9fOSdIUsDeSy0sC91YaGBTWquB/lrbIXcHxiJSxjdMs09gVMbUr711Ta3QCF1u WmKDBkM0OTh2ChMzR7cAyzgL6TicLux0i5pXrqSypGdFk1csEyaqEzi08MgEYPuVMac8 w6MEP5rGiZGOJC7BATwvkG3mXgScK19KZ8GcaLqvTPQPWJwjm9zw/pWYpIuXHtETMRgP 8YC9QOMKZ2i8z6WBJoAsZSgsVeL0t9K6CkHxq7V/nFm6Dw+eKNiIrPauqyghpEILwfQY wFbogxV1aBSL9G/XWmDE7Q0aaFiwj8CF4NezK0Dzx4Q8DxAidZOsNEEKz1stOAOSseBW NJmg== X-Gm-Message-State: APt69E3zaeEakUYNVScqqPgczDUEFSJzEMI+wDbyhUIauRz4a51AO+QB uESCWqOIff9EqnMSB3KvvCFivA== X-Google-Smtp-Source: AAOMgpdqhpEAzUU8XPpmD0REGJGEoXXnjuxrq0k9u5LRw5l38bPgmbvQ8prU5NY3vRra/Qyc+5iV9g== X-Received: by 2002:adf:e590:: with SMTP id l16-v6mr1665862wrm.190.1529676731106; Fri, 22 Jun 2018 07:12:11 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:48 +0100 Message-Id: <20180622141205.16306-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::234 Subject: [Qemu-devel] [RISU PATCH v4 05/22] risu: add zlib indication to help text X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 This is a simple aide-memoir as it can be tricky to determine this with a simple statically compiled binary. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- risu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/risu.c b/risu.c index 616fc33..c684c90 100644 --- a/risu.c +++ b/risu.c @@ -39,6 +39,9 @@ size_t signal_count; #ifdef HAVE_ZLIB #include gzFile gz_trace_file; +#define TRACE_TYPE "compressed" +#else +#define TRACE_TYPE "uncompressed" #endif =20 sigjmp_buf jmpbuf; @@ -273,7 +276,7 @@ void usage(void) fprintf(stderr, "between master and apprentice risu processes.\n\n"); fprintf(stderr, "Options:\n"); fprintf(stderr, " --master Be the master (server)\n"); - fprintf(stderr, " -t, --trace=3DFILE Record/playback trace file\n"); + fprintf(stderr, " -t, --trace=3DFILE Record/playback " TRACE_TYPE " = trace file\n"); fprintf(stderr, " -h, --host=3DHOST Specify master host machine (apprentice= only)" "\n"); --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677325503208.5090615113461; Fri, 22 Jun 2018 07:22:05 -0700 (PDT) Received: from localhost ([::1]:34330 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMwu-0005O1-Mi for importer@patchew.org; Fri, 22 Jun 2018 10:22:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38514) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnO-000661-D9 for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnN-00068a-6a for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:14 -0400 Received: from mail-wr0-x242.google.com ([2a00:1450:400c:c0c::242]:33027) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnM-00067R-QM for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:13 -0400 Received: by mail-wr0-x242.google.com with SMTP id k16-v6so6883507wro.0 for ; Fri, 22 Jun 2018 07:12:12 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id b186-v6sm2028443wmh.4.2018.06.22.07.12.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:08 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 9CDB03E0930; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=S5aeXl2jMTNr7C2+coNwoFnZk8CSHuSU2dRVO3ZEBAo=; b=RnD+7w+iKFNsJVKX6Vzm58YxaOMzNDiau6qWuCf4aMOmTOT9a0T6wF7PWJTdtzq1yw G5B9VxoFGKzE+1kOLd36DxQQY8WSz1BUWe0B1KqJN5If3eVoMJwUt11Xv0Y221FkoG1/ 1pWBWajSYnJeo8C93xacSFfL98HkGwtZWY79I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=S5aeXl2jMTNr7C2+coNwoFnZk8CSHuSU2dRVO3ZEBAo=; b=bUtmriaEqAGkl1NGYy421R/ke9MdArm87NAsa0XudVoKO4E+KP/P1h1rCSVzJibhQL cw8xHrvKw68/nLHhSK0DoaU3ZCy0iJF4nAQcarZtIFp9ir3FLv/8LFjc/jcnv1hiUMrL 7t7ZJ2G0iAdOjvXhETu6FdrMhIfHt0yQgx+m7qWOsn6h+ux9nzqtTO0uuTakEVtWJTwE pDpxKACkhj8xusYhvNFhoVeATSdTPMwWIj07LPNxX/RSNIlBNnsya3+hFAdttspwZh2B qs2mYZfd0JHN+BtjQ8Ihy+aU3F4lp4qU3O2CKuFSyRU8hF+6GIBJfdwkxZBoIrb6lWma FyBA== X-Gm-Message-State: APt69E2CtV8swNHrGhJsPVoIG3BTe6Ij/D/Vh8Zh/4phP6elkUK+8n9f 7g+TS7bVorZ4XHdr/VhOu4TCmw== X-Google-Smtp-Source: AAOMgpcCEcXFJLW9zTWpbfgcKVt8NiOqZgv8w5ZJobY440nGJfnv0Aq7PhYglY/sQmnZYKKylvBCmg== X-Received: by 2002:adf:f40a:: with SMTP id g10-v6mr1762229wro.256.1529676731879; Fri, 22 Jun 2018 07:12:11 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:49 +0100 Message-Id: <20180622141205.16306-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [RISU PATCH v4 06/22] Makefile: include risu_reginfo_$(ARCH) in HDRS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Otherwise changes to reginfo don't cause the whole thing to be re-built causing much confusion when bisecting. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 16e48a0..4aad448 100644 --- a/Makefile +++ b/Makefile @@ -21,7 +21,7 @@ ALL_CFLAGS =3D -Wall -D_GNU_SOURCE -DARCH=3D$(ARCH) $(BUI= LD_INC) $(CFLAGS) $(EXTRA_C =20 PROG=3Drisu SRCS=3Drisu.c comms.c reginfo.c risu_$(ARCH).c risu_reginfo_$(ARCH).c -HDRS=3Drisu.h +HDRS=3Drisu.h risu_reginfo_$(ARCH).h BINS=3Dtest_$(ARCH).bin =20 # For dumping test patterns --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529678064066946.3380292226674; Fri, 22 Jun 2018 07:34:24 -0700 (PDT) Received: from localhost ([::1]:34428 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWN8p-000753-9b for importer@patchew.org; Fri, 22 Jun 2018 10:34:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38567) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnQ-000689-1V for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnO-00069p-LD for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:15 -0400 Received: from mail-wr0-x241.google.com ([2a00:1450:400c:c0c::241]:43966) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnO-00068m-3p for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:14 -0400 Received: by mail-wr0-x241.google.com with SMTP id d2-v6so6830565wrm.10 for ; Fri, 22 Jun 2018 07:12:14 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id h11-v6sm7364260wrs.85.2018.06.22.07.12.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:10 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id A89C03E097F; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IEGZXFnFNMOWMxKC/DUaSek0uOvs3FGzAO/YFETY3Ak=; b=HlGabiBEKg6Ao/kQitgp2Xr3nGPDG6Yqe6K9HRPpyaaOG5d0H7qp5dI69JcHQUPaca U6XBrhJ+01C5EkfW1YvGz7IS+A/cUvHSIDlgyQbp8hTo2P2q7b6tVB1jsKv+uiBmZ9wk vLOtJagMdYruOdIjhNrifA2ckPc1m697NQxsA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IEGZXFnFNMOWMxKC/DUaSek0uOvs3FGzAO/YFETY3Ak=; b=WqEiu/yZkvwNjmCKGGpNZBTqUHVSYSCVpAE6ul83dLJGA0peLCH2kc4UHby0dzrlnO yKIV9l3BdA8F2EoQr8zbeiB4vGb73CDeC7aQtJ0z+DzZO2ypml9hzW/E3SWuvHSzmJEc wGGy6L+a9AsxScgca2MF/OZiA3poG34+R92WJb5d0XoYoYlmhyrNBaOYcmrJM7zEkuQP JfOpOGk21RdWduUfDGzetX10rb00GZjfHIQAzNPVwrNOtMdBWD3acidUkatP2i6I+wxH FffgnUi9gsu/OWqQvfq+7GvitQlPKq9FsjOyfB6FN5T4U2d71ZCEmc7JW8c2z0eX4qqW EaeA== X-Gm-Message-State: APt69E2LsPQXUwzlhhqVnxzCG8dAGmmgQNWdBkU1QHnmWSq/XnySjzI6 a6U/okcB8N5rpnx6dcI/6F/kNA== X-Google-Smtp-Source: AAOMgpcuV2MXQJQmQONn7+DM2AiBbfyfuBtD2icoxIxVBKJ+oRWCpkmd2u4O41iBHabo1mj9i7L7dA== X-Received: by 2002:adf:9769:: with SMTP id r96-v6mr1841835wrb.57.1529676733063; Fri, 22 Jun 2018 07:12:13 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:50 +0100 Message-Id: <20180622141205.16306-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::241 Subject: [Qemu-devel] [RISU PATCH v4 07/22] risugen: add --sve support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 This is similar to the approach used by the FP/simd data in so far as we generate a block of random data and then load into it. The loading is actually done by the current vector length but that is implicit in the run anyway. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v2 - only one SIMD/FP/SVE block as they alias - move efficient loading as suggested by Dave --- risugen | 3 +++ risugen_arm.pm | 56 ++++++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 50 insertions(+), 9 deletions(-) diff --git a/risugen b/risugen index 488d804..de3f5ea 100755 --- a/risugen +++ b/risugen @@ -319,6 +319,7 @@ sub main() my $condprob =3D 0; my $fpscr =3D 0; my $fp_enabled =3D 1; + my $sve_enabled =3D 1; my $big_endian =3D 0; my ($infile, $outfile); =20 @@ -336,6 +337,7 @@ sub main() }, "be" =3D> sub { $big_endian =3D 1; }, "no-fp" =3D> sub { $fp_enabled =3D 0; }, + "sve" =3D> sub { $sve_enabled =3D 1; }, ) or return 1; # allow "--pattern re,re" and "--pattern re --pattern re" @pattern_re =3D split(/,/,join(',',@pattern_re)); @@ -363,6 +365,7 @@ sub main() 'fpscr' =3D> $fpscr, 'numinsns' =3D> $numinsns, 'fp_enabled' =3D> $fp_enabled, + 'sve_enabled' =3D> $sve_enabled, 'outfile' =3D> $outfile, 'details' =3D> \%insn_details, 'keys' =3D> \@insn_keys, diff --git a/risugen_arm.pm b/risugen_arm.pm index 2f10d58..bb3ee90 100644 --- a/risugen_arm.pm +++ b/risugen_arm.pm @@ -472,14 +472,51 @@ sub write_random_aarch64_fpdata() } } =20 -sub write_random_aarch64_regdata($) +sub write_random_aarch64_svedata() { - my ($fp_enabled) =3D @_; + # Load SVE registers + my $align =3D 16; + my $vq =3D 16; # quadwords per vector + my $datalen =3D (32 * $vq * 16) + $align; + + write_pc_adr(0, (3 * 4) + ($align - 1)); # insn 1 + write_align_reg(0, $align); # insn 2 + write_jump_fwd($datalen); # insn 3 + + # align safety + for (my $i =3D 0; $i < ($align / 4); $i++) { + # align with nops + insn32(0xd503201f); + }; + + for (my $rt =3D 0; $rt <=3D 31; $rt++) { + for (my $q =3D 0; $q < $vq; $q++) { + write_random_fpreg_var(4); # quad + } + } + + # Reset all the predicate registers to all true + for (my $p =3D 0; $p < 16; $p++) { + insn32(0x2518e3e0 | $p); + } + + for (my $rt =3D 0; $rt <=3D 31; $rt++) { + # ldr z$rt, [x0, #$rt, mul vl] + insn32(0x85804000 + $rt + (($rt & 7) << 10) + (($rt & 0x18) << 13)= ); + } +} + +sub write_random_aarch64_regdata($$) +{ + my ($fp_enabled, $sve_enabled) =3D @_; # clear flags insn32(0xd51b421f); # msr nzcv, xzr =20 - if ($fp_enabled) { - # load floating point / SIMD registers + # Load floating point / SIMD registers + # (one or the other as they overlap) + if ($sve_enabled) { + write_random_aarch64_svedata(); + } elsif ($fp_enabled) { write_random_aarch64_fpdata(); } =20 @@ -490,12 +527,12 @@ sub write_random_aarch64_regdata($) } } =20 -sub write_random_register_data($) +sub write_random_register_data($$) { - my ($fp_enabled) =3D @_; + my ($fp_enabled, $sve_enabled) =3D @_; =20 if ($is_aarch64) { - write_random_aarch64_regdata($fp_enabled); + write_random_aarch64_regdata($fp_enabled, $sve_enabled); } else { write_random_arm_regdata($fp_enabled); } @@ -893,6 +930,7 @@ sub write_test_code($$$$$$$$) my $fpscr =3D $params->{ 'fpscr' }; my $numinsns =3D $params->{ 'numinsns' }; my $fp_enabled =3D $params->{ 'fp_enabled' }; + my $sve_enabled =3D $params->{ 'sve_enabled' }; my $outfile =3D $params->{ 'outfile' }; =20 my %insn_details =3D %{ $params->{ 'details' } }; @@ -918,7 +956,7 @@ sub write_test_code($$$$$$$$) write_memblock_setup(); } # memblock setup doesn't clean its registers, so this must come afterw= ards. - write_random_register_data($fp_enabled); + write_random_register_data($fp_enabled, $sve_enabled); write_switch_to_test_mode(); =20 for my $i (1..$numinsns) { @@ -930,7 +968,7 @@ sub write_test_code($$$$$$$$) # Rewrite the registers periodically. This avoids the tendency # for the VFP registers to decay to NaNs and zeroes. if ($periodic_reg_random && ($i % 100) =3D=3D 0) { - write_random_register_data($fp_enabled); + write_random_register_data($fp_enabled, $sve_enabled); write_switch_to_test_mode(); } progress_update($i); --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677512101313.4746200035578; Fri, 22 Jun 2018 07:25:12 -0700 (PDT) Received: from localhost ([::1]:34362 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMzr-0007oj-AN for importer@patchew.org; Fri, 22 Jun 2018 10:25:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38574) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnQ-00068P-Aj for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnP-0006AB-4g for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:16 -0400 Received: from mail-wr0-x243.google.com ([2a00:1450:400c:c0c::243]:42763) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnO-00069H-SZ for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:15 -0400 Received: by mail-wr0-x243.google.com with SMTP id w10-v6so6859436wrk.9 for ; Fri, 22 Jun 2018 07:12:14 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id g129-v6sm2088364wmf.5.2018.06.22.07.12.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:10 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id B463B3E0A25; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0Xm+ER24biXy+jhU0foOUmeppdyuMIuvTildhLQkYKo=; b=FoE/K8YWRKqT5cqXeTJn8yae9CPTm5FIwnAOjIq7OqDEIa5GGn9bSRxZWj/QmlyKGa F4XlEPhpkK1memhtcw/W3VRjW6GLz2ouR3kCqct2x7Xo0KL7H92uPBWjR9zien4+T0DJ lqt5dM8mfdb1t7lyL5ZhMMJmfCbNGXNvkFY8s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0Xm+ER24biXy+jhU0foOUmeppdyuMIuvTildhLQkYKo=; b=Is+CnETnoZag1YaEzJVQBtqKG55dLMgYs0WuEFSi16GKCtu9j+oQoNeuGChmVmMJay 22qHW6iJVyJhzFqxW/XD427LXntiZSwUrj8AngbMcNhs29hxzuXmpPAvMZsr2NG3GUrO bdYKrGuCXvw1Ej7amJ/CjLUqN6bQ738Jy0zumSxtmF+oCg/c4RMNv8OFTIm4XGx1hF0e fqQpm6bLperxhhNN+1z6kDqIC0orHD67+73kVhxQ5O0R6zRAOpcSddK0AmkpeqO9P0yG dh3Ul4BYGagzuWJtzQTqzNTWs0/iWayWUoU+G7a/iVmZJulhhdlHNe0TYxmVhJgUl1Fl JDsA== X-Gm-Message-State: APt69E20BX7eo0AC5XJiCC2PlCo2ZK/j0fKF9Kv+kEpoGkUTF+Y5KWTu Ejv03QV64PryjzbMzi+1XnH9Tw== X-Google-Smtp-Source: AAOMgpdSds6/XXMBZjS/cr+5fNqhxJpyf7jdESfSGFcYMsDdSUtyrZIMWmhbKMM5HZfsLw7mHZFWbQ== X-Received: by 2002:adf:f98a:: with SMTP id f10-v6mr1759365wrr.105.1529676733766; Fri, 22 Jun 2018 07:12:13 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:51 +0100 Message-Id: <20180622141205.16306-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [RISU PATCH v4 08/22] risugen: Initialize sve predicates with random data X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Richard Henderson Using ptrue makes most of the uses of predicates trivial. Therefore, initialize them to something interesting. Signed-off-by: Richard Henderson Signed-off-by: Alex Benn=C3=A9e --- risugen_arm.pm | 48 ++++++++++++++++++++++++++++++++++-------------- 1 file changed, 34 insertions(+), 14 deletions(-) diff --git a/risugen_arm.pm b/risugen_arm.pm index bb3ee90..83e521d 100644 --- a/risugen_arm.pm +++ b/risugen_arm.pm @@ -174,6 +174,24 @@ sub write_sxt32($$) insn32(0x93407c00 | $rn << 5 | $rd); } =20 +sub write_add_rri($$$) +{ + my ($rd, $rn, $i) =3D @_; + my $sh; + + die "write_add_rri: invalid operation for this arch.\n" if (!$is_aarch= 64); + + if ($i >=3D 0 && $i < 0x1000) { + $sh =3D 0; + } elsif (($i & 0xfff) || $i >=3D 0x1000000) { + die "invalid immediate for this arch,\n"; + } else { + $sh =3D 1; + $i >>=3D 12; + } + insn32(0x91000000 | ($rd << 0) | ($rn << 5) | ($i << 10) | ($sh << 22)= ); +} + sub write_sub_rrr($$$) { my ($rd, $rn, $rm) =3D @_; @@ -477,33 +495,35 @@ sub write_random_aarch64_svedata() # Load SVE registers my $align =3D 16; my $vq =3D 16; # quadwords per vector - my $datalen =3D (32 * $vq * 16) + $align; - - write_pc_adr(0, (3 * 4) + ($align - 1)); # insn 1 - write_align_reg(0, $align); # insn 2 - write_jump_fwd($datalen); # insn 3 + my $veclen =3D 32 * $vq * 16; + my $predlen =3D 16 * $vq * 2; + my $datalen =3D $veclen + $predlen; =20 - # align safety - for (my $i =3D 0; $i < ($align / 4); $i++) { - # align with nops - insn32(0xd503201f); - }; + write_pc_adr(0, 2 * 4); # insn 1 + write_jump_fwd($datalen); # insn 2 =20 for (my $rt =3D 0; $rt <=3D 31; $rt++) { for (my $q =3D 0; $q < $vq; $q++) { write_random_fpreg_var(4); # quad } } - - # Reset all the predicate registers to all true - for (my $p =3D 0; $p < 16; $p++) { - insn32(0x2518e3e0 | $p); + for (my $rt =3D 0; $rt <=3D 15; $rt++) { + for (my $q =3D 0; $q < $vq; $q++) { + insn16(rand(0xffff)); + } } =20 for (my $rt =3D 0; $rt <=3D 31; $rt++) { # ldr z$rt, [x0, #$rt, mul vl] insn32(0x85804000 + $rt + (($rt & 7) << 10) + (($rt & 0x18) << 13)= ); } + + write_add_rri(0, 0, $veclen); + + for (my $rt =3D 0; $rt <=3D 15; $rt++) { + # ldr p$rt, [x0, #$pt, mul vl] + insn32(0x85800000 + $rt + (($rt & 7) << 10) + (($rt & 0x18) << 13)= ); + } } =20 sub write_random_aarch64_regdata($$) --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529678272347672.68460288072; Fri, 22 Jun 2018 07:37:52 -0700 (PDT) Received: from localhost ([::1]:34448 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWNCB-0001y7-Ke for importer@patchew.org; Fri, 22 Jun 2018 10:37:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38594) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnQ-00068q-R9 for qemu-devel@nongnu.org; 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X-Received-From: 2a00:1450:400c:c09::234 Subject: [Qemu-devel] [RISU PATCH v4 09/22] risugen: use fewer insns for aarch64 immediate load X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Richard Henderson Signed-off-by: Alex Benn=C3=A9e --- risugen_arm.pm | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/risugen_arm.pm b/risugen_arm.pm index 83e521d..485e94e 100644 --- a/risugen_arm.pm +++ b/risugen_arm.pm @@ -261,15 +261,13 @@ sub write_mov_rr($$) =20 sub write_mov_ri16($$$) { - # Write 16 bits of immediate to register, using either MOVW or MOVT + # Write 16 bits of immediate to register. my ($rd, $imm, $is_movt) =3D @_; - die "write_mov_ri16: immediate $imm out of range\n" if (($imm & 0xffff= 0000) !=3D 0); =20 - if ($is_aarch64) { - # Use MOVZ 0x52800000. is_movt means MOVK of high bits */ - insn32(0xd2800000 | ($is_movt << 29) | ($is_movt ? 16 << 17 : 0) |= ($imm << 5) | $rd); + die "write_mov_ri16: invalid operation for this arch.\n" if ($is_aarch= 64); + die "write_mov_ri16: immediate $imm out of range\n" if (($imm & 0xffff= 0000) !=3D 0); =20 - } elsif ($is_thumb) { + if ($is_thumb) { # enc T3 my ($imm4, $i, $imm3, $imm8) =3D (($imm & 0xf000) >> 12, ($imm & 0x0800) >> 11, @@ -287,16 +285,24 @@ sub write_mov_ri16($$$) =20 sub write_mov_ri($$) { - # We always use a MOVW/MOVT pair, for simplicity. - # on aarch64, we use a MOVZ/MOVK pair. my ($rd, $imm) =3D @_; - write_mov_ri16($rd, ($imm & 0xffff), 0); my $highhalf =3D ($imm >> 16) & 0xffff; - write_mov_ri16($rd, $highhalf, 1) if $highhalf; =20 - if ($is_aarch64 && $imm < 0) { - # sign extend to allow small negative imm constants - write_sxt32($rd, $rd); + if ($is_aarch64) { + if ($imm < 0) { + # MOVN + insn32(0x92800000 | ((~$imm & 0xffff) << 5) | $rd); + # MOVK, LSL 16 + insn32(0xf2a00000 | ($highhalf << 5) | $rd) if $highhalf !=3D = 0xffff; + } else { + # MOVZ + insn32(0x52800000 | (($imm & 0xffff) << 5) | $rd); + # MOVK, LSL 16 + insn32(0xf2a00000 | ($highhalf << 5) | $rd) if $highhalf !=3D = 0; + } + } else { + write_mov_ri16($rd, ($imm & 0xffff), 0); + write_mov_ri16($rd, $highhalf, 1) if $highhalf; } } =20 --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529678457471935.0786118105228; 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X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [RISU PATCH v4 10/22] risugen: add reg_plus_imm_pl and reg_plus_imm_vl address helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Richard Henderson Signed-off-by: Alex Benn=C3=A9e --- risugen_arm.pm | 126 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) diff --git a/risugen_arm.pm b/risugen_arm.pm index 485e94e..696bf5f 100644 --- a/risugen_arm.pm +++ b/risugen_arm.pm @@ -306,6 +306,52 @@ sub write_mov_ri($$) } } =20 +sub write_addpl_rri($$$) +{ + my ($rd, $rn, $imm) =3D @_; + die "write_addpl: invalid operation for this arch.\n" if (!$is_aarch64= ); + + insn32(0x04605000 | ($rn << 16) | (($imm & 0x3f) << 5) | $rd); +} + +sub write_addvl_rri($$$) +{ + my ($rd, $rn, $imm) =3D @_; + die "write_addvl: invalid operation for this arch.\n" if (!$is_aarch64= ); + + insn32(0x04205000 | ($rn << 16) | (($imm & 0x3f) << 5) | $rd); +} + +sub write_rdvl_ri($$) +{ + my ($rd, $imm) =3D @_; + die "write_rdvl: invalid operation for this arch.\n" if (!$is_aarch64); + + insn32(0x04bf5000 | (($imm & 0x3f) << 5) | $rd); +} + +sub write_madd_rrrr($$$$) +{ + my ($rd, $rn, $rm, $ra) =3D @_; + die "write_madd: invalid operation for this arch.\n" if (!$is_aarch64); + + insn32(0x9b000000 | ($rm << 16) | ($ra << 10) | ($rn << 5) | $rd); +} + +sub write_msub_rrrr($$$$) +{ + my ($rd, $rn, $rm, $ra) =3D @_; + die "write_msub: invalid operation for this arch.\n" if (!$is_aarch64); + + insn32(0x9b008000 | ($rm << 16) | ($ra << 10) | ($rn << 5) | $rd); +} + +sub write_mul_rrr($$$) +{ + my ($rd, $rn, $rm) =3D @_; + write_madd_rrrr($rd, $rn, $rm, 31); +} + # write random fp value of passed precision (1=3Dsingle, 2=3Ddouble, 4=3Dq= uad) sub write_random_fpreg_var($) { @@ -767,6 +813,86 @@ sub reg_plus_imm($$@) return $base; } =20 +sub reg_plus_imm_pl($$@) +{ + # Handle reg + immediate addressing mode + my ($base, $imm, @trashed) =3D @_; + if ($imm =3D=3D 0) { + return reg($base, @trashed); + } + write_get_offset(); + + # Now r0 is the address we want to do the access to, + # so set the basereg by doing the inverse of the + # addressing mode calculation, ie base =3D r0 - imm + # + # Note that addpl has a 6-bit immediate, but ldr has a 9-bit + # immediate, so we need to be able to support larger immediates. + + if (-$imm >=3D -32 && -$imm <=3D 31) { + write_addpl_rri($base, 0, -$imm); + } else { + # We borrow r1 and r2 as a temporaries (not a problem + # as long as we don't leave anything in a register + # which depends on the location of the memory block) + write_mov_ri(1, 0); + write_mov_ri(2, $imm); + write_addpl_rri(1, 1, 1); + write_msub_rrrr($base, 1, 2, 0); + } + if (grep $_ =3D=3D $base, @trashed) { + return -1; + } + return $base; +} + +sub reg_plus_imm_vl($$@) +{ + # The usual address formulation is + # elements =3D VL DIV esize + # mbytes =3D msize DIV 8 + # addr =3D base + imm * elements * mbytes + # Here we compute + # scale =3D log2(esize / msize) + # base + (imm * VL) >> scale + my ($base, $imm, $scale, @trashed) =3D @_; + if ($imm =3D=3D 0) { + return reg($base, @trashed); + } + write_get_offset(); + + # Now r0 is the address we want to do the access to, + # so set the basereg by doing the inverse of the + # addressing mode calculation, ie base =3D r0 - imm + # + # Note that rdvl/addvl have a 6-bit immediate, but ldr has a 9-bit + # immediate, so we need to be able to support larger immediates. + + use integer; + my $mul =3D 1 << $scale; + my $imm_div =3D $imm / $mul; + + if ($imm =3D=3D $imm_div * $mul && -$imm_div >=3D -32 && -$imm_div <= =3D 31) { + write_addvl_rri($base, 0, -$imm_div); + } elsif ($imm >=3D -32 && $imm <=3D 31) { + write_rdvl_ri(1, $imm); + write_sub_rrrs($base, 0, 1, $SHIFT_ASR, $scale); + } else { + write_rdvl_ri(1, 1); + write_mov_ri(2, $imm); + if ($scale =3D=3D 0) { + write_msub_rrrr($base, 1, 2, 0); + } else { + write_mul_rrr(1, 1, 2); + write_sub_rrrs($base, 0, 1, $SHIFT_ASR, $scale); + } + } + if (grep $_ =3D=3D $base, @trashed) { + return -1; + } + return $base; +} + sub reg_minus_imm($$@) { my ($base, $imm, @trashed) =3D @_; --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152967864738619.431908861142915; Fri, 22 Jun 2018 07:44:07 -0700 (PDT) Received: from localhost ([::1]:34486 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWNIE-0007Bb-JD for importer@patchew.org; Fri, 22 Jun 2018 10:44:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38717) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnX-0006H0-98 for qemu-devel@nongnu.org; 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Fri, 22 Jun 2018 07:12:16 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:54 +0100 Message-Id: <20180622141205.16306-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::241 Subject: [Qemu-devel] [RISU PATCH v4 11/22] risugen: add dtype_msz address helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Alex Benn=C3=A9e --- risugen_arm.pm | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/risugen_arm.pm b/risugen_arm.pm index 696bf5f..8d423b1 100644 --- a/risugen_arm.pm +++ b/risugen_arm.pm @@ -765,6 +765,15 @@ sub write_get_offset() write_risuop($OP_GETMEMBLOCK); } =20 +# Return the log2 of the memory size of an operation described by dtype. +sub dtype_msz($) +{ + my ($dtype) =3D @_; + my $dth =3D $dtype >> 2; + my $dtl =3D $dtype & 3; + return $dtl >=3D $dth ? $dth : 3 - $dth; +} + sub reg($@) { my ($base, @trashed) =3D @_; --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677751157279.12878627540704; Fri, 22 Jun 2018 07:29:11 -0700 (PDT) Received: from localhost ([::1]:34392 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWN3j-0002zA-Ui for importer@patchew.org; Fri, 22 Jun 2018 10:29:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41833) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMwz-0005wq-1q for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMwx-0003Yw-KY for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:08 -0400 Received: from mail-wr0-x231.google.com ([2a00:1450:400c:c0c::231]:41380) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMwx-0003YA-Bm for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:07 -0400 Received: by mail-wr0-x231.google.com with SMTP id h10-v6so6879736wrq.8 for ; Fri, 22 Jun 2018 07:22:07 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id j131-v6sm3906967wmg.24.2018.06.22.07.22.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:22:04 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id E32A23E0B71; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/IZQ4p0hwe86+xUxCaKvDsHzWjVNlBH8FOK7w9lXmkc=; b=ETWW926sgH+LggAQPT6aZOEhatpg84ZlkpAkIPq1l02LA88nKf+BlOT/Tq0kqA/p7M 94MKjiYaSikHCjcm1IFqYLO94xoh52Lh8y8V/BMM4PxOH0/4WatekuCZ6n7Mf9JEP1MH pavNR8plhT/AauZNhiYwQeQvh9YJZwIWqYFbE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/IZQ4p0hwe86+xUxCaKvDsHzWjVNlBH8FOK7w9lXmkc=; b=maU4EaE8lPWk/UnpK6AZJvM3EIqJKoZsWI4O9zqQxT2pf2hL+ljYjwr0ltf5Fp3A7E OoH3aQ7OImdMU9hyqnnbEihvWsfcVpM+XXKPcHQz0pRZCzUgQgRxLtSSCeFJHc1792xC VmY8aRtVnvrJoXiUJGi8JxbGCdog+JBb184XQVz7EgsxJtPfnjRU2CxOl0ma+S5hKI1R YntjqELYIFrW9YF6qv5RPQqhlZBHb7t3UqE5v7p7UeFJkmFD2RTPo29PTkcEmrAF44nv 0lOXJEFoaYDPsPyZfsLj81WjReyiq7NavOQ1bjcSHg9Rs85SGK88ngw6N4NSFtOPoqbj 5Z2w== X-Gm-Message-State: APt69E22Z8dddetGXHbBW1dkX4CeWIeptNs9+HCgOvtmuFkaf0VPwVAh 4KClxgMQpiPY3z6n/062oeK4iQ== X-Google-Smtp-Source: ADUXVKI6s5+DkgoQo1ef5YT/hlAjPHGRBDol5pxgyAPisLbxbJCTyyK9D01JFlGZ26t2Na27AOLkZg== X-Received: by 2002:adf:8142:: with SMTP id 60-v6mr1760989wrm.192.1529677326190; Fri, 22 Jun 2018 07:22:06 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:55 +0100 Message-Id: <20180622141205.16306-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::231 Subject: [Qemu-devel] [RISU PATCH v4 12/22] contrib/generate_all.sh: allow passing of arguments to risugen X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 This allows us to use any new risugen options when generating all our test patterns. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- contrib/generate_all.sh | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/contrib/generate_all.sh b/contrib/generate_all.sh index 1e6b847..651cb23 100755 --- a/contrib/generate_all.sh +++ b/contrib/generate_all.sh @@ -12,11 +12,11 @@ # Alex Benn=C3=A9e - initial implementation # # Usage: -# ./contrib/generate_all.sh +# ./contrib/generate_all.sh -- risugen ar= gs =20 set -e =20 -USAGE=3D"Usage: `basename $0` [-h] [-n x] " +USAGE=3D"Usage: `basename $0` [-h] [-n x] -- [risu= gen args]" SPLIT=3D4 RISUGEN=3D$(CDPATH=3D cd -- "$(dirname -- "$0")/.." && pwd -P)/risugen =20 @@ -41,18 +41,24 @@ done # Remove the switches we parsed above. shift `expr $OPTIND - 1` =20 -while [ $# -ne 0 ]; do +# Parse up to and including any -- +RISUGEN_ARGS=3D"" +while [ $# -ne 0 ] && [ -z "$RISUGEN_ARGS" ]; do =20 if [ -f $1 ]; then RISU_FILE=3D$1; elif [ -d $1 ]; then TARGET_DIR=3D$1; + elif [ "$1" =3D "--" ]; then + RISUGEN_ARGS=3D$1 elif [ ! -e $1 ]; then TARGET_DIR=3D$1 fi =20 shift done +# anything left is for RISUGEN +RISUGEN_ARGS=3D$@ =20 if test -z "${RISUGEN}" || test ! -x "${RISUGEN}"; then echo "Couldn't find risugen (${RISUGEN})" @@ -90,7 +96,7 @@ while test $# -gt 0 ; do fi done I_FILE=3D"${I_FILE}_INC.risu.bin" - CMD=3D"${RISUGEN} ${INSN_PATTERNS} ${RISU_FILE} ${I_FILE}" + CMD=3D"${RISUGEN} ${RISUGEN_ARGS} ${INSN_PATTERNS} ${RISU_FILE} ${I_FI= LE}" echo "Running: $CMD" $CMD done --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529679442100882.843310582266; Fri, 22 Jun 2018 07:57:22 -0700 (PDT) Received: from localhost ([::1]:34583 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWNUz-0000U5-F7 for importer@patchew.org; Fri, 22 Jun 2018 10:57:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41873) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMx0-0005yO-0t for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMwy-0003Zx-O6 for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:09 -0400 Received: from mail-wm0-x235.google.com ([2a00:1450:400c:c09::235]:35869) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMwy-0003ZG-DJ for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:08 -0400 Received: by mail-wm0-x235.google.com with SMTP id v131-v6so2837145wma.1 for ; Fri, 22 Jun 2018 07:22:08 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id h11-v6sm7378200wrs.85.2018.06.22.07.22.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:22:04 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id EFD243E0BB0; Fri, 22 Jun 2018 15:12:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BN9TlWSjJtBY5uzotv2E0/KhskH7jcna9d7GkYd5aiA=; b=cONDAWzfmgxXivtwzSEUVMsYGwP/afnN9Z92kmAHCX9mw7UsJ1Z29UEz38BHIUQF5G 76LwD821rGHANB7FT/FVoXh34nJ3hfWEolN0Jo04tY0UJpzlvmLE2nW/8cJ9KJ70a5lQ /q8wtX1M8wmU6l2OHjmKCAnt9QkAeRmIaspCI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BN9TlWSjJtBY5uzotv2E0/KhskH7jcna9d7GkYd5aiA=; b=k9a/vpsyTZ5abV1Mzi6W1QnMQHjsZzHf5EBPY+jh9fGA4HGavTAHWUqyMSqHabBAAE hq2wKt2yAORgZkOzwvWhrXur37RnjMkuHNcwYN7J8j4AK93c4VTrDweUs0v8ukOl/pS4 JJ3lWSwJuzINFe9kzvZlrbcy8zUHszUt022oKMARkjwPln5QRKN0V6UAVs9XJ0AI8GCy jcmZ/HFbSshp3xrgTd8sYRLFg5ZndrBtYkXVvJOr8LAv5mO3KhcnoaA29UhC2t1Ll1E6 yirvBHyIhHA1bbTVRqB6gMLlnZ8gIknVVXEiDzR56DK3rLOJYxRSq/iw2Zom52s+4bS5 z8Pw== X-Gm-Message-State: APt69E26n5+MRUDedCuJa/Y29j5AiPvN/BAbBy73J904tf+cq3Dh/DKf 9JXyItMyC4KXwuF6aAJqJ3gaEw== X-Google-Smtp-Source: ADUXVKIT6+u/8UzOnix6PE08kWI+dnfKWrBvIW4+J8nPb7uS8/TvvoYtEIoMLGjGOCvZoxO/Y7YyFA== X-Received: by 2002:a1c:b6c3:: with SMTP id g186-v6mr1857305wmf.40.1529677327304; Fri, 22 Jun 2018 07:22:07 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:56 +0100 Message-Id: <20180622141205.16306-14-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::235 Subject: [Qemu-devel] [RISU PATCH v4 13/22] risu: move optional args to each architecture X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 The key variables here are: *arch_long_opts and *arch_extra_help. If they are not NULL then we concatenate the extra options to appropriate structure to enable the support. Adding architecture short options is not supported. This also includes moving the ARM specific test_fp_exc/test-fp-exc into ARM specific code. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v2 - better concatenation of default and extra opts --- risu.c | 29 +++++++++++++++++++++++++---- risu.h | 6 ++++-- risu_reginfo_aarch64.c | 3 +++ risu_reginfo_arm.c | 11 +++++++++++ risu_reginfo_m68k.c | 3 +++ risu_reginfo_ppc64.c | 3 +++ 6 files changed, 49 insertions(+), 6 deletions(-) diff --git a/risu.c b/risu.c index c684c90..18de351 100644 --- a/risu.c +++ b/risu.c @@ -46,8 +46,7 @@ gzFile gz_trace_file; =20 sigjmp_buf jmpbuf; =20 -/* Should we test for FP exception status bits? */ -int test_fp_exc; +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) =20 /* Master functions */ =20 @@ -283,6 +282,9 @@ void usage(void) fprintf(stderr, " -p, --port=3DPORT Specify the port to connect to/listen o= n " "(default 9191)\n"); + if (arch_extra_help) { + fprintf(stderr, "%s", arch_extra_help); + } } =20 struct option * setup_options(char **short_opts) @@ -293,12 +295,31 @@ struct option * setup_options(char **short_opts) {"host", required_argument, 0, 'h'}, {"port", required_argument, 0, 'p'}, {"trace", required_argument, 0, 't'}, - {"test-fp-exc", no_argument, &test_fp_exc, 1}, {0, 0, 0, 0} }; + struct option *lopts =3D &default_longopts[0]; =20 *short_opts =3D "h:p:t:"; - return default_longopts; + + if (arch_long_opts) { + const size_t osize =3D sizeof(struct option); + const int default_count =3D ARRAY_SIZE(default_longopts); + struct option *dptr; + int extra_count =3D 0; + + /* count additional opts */ + dptr =3D arch_long_opts; + do {} while (dptr[extra_count++].name); + + lopts =3D calloc(default_count + extra_count, osize); + + /* Copy default opts + extra opts */ + memcpy(lopts, default_longopts, default_count * osize); + dptr =3D &lopts[default_count - 1]; + memcpy(dptr, arch_long_opts, extra_count * osize); + } + + return lopts; } =20 int main(int argc, char **argv) diff --git a/risu.h b/risu.h index 1c8ecee..89811f4 100644 --- a/risu.h +++ b/risu.h @@ -17,6 +17,10 @@ #include #include =20 +/* Extra option processing for architectures */ +extern void *arch_long_opts; +extern char *arch_extra_help; + /* GCC computed include to pull in the correct risu_reginfo_*.h for * the architecture. */ @@ -36,8 +40,6 @@ void send_response_byte(int sock, int resp); extern uintptr_t image_start_address; extern void *memblock; =20 -extern int test_fp_exc; - /* Ops code under test can request from risu: */ #define OP_COMPARE 0 #define OP_TESTEND 1 diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 3bb4339..ab12270 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -18,6 +18,9 @@ #include "risu.h" #include "risu_reginfo_aarch64.h" =20 +void *arch_long_opts; +char *arch_extra_help; + /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) { diff --git a/risu_reginfo_arm.c b/risu_reginfo_arm.c index 6b9ee7b..5acad02 100644 --- a/risu_reginfo_arm.c +++ b/risu_reginfo_arm.c @@ -13,12 +13,23 @@ #include #include #include +#include =20 #include "risu.h" #include "risu_reginfo_arm.h" =20 extern int insnsize(ucontext_t *uc); =20 +/* Should we test for FP exception status bits? */ +static int test_fp_exc; +static struct option extra_opts[] =3D { + {"test-fp-exc", no_argument, &test_fp_exc, 1}, + {0, 0, 0, 0} +}; + +void *arch_long_opts =3D &extra_opts[0]; +char *arch_extra_help =3D " --test-fp-exc Check FP exception bits whe= n comparing\n"; + static void reginfo_init_vfp(struct reginfo *ri, ucontext_t *uc) { /* Read VFP registers. These live in uc->uc_regspace, which is diff --git a/risu_reginfo_m68k.c b/risu_reginfo_m68k.c index 4ff0aa8..d429502 100644 --- a/risu_reginfo_m68k.c +++ b/risu_reginfo_m68k.c @@ -14,6 +14,9 @@ #include "risu.h" #include "risu_reginfo_m68k.h" =20 +void *arch_long_opts; +char *arch_extra_help; + /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) { diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c index 5f33648..395111c 100644 --- a/risu_reginfo_ppc64.c +++ b/risu_reginfo_ppc64.c @@ -22,6 +22,9 @@ #define XER 37 #define CCR 38 =20 +void *arch_long_opts; +char *arch_extra_help; + /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) { --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529678182706846.0046549458295; Fri, 22 Jun 2018 07:36:22 -0700 (PDT) Received: from localhost ([::1]:34444 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWNAj-0000D6-Ur for importer@patchew.org; Fri, 22 Jun 2018 10:36:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38715) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnX-0006Gy-8r for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnT-0006DL-6a for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:23 -0400 Received: from mail-wr0-x229.google.com ([2a00:1450:400c:c0c::229]:44187) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnS-0006CV-R9 for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:19 -0400 Received: by mail-wr0-x229.google.com with SMTP id p12-v6so5238072wrn.11 for ; Fri, 22 Jun 2018 07:12:18 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id r75-v6sm4144125wmg.31.2018.06.22.07.12.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:11 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 0688B3E0BC6; Fri, 22 Jun 2018 15:12:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Bp/1YbPML67ffji3kuZga7TLev+DhxX9wc1+8T4FSYo=; b=EMRdXx3/WdYVNvuzppA9S7kTflFJ+sxz87m8whoiHB+uYxK4ILC5aW1Fel44Dtz8wf 6LxPJWDJ9/M4P5LL1qdJ94Wq/Npvc0fM9FKYKxv5CtxTFd067VSlnLJU8SGlnHl7s0ah zqfY+3FLBEEmDOlZjah5+b84twL7Y+R+Hq4S8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Bp/1YbPML67ffji3kuZga7TLev+DhxX9wc1+8T4FSYo=; b=fViFsjx6EaO9M8Jbu4mjYXQgA0PUszl5zD2YEsGKdtG73gVeLiCyaV4RSvEwTESBy4 Lvw+yKdpAwdRcMOHhvED+WX/T6CgDaqkmWY4Meac/ptCTZeEgiDlnZuh4SkR4k5YVkBL lfEZP6qwoaOV/5/aaOBq54WNtP+lOpM77OW54XhzEfTIxrtHVm2HAGlzdA9AtDpIwbEe JU1U245jMxihgrWaLSdrc5ItVrOJ/EdZD3xBuNejPNjvZNsSfG4ZJEL2D7IRMmRLQptd m7BoOmKdO3V1yYASBSF3wpjXUebePZN8TQArORWGq5z/qpcln7EDxm2NPF2oeYanYcQe 6A/A== X-Gm-Message-State: APt69E0EBznQWKJJECp0ARyQXFfdYq/NnmbXI4tHNIRCMFB4BIc89av0 OJ25hv7DZhTdglrX+nh4XFImwA== X-Google-Smtp-Source: ADUXVKKkQ3hbDi07siIJkr+jLvVnA0WhbWIxH5ncHAZNauun8eBVZQpsKJS7yYi/1YWjxpe3XUbKBg== X-Received: by 2002:adf:96ad:: with SMTP id u42-v6mr1828505wrb.184.1529676737791; Fri, 22 Jun 2018 07:12:17 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:57 +0100 Message-Id: <20180622141205.16306-15-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::229 Subject: [Qemu-devel] [RISU PATCH v4 14/22] risu: add process_arch_opt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Richard Henderson Allows the backend to do more that just set a flag when it comes to processing options. Signed-off-by: Richard Henderson [AJB: tweaked order, added stdlib includes] Signed-off-by: Alex Benn=C3=A9e --- risu.c | 33 +++++++++++---------------------- risu.h | 7 +++++-- risu_reginfo_aarch64.c | 10 ++++++++-- risu_reginfo_arm.c | 14 ++++++++++---- risu_reginfo_m68k.c | 10 ++++++++-- risu_reginfo_ppc64.c | 10 ++++++++-- 6 files changed, 50 insertions(+), 34 deletions(-) diff --git a/risu.c b/risu.c index 18de351..01525d2 100644 --- a/risu.c +++ b/risu.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include @@ -27,7 +26,6 @@ #include =20 #include "config.h" - #include "risu.h" =20 void *memblock; @@ -287,7 +285,7 @@ void usage(void) } } =20 -struct option * setup_options(char **short_opts) +static struct option * setup_options(char **short_opts) { static struct option default_longopts[] =3D { {"help", no_argument, 0, '?'}, @@ -303,20 +301,19 @@ struct option * setup_options(char **short_opts) =20 if (arch_long_opts) { const size_t osize =3D sizeof(struct option); - const int default_count =3D ARRAY_SIZE(default_longopts); - struct option *dptr; - int extra_count =3D 0; + const int default_count =3D ARRAY_SIZE(default_longopts) - 1; + int arch_count; =20 /* count additional opts */ - dptr =3D arch_long_opts; - do {} while (dptr[extra_count++].name); + for (arch_count =3D 0; arch_long_opts[arch_count].name; arch_count= ++) { + continue; + } =20 - lopts =3D calloc(default_count + extra_count, osize); + lopts =3D calloc(default_count + arch_count + 1, osize); =20 /* Copy default opts + extra opts */ memcpy(lopts, default_longopts, default_count * osize); - dptr =3D &lopts[default_count - 1]; - memcpy(dptr, arch_long_opts, extra_count * osize); + memcpy(lopts + default_count, arch_long_opts, arch_count * osize); } =20 return lopts; @@ -343,34 +340,26 @@ int main(int argc, char **argv) =20 switch (c) { case 0: - { /* flag set by getopt_long, do nothing */ break; - } case 't': - { trace_fn =3D optarg; trace =3D 1; break; - } case 'h': - { hostname =3D optarg; break; - } case 'p': - { /* FIXME err handling */ port =3D strtol(optarg, 0, 10); break; - } case '?': - { usage(); exit(1); - } default: - abort(); + assert(c >=3D FIRST_ARCH_OPT); + process_arch_opt(c, optarg); + break; } } =20 diff --git a/risu.h b/risu.h index 89811f4..48c50d9 100644 --- a/risu.h +++ b/risu.h @@ -16,10 +16,13 @@ #include #include #include +#include =20 /* Extra option processing for architectures */ -extern void *arch_long_opts; -extern char *arch_extra_help; +extern const struct option * const arch_long_opts; +extern const char * const arch_extra_help; +void process_arch_opt(int opt, const char *arg); +#define FIRST_ARCH_OPT 0x100 =20 /* GCC computed include to pull in the correct risu_reginfo_*.h for * the architecture. diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index ab12270..c270e0b 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -14,12 +14,18 @@ #include #include #include /* for FPSIMD_MAGIC */ +#include =20 #include "risu.h" #include "risu_reginfo_aarch64.h" =20 -void *arch_long_opts; -char *arch_extra_help; +const struct option * const arch_long_opts; +const char * const arch_extra_help; + +void process_arch_opt(int opt, const char *arg) +{ + abort(); +} =20 /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) diff --git a/risu_reginfo_arm.c b/risu_reginfo_arm.c index 5acad02..12ad0ef 100644 --- a/risu_reginfo_arm.c +++ b/risu_reginfo_arm.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include =20 #include "risu.h" #include "risu_reginfo_arm.h" @@ -22,13 +22,19 @@ extern int insnsize(ucontext_t *uc); =20 /* Should we test for FP exception status bits? */ static int test_fp_exc; -static struct option extra_opts[] =3D { +static const struct option extra_opts[] =3D { {"test-fp-exc", no_argument, &test_fp_exc, 1}, {0, 0, 0, 0} }; =20 -void *arch_long_opts =3D &extra_opts[0]; -char *arch_extra_help =3D " --test-fp-exc Check FP exception bits whe= n comparing\n"; +const struct option * const arch_long_opts =3D &extra_opts[0]; +const char * const arch_extra_help =3D + " --test-fp-exc Check FP exception bits when comparing\n"; + +void process_arch_opt(int opt, const char *arg) +{ + abort(); +} =20 static void reginfo_init_vfp(struct reginfo *ri, ucontext_t *uc) { diff --git a/risu_reginfo_m68k.c b/risu_reginfo_m68k.c index d429502..7a1c5a9 100644 --- a/risu_reginfo_m68k.c +++ b/risu_reginfo_m68k.c @@ -10,12 +10,18 @@ #include #include #include +#include =20 #include "risu.h" #include "risu_reginfo_m68k.h" =20 -void *arch_long_opts; -char *arch_extra_help; +const struct option * const arch_long_opts; +const char * const arch_extra_help; + +void process_arch_opt(int opt, const char *arg) +{ + abort(); +} =20 /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c index 395111c..4b70460 100644 --- a/risu_reginfo_ppc64.c +++ b/risu_reginfo_ppc64.c @@ -15,6 +15,7 @@ #include #include #include +#include =20 #include "risu.h" #include "risu_reginfo_ppc64.h" @@ -22,8 +23,13 @@ #define XER 37 #define CCR 38 =20 -void *arch_long_opts; -char *arch_extra_help; +const struct option * const arch_long_opts; +const char * const arch_extra_help; + +void process_arch_opt(int opt, const char *arg) +{ + abort(); +} =20 /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529679043631485.98234296117687; Fri, 22 Jun 2018 07:50:43 -0700 (PDT) Received: from localhost ([::1]:34535 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWNOV-0003l5-Tz for importer@patchew.org; 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X-Received-From: 2a00:1450:400c:c09::230 Subject: [Qemu-devel] [RISU PATCH v4 15/22] risu_reginfo_aarch64: drop stray ; X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- risu_reginfo_aarch64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index c270e0b..34dd9af 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -66,7 +66,7 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc) for (i =3D 0; i < 32; i++) { ri->vregs[i] =3D fp->vregs[i]; } -}; +} =20 /* reginfo_is_eq: compare the reginfo structs, returns nonzero if equal */ int reginfo_is_eq(struct reginfo *r1, struct reginfo *r2) --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677990835285.5333023756649; Fri, 22 Jun 2018 07:33:10 -0700 (PDT) Received: from localhost ([::1]:34419 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWN7d-00065I-Vn for importer@patchew.org; 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X-Received-From: 2a00:1450:400c:c09::22c Subject: [Qemu-devel] [RISU PATCH v4 16/22] risu_reginfo_aarch64: unionify VFP regs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 This is preparation for the SVE work as we won't want to be carrying around both VFP and SVE registers at the same time as they overlap. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- risu_reginfo_aarch64.c | 16 ++++++++-------- risu_reginfo_aarch64.h | 9 ++++++++- 2 files changed, 16 insertions(+), 9 deletions(-) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 34dd9af..62a5599 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -64,7 +64,7 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc) ri->fpcr =3D fp->fpcr; =20 for (i =3D 0; i < 32; i++) { - ri->vregs[i] =3D fp->vregs[i]; + ri->simd.vregs[i] =3D fp->vregs[i]; } } =20 @@ -92,8 +92,8 @@ int reginfo_dump(struct reginfo *ri, FILE * f) =20 for (i =3D 0; i < 32; i++) { fprintf(f, " V%2d : %016" PRIx64 "%016" PRIx64 "\n", i, - (uint64_t) (ri->vregs[i] >> 64), - (uint64_t) (ri->vregs[i] & 0xffffffffffffffff)); + (uint64_t) (ri->simd.vregs[i] >> 64), + (uint64_t) (ri->simd.vregs[i] & 0xffffffffffffffff)); } =20 return !ferror(f); @@ -138,14 +138,14 @@ int reginfo_dump_mismatch(struct reginfo *m, struct r= eginfo *a, FILE * f) } =20 for (i =3D 0; i < 32; i++) { - if (m->vregs[i] !=3D a->vregs[i]) { + if (m->simd.vregs[i] !=3D a->simd.vregs[i]) { fprintf(f, " V%2d : " "%016" PRIx64 "%016" PRIx64 " vs " "%016" PRIx64 "%016" PRIx64 "\n", i, - (uint64_t) (m->vregs[i] >> 64), - (uint64_t) (m->vregs[i] & 0xffffffffffffffff), - (uint64_t) (a->vregs[i] >> 64), - (uint64_t) (a->vregs[i] & 0xffffffffffffffff)); + (uint64_t) (m->simd.vregs[i] >> 64), + (uint64_t) (m->simd.vregs[i] & 0xffffffffffffffff), + (uint64_t) (a->simd.vregs[i] >> 64), + (uint64_t) (a->simd.vregs[i] & 0xffffffffffffffff)); } } =20 diff --git a/risu_reginfo_aarch64.h b/risu_reginfo_aarch64.h index a05fb4e..a1c708b 100644 --- a/risu_reginfo_aarch64.h +++ b/risu_reginfo_aarch64.h @@ -13,6 +13,10 @@ #ifndef RISU_REGINFO_AARCH64_H #define RISU_REGINFO_AARCH64_H =20 +struct simd_reginfo { + __uint128_t vregs[32]; +}; + struct reginfo { uint64_t fault_address; uint64_t regs[31]; @@ -24,7 +28,10 @@ struct reginfo { /* FP/SIMD */ uint32_t fpsr; uint32_t fpcr; - __uint128_t vregs[32]; + + union { + struct simd_reginfo simd; + }; }; =20 #endif /* RISU_REGINFO_AARCH64_H */ --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529679329738807.0262835902438; Fri, 22 Jun 2018 07:55:29 -0700 (PDT) Received: from localhost ([::1]:34561 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWNT7-0007Lf-30 for importer@patchew.org; Fri, 22 Jun 2018 10:55:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41755) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMww-0005uA-Hh for qemu-devel@nongnu.org; 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Fri, 22 Jun 2018 07:22:02 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:12:00 +0100 Message-Id: <20180622141205.16306-18-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::232 Subject: [Qemu-devel] [RISU PATCH v4 17/22] risu_reginfo: introduce reginfo_size() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 In preparation for conditionally supporting SVE we need to be able to have different sized reginfos. This introduces reginfo_size() to abstract the size away to the code the actually knows. For aarch64 we also use this while initialising the block. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- reginfo.c | 6 +++--- risu.h | 3 +++ risu_reginfo_aarch64.c | 11 ++++++++++- risu_reginfo_aarch64.h | 1 + risu_reginfo_arm.c | 5 +++++ risu_reginfo_m68k.c | 5 +++++ risu_reginfo_ppc64.c | 5 +++++ 7 files changed, 32 insertions(+), 4 deletions(-) diff --git a/reginfo.c b/reginfo.c index 1f55d06..dd42ae2 100644 --- a/reginfo.c +++ b/reginfo.c @@ -39,7 +39,7 @@ int send_register_info(write_fn write_fn, void *uc) =20 switch (op) { case OP_TESTEND: - write_fn(&ri, sizeof(ri)); + write_fn(&ri, reginfo_size()); /* if we are tracing write_fn will return 0 unlike a remote end, hence we force return of 1 here */ return 1; @@ -58,7 +58,7 @@ int send_register_info(write_fn write_fn, void *uc) /* Do a simple register compare on (a) explicit request * (b) end of test (c) a non-risuop UNDEF */ - return write_fn(&ri, sizeof(ri)); + return write_fn(&ri, reginfo_size()); } return 0; } @@ -101,7 +101,7 @@ int recv_and_compare_register_info(read_fn read_fn, /* Do a simple register compare on (a) explicit request * (b) end of test (c) a non-risuop UNDEF */ - if (read_fn(&apprentice_ri, sizeof(apprentice_ri))) { + if (read_fn(&apprentice_ri, reginfo_size())) { packet_mismatch =3D 1; resp =3D 2; } else if (!reginfo_is_eq(&master_ri, &apprentice_ri)) { diff --git a/risu.h b/risu.h index 48c50d9..8d2d646 100644 --- a/risu.h +++ b/risu.h @@ -133,4 +133,7 @@ int reginfo_dump(struct reginfo *ri, FILE * f); /* reginfo_dump_mismatch: print mismatch details to a stream, ret nonzero= =3Dok */ int reginfo_dump_mismatch(struct reginfo *m, struct reginfo *a, FILE *f); =20 +/* return size of reginfo */ +const int reginfo_size(void); + #endif /* RISU_H */ diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 62a5599..5da9e39 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -15,6 +15,8 @@ #include #include /* for FPSIMD_MAGIC */ #include +#include +#include =20 #include "risu.h" #include "risu_reginfo_aarch64.h" @@ -27,6 +29,13 @@ void process_arch_opt(int opt, const char *arg) abort(); } =20 +const int reginfo_size(void) +{ + const int size =3D offsetof(struct reginfo, simd.end); + assert(sizeof(struct reginfo)=3D=3Dsize); + return size; +} + /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) { @@ -71,7 +80,7 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc) /* reginfo_is_eq: compare the reginfo structs, returns nonzero if equal */ int reginfo_is_eq(struct reginfo *r1, struct reginfo *r2) { - return memcmp(r1, r2, sizeof(*r1)) =3D=3D 0; + return memcmp(r1, r2, reginfo_size()) =3D=3D 0; } =20 /* reginfo_dump: print state to a stream, returns nonzero on success */ diff --git a/risu_reginfo_aarch64.h b/risu_reginfo_aarch64.h index a1c708b..ef97622 100644 --- a/risu_reginfo_aarch64.h +++ b/risu_reginfo_aarch64.h @@ -15,6 +15,7 @@ =20 struct simd_reginfo { __uint128_t vregs[32]; + char end[0]; }; =20 struct reginfo { diff --git a/risu_reginfo_arm.c b/risu_reginfo_arm.c index 12ad0ef..3662f12 100644 --- a/risu_reginfo_arm.c +++ b/risu_reginfo_arm.c @@ -36,6 +36,11 @@ void process_arch_opt(int opt, const char *arg) abort(); } =20 +const int reginfo_size(void) +{ + return sizeof(struct reginfo); +} + static void reginfo_init_vfp(struct reginfo *ri, ucontext_t *uc) { /* Read VFP registers. These live in uc->uc_regspace, which is diff --git a/risu_reginfo_m68k.c b/risu_reginfo_m68k.c index 7a1c5a9..32b28c8 100644 --- a/risu_reginfo_m68k.c +++ b/risu_reginfo_m68k.c @@ -23,6 +23,11 @@ void process_arch_opt(int opt, const char *arg) abort(); } =20 +const int reginfo_size(void) +{ + return sizeof(struct reginfo); +} + /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) { diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c index 4b70460..f9d2f0d 100644 --- a/risu_reginfo_ppc64.c +++ b/risu_reginfo_ppc64.c @@ -31,6 +31,11 @@ void process_arch_opt(int opt, const char *arg) abort(); } =20 +const int reginfo_size(void) +{ + return sizeof(struct reginfo); +} + /* reginfo_init: initialize with a ucontext */ void reginfo_init(struct reginfo *ri, ucontext_t *uc) { --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529678386805642.5793179692679; Fri, 22 Jun 2018 07:39:46 -0700 (PDT) Received: from localhost ([::1]:34460 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWNDo-0003G7-Nb for importer@patchew.org; Fri, 22 Jun 2018 10:39:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41761) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMww-0005uE-J7 for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMwt-0003Vp-Af for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:06 -0400 Received: from mail-wm0-x241.google.com ([2a00:1450:400c:c09::241]:52252) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMwt-0003V5-38 for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:22:03 -0400 Received: by mail-wm0-x241.google.com with SMTP id p126-v6so2445853wmb.2 for ; Fri, 22 Jun 2018 07:22:02 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id y8-v6sm10734164wrs.0.2018.06.22.07.22.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:22:00 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 355413E0C8C; Fri, 22 Jun 2018 15:12:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dclRwBk0m7BKfnhe6PaRdYoaCNDPARqLQaSD7Izq0Vk=; b=cVanLzaqslUX++f2Qi3dpvH2sNb42eTqSfLOhIUzxnal2/hq64/Z4ggYePtQgCjOnC AJ07Uw2aUo1w6Q2HS6rclWdUUNVxTloXuHr7C8/4tZB3mSgZitXggkhsxr01bymoHDsl 0OltETpAQMGtmw3PeHuewxEdKmiVVQkHgumyA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dclRwBk0m7BKfnhe6PaRdYoaCNDPARqLQaSD7Izq0Vk=; b=OMcA40NXFg+lQ4VVAwHBS2wszZ7xLnNHtFnFq88L2NtkH6qdcayiy8pJyOibUXMk0T 44txJON6qZ63WRxo5WPRzRKJdQiA+88Tcmtc4JHb+TtthkF+pwf0PUDCGBYaOmT0SQRU 0XlO3HHB+TAoOAkWvXHKdL/fKzUBYWY4g/ymqGrDejajveix37Urk1N82Oh2WYn7idyb QIzfxYqc5SOI7h+9pnb9ghaI9HmGcg99Hi92jh+vXEinvcGVl4I80kk31aI4bLc9JIzJ votdY4lLNmAtbDC+aqlcOh/BAcw4xSSrnNliDNeu5D/z2HlIx0sDhbWjUgP/mdOPOljr /WDw== X-Gm-Message-State: APt69E3jaLhZ5Gr6fSOePsAKiYjiQEwneDWzRrxcWzFK9F9/uMYuqqSd yJvyuoK508j1YrVYxcPiAwkBXQ== X-Google-Smtp-Source: ADUXVKI4n1Ef9q9v3y5Qak+/9cd+8VgzaGIuJ4pdc484DAGWtsaOmRkkW61F76Vr1ESxvgBNwOpLVQ== X-Received: by 2002:a1c:8cd:: with SMTP id 196-v6mr2009334wmi.46.1529677321982; Fri, 22 Jun 2018 07:22:01 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:12:01 +0100 Message-Id: <20180622141205.16306-19-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::241 Subject: [Qemu-devel] [RISU PATCH v4 18/22] risu_reginfo_aarch64: left justify regnums and drop masks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Left justification is more pleasing to the eye than the default. We also drop the masking which isn't needed as we are casting to a smaller size anyway. This was split out of Richard's re-factoring work for SVE. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- risu_reginfo_aarch64.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 5da9e39..3ccaf0e 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -90,7 +90,7 @@ int reginfo_dump(struct reginfo *ri, FILE * f) fprintf(f, " faulting insn %08x\n", ri->faulting_insn); =20 for (i =3D 0; i < 31; i++) { - fprintf(f, " X%2d : %016" PRIx64 "\n", i, ri->regs[i]); + fprintf(f, " X%-2d : %016" PRIx64 "\n", i, ri->regs[i]); } =20 fprintf(f, " sp : %016" PRIx64 "\n", ri->sp); @@ -100,9 +100,9 @@ int reginfo_dump(struct reginfo *ri, FILE * f) fprintf(f, " fpcr : %08x\n", ri->fpcr); =20 for (i =3D 0; i < 32; i++) { - fprintf(f, " V%2d : %016" PRIx64 "%016" PRIx64 "\n", i, + fprintf(f, " V%-2d : %016" PRIx64 "%016" PRIx64 "\n", i, (uint64_t) (ri->simd.vregs[i] >> 64), - (uint64_t) (ri->simd.vregs[i] & 0xffffffffffffffff)); + (uint64_t) (ri->simd.vregs[i])); } =20 return !ferror(f); @@ -119,7 +119,7 @@ int reginfo_dump_mismatch(struct reginfo *m, struct reg= info *a, FILE * f) } for (i =3D 0; i < 31; i++) { if (m->regs[i] !=3D a->regs[i]) { - fprintf(f, " X%2d : %016" PRIx64 " vs %016" PRIx64 "\n", + fprintf(f, " X%-2d : %016" PRIx64 " vs %016" PRIx64 "\n", i, m->regs[i], a->regs[i]); } } @@ -148,13 +148,13 @@ int reginfo_dump_mismatch(struct reginfo *m, struct r= eginfo *a, FILE * f) =20 for (i =3D 0; i < 32; i++) { if (m->simd.vregs[i] !=3D a->simd.vregs[i]) { - fprintf(f, " V%2d : " + fprintf(f, " V%-2d : " "%016" PRIx64 "%016" PRIx64 " vs " "%016" PRIx64 "%016" PRIx64 "\n", i, (uint64_t) (m->simd.vregs[i] >> 64), - (uint64_t) (m->simd.vregs[i] & 0xffffffffffffffff), + (uint64_t) m->simd.vregs[i], (uint64_t) (a->simd.vregs[i] >> 64), - (uint64_t) (a->simd.vregs[i] & 0xffffffffffffffff)); + (uint64_t) a->simd.vregs[i]); } } =20 --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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X-Received-From: 2a00:1450:400c:c09::244 Subject: [Qemu-devel] [RISU PATCH v4 19/22] risu_reginfo_aarch64: add support for copying SVE register state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Add the ability to save SVE registers from the signal context. This is controlled with an optional flag --test-sve. The whole thing is conditionally compiled when SVE support is in the sigcontext headers. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v2 - support EXTRA_MAGIC contexts v3 - handle conditional bits - include in reginfo.h - move from helper function to main init function - (void *) cast for memcpy - additional ifdef SVE_MAGIC stuff --- risu_reginfo_aarch64.c | 107 ++++++++++++++++++++++++++++++++++++----- risu_reginfo_aarch64.h | 16 ++++++ 2 files changed, 110 insertions(+), 13 deletions(-) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 3ccaf0e..79db5dd 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -16,13 +16,26 @@ #include /* for FPSIMD_MAGIC */ #include #include -#include +#include =20 #include "risu.h" #include "risu_reginfo_aarch64.h" =20 +#ifndef SVE_MAGIC const struct option * const arch_long_opts; const char * const arch_extra_help; +#else + +/* Should we test SVE register state */ +static int test_sve; +static const struct option extra_opts[] =3D { + {"test-sve", no_argument, &test_sve, 1}, + {0, 0, 0, 0} +}; + +const struct option * const arch_long_opts =3D &extra_opts[0]; +const char * const arch_extra_help =3D " --test-sve Compare SVE re= gisters\n"; +#endif =20 void process_arch_opt(int opt, const char *arg) { @@ -31,8 +44,12 @@ void process_arch_opt(int opt, const char *arg) =20 const int reginfo_size(void) { - const int size =3D offsetof(struct reginfo, simd.end); - assert(sizeof(struct reginfo)=3D=3Dsize); + int size =3D offsetof(struct reginfo, simd.end); +#ifdef SVE_MAGIC + if (test_sve) { + size =3D offsetof(struct reginfo, sve.end); + } +#endif return size; } =20 @@ -40,8 +57,12 @@ const int reginfo_size(void) void reginfo_init(struct reginfo *ri, ucontext_t *uc) { int i; - struct _aarch64_ctx *ctx; - struct fpsimd_context *fp; + struct _aarch64_ctx *ctx, *extra =3D NULL; + struct fpsimd_context *fp =3D NULL; +#ifdef SVE_MAGIC + struct sve_context *sve =3D NULL; +#endif + /* necessary to be able to compare with memcmp later */ memset(ri, 0, sizeof(*ri)); =20 @@ -57,21 +78,81 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc) ri->faulting_insn =3D *((uint32_t *) uc->uc_mcontext.pc); =20 ctx =3D (struct _aarch64_ctx *) &uc->uc_mcontext.__reserved[0]; - - while (ctx->magic !=3D FPSIMD_MAGIC && ctx->size !=3D 0) { - ctx +=3D (ctx->size + sizeof(*ctx) - 1) / sizeof(*ctx); + while (ctx) { + switch (ctx->magic) { + case FPSIMD_MAGIC: + fp =3D (void *)ctx; + break; +#ifdef SVE_MAGIC + case SVE_MAGIC: + sve =3D (void *)ctx; + break; + case EXTRA_MAGIC: + extra =3D (void *)((struct extra_context *)(ctx))->datap; + break; +#endif + case 0: + /* End of list. */ + ctx =3D extra; + extra =3D NULL; + continue; + default: + /* Unknown record -- skip it. */ + break; + } + ctx =3D (void *)ctx + ctx->size; } =20 - if (ctx->magic !=3D FPSIMD_MAGIC || ctx->size !=3D sizeof(*fp)) { - fprintf(stderr, - "risu_reginfo_aarch64: failed to get FP/SIMD state\n"); + if (!fp || fp->head.size !=3D sizeof(*fp)) { + fprintf(stderr, "risu_reginfo_aarch64: failed to get FP/SIMD state= \n"); return; } - - fp =3D (struct fpsimd_context *) ctx; ri->fpsr =3D fp->fpsr; ri->fpcr =3D fp->fpcr; =20 +#ifdef SVE_MAGIC + if (test_sve) { + int vq =3D sve_vq_from_vl(sve->vl); /* number of quads for whole v= l */ + + if (sve =3D=3D NULL) { + fprintf(stderr, "risu_reginfo_aarch64: failed to get SVE state= \n"); + return; + } + + ri->sve.vl =3D sve->vl; + + if (sve->head.size < SVE_SIG_CONTEXT_SIZE(vq)) { + if (sve->head.size =3D=3D sizeof(*sve)) { + /* SVE state is empty -- not an error. */ + } else { + fprintf(stderr, "risu_reginfo_aarch64: " + "failed to get complete SVE state\n"); + } + return; + } + + /* Copy ZREG's one at a time */ + for (i =3D 0; i < SVE_NUM_ZREGS; i++) { + memcpy(&ri->sve.zregs[i], + (void *)sve + SVE_SIG_ZREG_OFFSET(vq, i), + SVE_SIG_ZREG_SIZE(vq)); + } + + /* Copy PREG's one at a time */ + for (i =3D 0; i < SVE_NUM_PREGS; i++) { + memcpy(&ri->sve.pregs[i], + (void *)sve + SVE_SIG_PREG_OFFSET(vq, i), + SVE_SIG_PREG_SIZE(vq)); + } + + /* Finally the FFR */ + memcpy(&ri->sve.ffr,(void *)sve + SVE_SIG_FFR_OFFSET(vq), + SVE_SIG_FFR_SIZE(vq)); + + return; + } +#endif + for (i =3D 0; i < 32; i++) { ri->simd.vregs[i] =3D fp->vregs[i]; } diff --git a/risu_reginfo_aarch64.h b/risu_reginfo_aarch64.h index ef97622..b3701b3 100644 --- a/risu_reginfo_aarch64.h +++ b/risu_reginfo_aarch64.h @@ -13,11 +13,24 @@ #ifndef RISU_REGINFO_AARCH64_H #define RISU_REGINFO_AARCH64_H =20 +#include /* for SVE_MAGIC */ + struct simd_reginfo { __uint128_t vregs[32]; char end[0]; }; =20 +#ifdef SVE_MAGIC +struct sve_reginfo { + /* SVE */ + uint16_t vl; /* current VL */ + __uint128_t zregs[SVE_NUM_ZREGS][SVE_VQ_MAX]; + uint16_t pregs[SVE_NUM_PREGS][SVE_VQ_MAX]; + uint16_t ffr[SVE_VQ_MAX]; + char end[0]; +}; +#endif + struct reginfo { uint64_t fault_address; uint64_t regs[31]; @@ -32,6 +45,9 @@ struct reginfo { =20 union { struct simd_reginfo simd; +#ifdef SVE_MAGIC + struct sve_reginfo sve; +#endif }; }; =20 --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529677948676749.4338369920846; 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Fri, 22 Jun 2018 07:22:03 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:12:03 +0100 Message-Id: <20180622141205.16306-21-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::236 Subject: [Qemu-devel] [RISU PATCH v4 20/22] risu_reginfo_aarch64: add SVE support to reginfo_dump_mismatch X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 We also tweak the justification of the rest of the registers so the : lines up nicely across the register dump and diff dump. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v2 - include ffr in comparison - mild re-factor of preg cmp/diff v3 - re-factoring v4 - alignment/justification tweaks - merge chunks from the variable VQ patch --- risu_reginfo_aarch64.c | 140 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 124 insertions(+), 16 deletions(-) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 79db5dd..bf98ba1 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -17,6 +17,7 @@ #include #include #include +#include =20 #include "risu.h" #include "risu_reginfo_aarch64.h" @@ -146,12 +147,12 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc) } =20 /* Finally the FFR */ - memcpy(&ri->sve.ffr,(void *)sve + SVE_SIG_FFR_OFFSET(vq), + memcpy(&ri->sve.ffr, (void *)sve + SVE_SIG_FFR_OFFSET(vq), SVE_SIG_FFR_SIZE(vq)); =20 return; } -#endif +#endif /* SVE_MAGIC */ =20 for (i =3D 0; i < 32; i++) { ri->simd.vregs[i] =3D fp->vregs[i]; @@ -164,6 +165,52 @@ int reginfo_is_eq(struct reginfo *r1, struct reginfo *= r2) return memcmp(r1, r2, reginfo_size()) =3D=3D 0; } =20 +#ifdef SVE_MAGIC +static int sve_zreg_is_eq(int vq, const void *z1, const void *z2) +{ + return memcmp(z1, z2, vq * 16) =3D=3D 0; +} + +static int sve_preg_is_eq(int vq, const void *p1, const void *p2) +{ + return memcmp(p1, p2, vq * 2) =3D=3D 0; +} + +static void sve_dump_preg(FILE *f, int vq, const uint16_t *p) +{ + int q; + for (q =3D vq - 1; q >=3D 0; q--) { + fprintf(f, "%04x", p[q]); + } +} + +static void sve_dump_preg_diff(FILE *f, int vq, const uint16_t *p1, + const uint16_t *p2) +{ + sve_dump_preg(f, vq, p1); + fprintf(f, " vs "); + sve_dump_preg(f, vq, p2); + fprintf(f, "\n"); +} + +static void sve_dump_zreg_diff(FILE *f, int vq, const __uint128_t *z1, + const __uint128_t *z2) +{ + const char *pad =3D ""; + int q; + + for (q =3D 0; q < vq; ++q) { + if (z1[q] !=3D z2[q]) { + fprintf(f, "%sq%-2d: %016" PRIx64 "%016" PRIx64 + " vs %016" PRIx64 "%016" PRIx64"\n", pad, q, + (uint64_t)(z1[q] >> 64), (uint64_t)z1[q], + (uint64_t)(z2[q] >> 64), (uint64_t)z2[q]); + pad =3D " "; + } + } +} +#endif + /* reginfo_dump: print state to a stream, returns nonzero on success */ int reginfo_dump(struct reginfo *ri, FILE * f) { @@ -171,17 +218,47 @@ int reginfo_dump(struct reginfo *ri, FILE * f) fprintf(f, " faulting insn %08x\n", ri->faulting_insn); =20 for (i =3D 0; i < 31; i++) { - fprintf(f, " X%-2d : %016" PRIx64 "\n", i, ri->regs[i]); + fprintf(f, " X%-2d : %016" PRIx64 "\n", i, ri->regs[i]); } =20 - fprintf(f, " sp : %016" PRIx64 "\n", ri->sp); - fprintf(f, " pc : %016" PRIx64 "\n", ri->pc); - fprintf(f, " flags : %08x\n", ri->flags); - fprintf(f, " fpsr : %08x\n", ri->fpsr); - fprintf(f, " fpcr : %08x\n", ri->fpcr); + fprintf(f, " sp : %016" PRIx64 "\n", ri->sp); + fprintf(f, " pc : %016" PRIx64 "\n", ri->pc); + fprintf(f, " flags : %08x\n", ri->flags); + fprintf(f, " fpsr : %08x\n", ri->fpsr); + fprintf(f, " fpcr : %08x\n", ri->fpcr); + +#ifdef SVE_MAGIC + if (test_sve) { + int q, vq =3D test_sve; + + fprintf(f, " vl : %d\n", ri->sve.vl); + + for (i =3D 0; i < 32; i++) { + fprintf(f, " Z%-2d q%-2d: %016" PRIx64 "%016" PRIx64 "\n", i,= 0, + (uint64_t)(ri->sve.zregs[i][0] >> 64), + (uint64_t)ri->sve.zregs[i][0]); + for (q =3D 1; q < vq; ++q) { + fprintf(f, " q%-2d: %016" PRIx64 "%016" PRIx64 "\n", = q, + (uint64_t)(ri->sve.zregs[i][q] >> 64), + (uint64_t)ri->sve.zregs[i][q]); + } + } + + for (i =3D 0; i < 16; i++) { + fprintf(f, " P%-2d : ", i); + sve_dump_preg(f, vq, &ri->sve.pregs[i][0]); + fprintf(f, "\n"); + } + fprintf(f, " FFR : "); + sve_dump_preg(f, vq, &ri->sve.ffr[0]); + fprintf(f, "\n"); + + return !ferror(f); + } +#endif =20 for (i =3D 0; i < 32; i++) { - fprintf(f, " V%-2d : %016" PRIx64 "%016" PRIx64 "\n", i, + fprintf(f, " V%-2d : %016" PRIx64 "%016" PRIx64 "\n", i, (uint64_t) (ri->simd.vregs[i] >> 64), (uint64_t) (ri->simd.vregs[i])); } @@ -200,36 +277,67 @@ int reginfo_dump_mismatch(struct reginfo *m, struct r= eginfo *a, FILE * f) } for (i =3D 0; i < 31; i++) { if (m->regs[i] !=3D a->regs[i]) { - fprintf(f, " X%-2d : %016" PRIx64 " vs %016" PRIx64 "\n", + fprintf(f, " X%-2d : %016" PRIx64 " vs %016" PRIx64 "\n", i, m->regs[i], a->regs[i]); } } =20 if (m->sp !=3D a->sp) { - fprintf(f, " sp : %016" PRIx64 " vs %016" PRIx64 "\n", + fprintf(f, " sp : %016" PRIx64 " vs %016" PRIx64 "\n", m->sp, a->sp); } =20 if (m->pc !=3D a->pc) { - fprintf(f, " pc : %016" PRIx64 " vs %016" PRIx64 "\n", + fprintf(f, " pc : %016" PRIx64 " vs %016" PRIx64 "\n", m->pc, a->pc); } =20 if (m->flags !=3D a->flags) { - fprintf(f, " flags : %08x vs %08x\n", m->flags, a->flags); + fprintf(f, " flags : %08x vs %08x\n", m->flags, a->flags); } =20 if (m->fpsr !=3D a->fpsr) { - fprintf(f, " fpsr : %08x vs %08x\n", m->fpsr, a->fpsr); + fprintf(f, " fpsr : %08x vs %08x\n", m->fpsr, a->fpsr); } =20 if (m->fpcr !=3D a->fpcr) { - fprintf(f, " fpcr : %08x vs %08x\n", m->fpcr, a->fpcr); + fprintf(f, " fpcr : %08x vs %08x\n", m->fpcr, a->fpcr); } =20 +#ifdef SVE_MAGIC + if (test_sve) { + int vq =3D sve_vq_from_vl(m->sve.vl); + + if (m->sve.vl !=3D a->sve.vl) { + fprintf(f, " vl : %d vs %d\n", m->sve.vl, a->sve.vl); + } + + for (i =3D 0; i < SVE_NUM_ZREGS; i++) { + if (!sve_zreg_is_eq(vq, &m->sve.zregs[i], &a->sve.zregs[i])) { + fprintf(f, " Z%-2d ", i); + sve_dump_zreg_diff(f, vq, &m->sve.zregs[i][0], + &a->sve.zregs[i][0]); + } + } + for (i =3D 0; i < SVE_NUM_PREGS; i++) { + if (!sve_preg_is_eq(vq, &m->sve.pregs[i], &a->sve.pregs[i])) { + fprintf(f, " P%-2d : ", i); + sve_dump_preg_diff(f, vq, &m->sve.pregs[i][0], + &a->sve.pregs[i][0]); + } + } + if (!sve_preg_is_eq(vq, &m->sve.ffr, &a->sve.ffr)) { + fprintf(f, " FFR : "); + sve_dump_preg_diff(f, vq, &m->sve.pregs[i][0], &a->sve.pregs[i= ][0]); + } + + return !ferror(f); + } +#endif + for (i =3D 0; i < 32; i++) { if (m->simd.vregs[i] !=3D a->simd.vregs[i]) { - fprintf(f, " V%-2d : " + fprintf(f, " V%-2d : " "%016" PRIx64 "%016" PRIx64 " vs " "%016" PRIx64 "%016" PRIx64 "\n", i, (uint64_t) (m->simd.vregs[i] >> 64), --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; 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X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [RISU PATCH v4 21/22] risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Richard Henderson The kernel headers optimistically assume it's going to grow but as we are never going to use that many on current hardware we limit SVE_VQ_MAX to what we will. Signed-off-by: Richard Henderson Signed-off-by: Alex Benn=C3=A9e --- risu_reginfo_aarch64.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/risu_reginfo_aarch64.h b/risu_reginfo_aarch64.h index b3701b3..c33b86f 100644 --- a/risu_reginfo_aarch64.h +++ b/risu_reginfo_aarch64.h @@ -31,6 +31,11 @@ struct sve_reginfo { }; #endif =20 +/* The kernel headers set this based on future arch extensions. + The current arch maximum is 16. Save space below. */ +#undef SVE_VQ_MAX +#define SVE_VQ_MAX 16 + struct reginfo { uint64_t fault_address; uint64_t regs[31]; --=20 2.17.1 From nobody Tue Nov 4 05:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15296773811055.401226487947156; Fri, 22 Jun 2018 07:23:01 -0700 (PDT) Received: from localhost ([::1]:34341 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMxo-0006CH-Cs for importer@patchew.org; Fri, 22 Jun 2018 10:23:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38725) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnX-0006HJ-Au for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnV-0006FK-0n for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:23 -0400 Received: from mail-wr0-x22a.google.com ([2a00:1450:400c:c0c::22a]:39492) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnU-0006Dy-Q4 for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:20 -0400 Received: by mail-wr0-x22a.google.com with SMTP id b8-v6so1425972wro.6 for ; Fri, 22 Jun 2018 07:12:20 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id o15-v6sm1191295wrm.38.2018.06.22.07.12.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:17 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 643453E0D45; Fri, 22 Jun 2018 15:12:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Sz7o6YO/4o6EHCNz75Wz5Zg04LtsPIQBylQwFuuURLo=; b=NWzxIj86W1MC17JYYtJdl++9aCnJ5jymp2bLVrKAlZcvnGmU6RZj/WsoYdntPTPbDN JwcjL5ytSi/Gti8OyTugI8Nny33ssOLwncB/mM2NyXYiILDqnJFqeW2SJbBEoMGu5vTY Syfo58rTpabvAb6YyBmpwv3fZtgj5bmTVcKwk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Sz7o6YO/4o6EHCNz75Wz5Zg04LtsPIQBylQwFuuURLo=; b=WMoUzxK7TnDA7vNLO1n/U1tlPbWAS+BBeuUh8EEtlHOLnwTzm6MbABJpssS+J09Llu VROejIP2Hehrl7eaudLnMsN3H2OLrgcGh6Kt+uqizdQ6S2dElqAsjWeBYqeujo5coTuN iXPCjCHlUqNxySmsdWinvQra8KyqT5UZVvJYbHzEpkSdttuGT2pMcNepS1QwjIg0VPlp 00ypABNArHWKjUOFY9/WH2Jihl3JiLWW8BZuELxUGJouk5a1mQuuq/Jge267OJgKRnBq eQNGzT9GZiI9r1+vN2w9+z7I6zKsxyWas7pzggF2aHjWu5OBrwiLSa3TwpHDPOBm0q8q qC+w== X-Gm-Message-State: APt69E2Z0sc8Q/wFmAdbeQsr7HT+TR+hsJhFtYodT27d802r/Vb6zV5Y 4Gb4yOfl5GW+MIvaerEW7FXboQagQ7E= X-Google-Smtp-Source: AAOMgpfsHGmcG/5J8WtoqPrs3r+K0e7EZcNXFN6+ay7bvdZTzLWNi97TodhG/O4tnU7xN30rPxWmQQ== X-Received: by 2002:adf:fd88:: with SMTP id d8-v6mr1697987wrr.276.1529676739776; Fri, 22 Jun 2018 07:12:19 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:12:05 +0100 Message-Id: <20180622141205.16306-23-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::22a Subject: [Qemu-devel] [RISU PATCH v4 22/22] risu_reginfo_aarch64: handle variable VQ X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 This involves parsing the command line parameter and calling the kernel to set the VQ limit. We also add dumping of the register state in the main register dump. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- risu_reginfo_aarch64.c | 38 +++++++++++++++++++++++++++++++++++--- 1 file changed, 35 insertions(+), 3 deletions(-) diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index bf98ba1..00d1c8b 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include =20 #include "risu.h" #include "risu_reginfo_aarch64.h" @@ -30,17 +32,41 @@ const char * const arch_extra_help; /* Should we test SVE register state */ static int test_sve; static const struct option extra_opts[] =3D { - {"test-sve", no_argument, &test_sve, 1}, + {"test-sve", required_argument, NULL, FIRST_ARCH_OPT }, {0, 0, 0, 0} }; =20 const struct option * const arch_long_opts =3D &extra_opts[0]; -const char * const arch_extra_help =3D " --test-sve Compare SVE re= gisters\n"; +const char * const arch_extra_help + =3D " --test-sve=3D Compare SVE registers with VQ\n"; #endif =20 void process_arch_opt(int opt, const char *arg) { +#ifdef SVE_MAGIC + long want, got; + + assert(opt =3D=3D FIRST_ARCH_OPT); + test_sve =3D strtol(arg, 0, 10); + + if (test_sve <=3D 0 || test_sve > SVE_VQ_MAX) { + fprintf(stderr, "Invalid value for VQ (1-%d)\n", SVE_VQ_MAX); + exit(1); + } + want =3D sve_vl_from_vq(test_sve); + got =3D prctl(PR_SVE_SET_VL, want); + if (want !=3D got) { + if (got < 0) { + perror("prctl PR_SVE_SET_VL"); + } else { + fprintf(stderr, "Unsupported value for VQ (%d !=3D %d)\n", + test_sve, (int)sve_vq_from_vl(got)); + } + exit(1); + } +#else abort(); +#endif } =20 const int reginfo_size(void) @@ -113,12 +139,18 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc) =20 #ifdef SVE_MAGIC if (test_sve) { - int vq =3D sve_vq_from_vl(sve->vl); /* number of quads for whole v= l */ + int vq =3D test_sve; =20 if (sve =3D=3D NULL) { fprintf(stderr, "risu_reginfo_aarch64: failed to get SVE state= \n"); return; } + if (sve->vl !=3D sve_vl_from_vq(vq)) { + fprintf(stderr, "risu_reginfo_aarch64: " + "unexpected SVE state: %d !=3D %d\n", + sve->vl, sve_vl_from_vq(vq)); + return; + } =20 ri->sve.vl =3D sve->vl; =20 --=20 2.17.1