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From: Peter Maydell <peter.maydell@linaro.org>
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Subject: [Qemu-devel] [PULL 11/28] hw/arm/virt: Add a new 256MB ECAM region
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From: Eric Auger <eric.auger@redhat.com>
This patch defines a new ECAM region located after the 256GB limit.
The virt machine state is augmented with a new highmem_ecam field
which guards the usage of this new ECAM region instead of the legacy
16MB one. With the highmem ECAM region, up to 256 PCIe buses can be
used.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 1529072910-16156-9-git-send-email-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/virt.h | 4 ++++
hw/arm/virt-acpi-build.c | 21 +++++++++++++--------
hw/arm/virt.c | 12 ++++++++----
3 files changed, 25 insertions(+), 12 deletions(-)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 308156f0cdf..085fdcc2879 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -72,6 +72,7 @@ enum {
VIRT_PCIE_MMIO,
VIRT_PCIE_PIO,
VIRT_PCIE_ECAM,
+ VIRT_PCIE_ECAM_HIGH,
VIRT_PLATFORM_BUS,
VIRT_PCIE_MMIO_HIGH,
VIRT_GPIO,
@@ -106,6 +107,7 @@ typedef struct {
FWCfgState *fw_cfg;
bool secure;
bool highmem;
+ bool highmem_ecam;
bool its;
bool virt;
int32_t gic_version;
@@ -123,6 +125,8 @@ typedef struct {
int psci_conduit;
} VirtMachineState;
=20
+#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM)
+
#define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
#define VIRT_MACHINE(obj) \
OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index eefd1d48f79..6ea47e25883 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -150,16 +150,17 @@ static void acpi_dsdt_add_virtio(Aml *scope,
}
=20
static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
- uint32_t irq, bool use_highmem)
+ uint32_t irq, bool use_highmem, bool highmem=
_ecam)
{
+ int ecam_id =3D VIRT_ECAM_ID(highmem_ecam);
Aml *method, *crs, *ifctx, *UUID, *ifctx1, *elsectx, *buf;
int i, bus_no;
hwaddr base_mmio =3D memmap[VIRT_PCIE_MMIO].base;
hwaddr size_mmio =3D memmap[VIRT_PCIE_MMIO].size;
hwaddr base_pio =3D memmap[VIRT_PCIE_PIO].base;
hwaddr size_pio =3D memmap[VIRT_PCIE_PIO].size;
- hwaddr base_ecam =3D memmap[VIRT_PCIE_ECAM].base;
- hwaddr size_ecam =3D memmap[VIRT_PCIE_ECAM].size;
+ hwaddr base_ecam =3D memmap[ecam_id].base;
+ hwaddr size_ecam =3D memmap[ecam_id].size;
int nr_pcie_buses =3D size_ecam / PCIE_MMCFG_SIZE_MIN;
=20
Aml *dev =3D aml_device("%s", "PCI0");
@@ -173,7 +174,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE=
ntry *memmap,
aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
=20
/* Declare the PCI Routing Table. */
- Aml *rt_pkg =3D aml_package(nr_pcie_buses * PCI_NUM_PINS);
+ Aml *rt_pkg =3D aml_varpackage(nr_pcie_buses * PCI_NUM_PINS);
for (bus_no =3D 0; bus_no < nr_pcie_buses; bus_no++) {
for (i =3D 0; i < PCI_NUM_PINS; i++) {
int gsi =3D (i + bus_no) % PCI_NUM_PINS;
@@ -316,7 +317,10 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMap=
Entry *memmap,
Aml *dev_res0 =3D aml_device("%s", "RES0");
aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
crs =3D aml_resource_template();
- aml_append(crs, aml_memory32_fixed(base_ecam, size_ecam, AML_READ_WRIT=
E));
+ aml_append(crs,
+ aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000, base_e=
cam,
+ base_ecam + size_ecam - 1, 0x0000, size_ecam));
aml_append(dev_res0, aml_name_decl("_CRS", crs));
aml_append(dev, dev_res0);
aml_append(scope, dev);
@@ -573,16 +577,17 @@ build_mcfg(GArray *table_data, BIOSLinker *linker, Vi=
rtMachineState *vms)
{
AcpiTableMcfg *mcfg;
const MemMapEntry *memmap =3D vms->memmap;
+ int ecam_id =3D VIRT_ECAM_ID(vms->highmem_ecam);
int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]);
int mcfg_start =3D table_data->len;
=20
mcfg =3D acpi_data_push(table_data, len);
- mcfg->allocation[0].address =3D cpu_to_le64(memmap[VIRT_PCIE_ECAM].bas=
e);
+ mcfg->allocation[0].address =3D cpu_to_le64(memmap[ecam_id].base);
=20
/* Only a single allocation so no need to play with segments */
mcfg->allocation[0].pci_segment =3D cpu_to_le16(0);
mcfg->allocation[0].start_bus_number =3D 0;
- mcfg->allocation[0].end_bus_number =3D (memmap[VIRT_PCIE_ECAM].size
+ mcfg->allocation[0].end_bus_number =3D (memmap[ecam_id].size
/ PCIE_MMCFG_SIZE_MIN) - 1;
=20
build_header(linker, table_data, (void *)(table_data->data + mcfg_star=
t),
@@ -766,7 +771,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, Virt=
MachineState *vms)
acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPO=
RTS);
acpi_dsdt_add_pci(scope, memmap, (irqmap[VIRT_PCIE] + ARM_SPI_BASE),
- vms->highmem);
+ vms->highmem, vms->highmem_ecam);
acpi_dsdt_add_gpio(scope, &memmap[VIRT_GPIO],
(irqmap[VIRT_GPIO] + ARM_SPI_BASE));
acpi_dsdt_add_power_button(scope);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9b9bc5091e3..933e60612dd 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -151,6 +151,7 @@ static const MemMapEntry a15memmap[] =3D {
[VIRT_MEM] =3D { 0x40000000, RAMLIMIT_BYTES },
/* Additional 64 MB redist region (can contain up to 512 redistributor=
s) */
[VIRT_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 },
+ [VIRT_PCIE_ECAM_HIGH] =3D { 0x4010000000ULL, 0x10000000 },
/* Second PCIe window, 512GB wide at the 512GB boundary */
[VIRT_PCIE_MMIO_HIGH] =3D { 0x8000000000ULL, 0x8000000000ULL },
};
@@ -1044,10 +1045,9 @@ static void create_pcie(VirtMachineState *vms, qemu_=
irq *pic)
hwaddr size_mmio_high =3D vms->memmap[VIRT_PCIE_MMIO_HIGH].size;
hwaddr base_pio =3D vms->memmap[VIRT_PCIE_PIO].base;
hwaddr size_pio =3D vms->memmap[VIRT_PCIE_PIO].size;
- hwaddr base_ecam =3D vms->memmap[VIRT_PCIE_ECAM].base;
- hwaddr size_ecam =3D vms->memmap[VIRT_PCIE_ECAM].size;
+ hwaddr base_ecam, size_ecam;
hwaddr base =3D base_mmio;
- int nr_pcie_buses =3D size_ecam / PCIE_MMCFG_SIZE_MIN;
+ int nr_pcie_buses;
int irq =3D vms->irqmap[VIRT_PCIE];
MemoryRegion *mmio_alias;
MemoryRegion *mmio_reg;
@@ -1055,12 +1055,16 @@ static void create_pcie(VirtMachineState *vms, qemu=
_irq *pic)
MemoryRegion *ecam_reg;
DeviceState *dev;
char *nodename;
- int i;
+ int i, ecam_id;
PCIHostState *pci;
=20
dev =3D qdev_create(NULL, TYPE_GPEX_HOST);
qdev_init_nofail(dev);
=20
+ ecam_id =3D VIRT_ECAM_ID(vms->highmem_ecam);
+ base_ecam =3D vms->memmap[ecam_id].base;
+ size_ecam =3D vms->memmap[ecam_id].size;
+ nr_pcie_buses =3D size_ecam / PCIE_MMCFG_SIZE_MIN;
/* Map only the first size_ecam bytes of ECAM space */
ecam_alias =3D g_new0(MemoryRegion, 1);
ecam_reg =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
--=20
2.17.1