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X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 10/28] hw/arm/virt: Register two redistributor regions when necessary X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eric Auger With a VGICv3 KVM device, if the number of vcpus exceeds the capacity of the legacy redistributor region (123 redistributors), we now attempt to register a second redistributor region. Up to 512 redistributors can fit in this latter on top of the 123 allowed by the legacy redistributor region. Registering this second redistributor region is possible if the host kernel supports the following VGICv3 KVM device group/attribute: KVM_DEV_ARM_VGIC_GRP_ADDR/KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION. In case the host kernel does not support the registration of several redistributor regions and the requested number of vcpus exceeds the capacity of the legacy redistributor region, the GICv3 device initialization fails with a proper error message and qemu exits. At the moment the max number of vcpus still is capped by the virt machine class max_cpus. Signed-off-by: Eric Auger Reviewed-by: Andrew Jones Message-id: 1529072910-16156-8-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell --- hw/arm/virt.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e5e7606946f..9b9bc5091e3 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -529,6 +529,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq = *pic) SysBusDevice *gicbusdev; const char *gictype; int type =3D vms->gic_version, i; + uint32_t nb_redist_regions =3D 0; =20 gictype =3D (type =3D=3D 3) ? gicv3_class_name() : gic_class_name(); =20 @@ -548,14 +549,28 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; uint32_t redist0_count =3D MIN(smp_cpus, redist0_capacity); =20 - qdev_prop_set_uint32(gicdev, "len-redist-region-count", 1); + nb_redist_regions =3D virt_gicv3_redist_region_count(vms); + + qdev_prop_set_uint32(gicdev, "len-redist-region-count", + nb_redist_regions); qdev_prop_set_uint32(gicdev, "redist-region-count[0]", redist0_cou= nt); + + if (nb_redist_regions =3D=3D 2) { + uint32_t redist1_capacity =3D + vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_= SIZE; + + qdev_prop_set_uint32(gicdev, "redist-region-count[1]", + MIN(smp_cpus - redist0_count, redist1_capacity)); + } } qdev_init_nofail(gicdev); gicbusdev =3D SYS_BUS_DEVICE(gicdev); sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base); if (type =3D=3D 3) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base); + if (nb_redist_regions =3D=3D 2) { + sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].ba= se); + } } else { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base); } @@ -1351,6 +1366,7 @@ static void machvirt_init(MachineState *machine) */ if (vms->gic_version =3D=3D 3) { virt_max_cpus =3D vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST= _SIZE; + virt_max_cpus +=3D vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDI= ST_SIZE; } else { virt_max_cpus =3D GIC_NCPU; } --=20 2.17.1