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X-Received-From: 2607:f8b0:4003:c06::231 Subject: [Qemu-devel] [PATCH 094/113] intel-iommu: trace domain id during page walk X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, Peter Xu , "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Xu This patch only modifies the trace points. Previously we were tracing page walk levels. They are redundant since we have page mask (size) already. Now we trace something much more useful which is the domain ID of the page walking. That can be very useful when we trace more than one devices on the same system, so that we can know which map is for which domain. CC: QEMU Stable Signed-off-by: Peter Xu Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin (cherry picked from commit d118c06ebbee2d23ddf873cae4a809311aa61310) Signed-off-by: Michael Roth --- hw/i386/intel_iommu.c | 16 ++++++++++------ hw/i386/trace-events | 2 +- 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index c7efeb5666..b692c4aeb8 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -756,6 +756,7 @@ typedef int (*vtd_page_walk_hook)(IOMMUTLBEntry *entry,= void *private); * @notify_unmap: whether we should notify invalid entries * @as: VT-d address space of the device * @aw: maximum address width + * @domain: domain ID of the page walk */ typedef struct { VTDAddressSpace *as; @@ -763,17 +764,18 @@ typedef struct { void *private; bool notify_unmap; uint8_t aw; + uint16_t domain_id; } vtd_page_walk_info; =20 -static int vtd_page_walk_one(IOMMUTLBEntry *entry, int level, - vtd_page_walk_info *info) +static int vtd_page_walk_one(IOMMUTLBEntry *entry, vtd_page_walk_info *inf= o) { vtd_page_walk_hook hook_fn =3D info->hook_fn; void *private =3D info->private; =20 assert(hook_fn); - trace_vtd_page_walk_one(level, entry->iova, entry->translated_addr, - entry->addr_mask, entry->perm); + trace_vtd_page_walk_one(info->domain_id, entry->iova, + entry->translated_addr, entry->addr_mask, + entry->perm); return hook_fn(entry, private); } =20 @@ -844,7 +846,7 @@ static int vtd_page_walk_level(dma_addr_t addr, uint64_= t start, trace_vtd_page_walk_skip_perm(iova, iova_next); goto next; } - ret =3D vtd_page_walk_one(&entry, level, info); + ret =3D vtd_page_walk_one(&entry, info); if (ret < 0) { return ret; } @@ -856,7 +858,7 @@ static int vtd_page_walk_level(dma_addr_t addr, uint64_= t start, * Translated address is meaningless, zero it. */ entry.translated_addr =3D 0x0; - ret =3D vtd_page_walk_one(&entry, level, info); + ret =3D vtd_page_walk_one(&entry, info); if (ret < 0) { return ret; } @@ -1466,6 +1468,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOM= MUState *s, .notify_unmap =3D true, .aw =3D s->aw_bits, .as =3D vtd_as, + .domain_id =3D domain_id, }; =20 /* @@ -2940,6 +2943,7 @@ static void vtd_iommu_replay(IOMMUMemoryRegion *iommu= _mr, IOMMUNotifier *n) .notify_unmap =3D false, .aw =3D s->aw_bits, .as =3D vtd_as, + .domain_id =3D VTD_CONTEXT_ENTRY_DID(ce.hi), }; =20 vtd_page_walk(&ce, 0, ~0ULL, &info); diff --git a/hw/i386/trace-events b/hw/i386/trace-events index d43b4b6cd3..2128c89c25 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -39,7 +39,7 @@ vtd_fault_disabled(void) "Fault processing disabled for c= ontext entry" vtd_replay_ce_valid(uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain,= uint64_t hi, uint64_t lo) "replay valid context device %02"PRIx8":%02"PRIx= 8".%02"PRIx8" domain 0x%"PRIx16" hi 0x%"PRIx64" lo 0x%"PRIx64 vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) "replay invali= d context device %02"PRIx8":%02"PRIx8".%02"PRIx8 vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_= t end) "walk (base=3D0x%"PRIx64", level=3D%"PRIu32") iova range 0x%"PRIx64"= - 0x%"PRIx64 -vtd_page_walk_one(uint32_t level, uint64_t iova, uint64_t gpa, uint64_t ma= sk, int perm) "detected page level 0x%"PRIx32" iova 0x%"PRIx64" -> gpa 0x%"= PRIx64" mask 0x%"PRIx64" perm %d" +vtd_page_walk_one(uint16_t domain, uint64_t iova, uint64_t gpa, uint64_t m= ask, int perm) "domain 0x%"PRIu16" iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mask= 0x%"PRIx64" perm %d" vtd_page_walk_skip_read(uint64_t iova, uint64_t next) "Page walk skip iova= 0x%"PRIx64" - 0x%"PRIx64" due to unable to read" vtd_page_walk_skip_perm(uint64_t iova, uint64_t next) "Page walk skip iova= 0x%"PRIx64" - 0x%"PRIx64" due to perm empty" vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) "Page walk skip i= ova 0x%"PRIx64" - 0x%"PRIx64" due to rsrv set" --=20 2.11.0