From nobody Tue Feb 10 22:17:47 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529295057516346.88692842589853; Sun, 17 Jun 2018 21:10:57 -0700 (PDT) Received: from localhost ([::1]:60972 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fUlVI-0003We-NJ for importer@patchew.org; Mon, 18 Jun 2018 00:10:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49994) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fUlEf-0005Sy-RA for qemu-devel@nongnu.org; Sun, 17 Jun 2018 23:53:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fUlEd-00047n-OY for qemu-devel@nongnu.org; Sun, 17 Jun 2018 23:53:45 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:43895) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fUlEc-00043X-VE; Sun, 17 Jun 2018 23:53:43 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 418HJC5mlQz9s9m; Mon, 18 Jun 2018 13:53:30 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1529294011; bh=TljexgUwroK+QNfKSOvVt1NJ0xNPQEcWk/wYUJzU6jU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Zo7PhkMuzEZUqIFj17wpUXuZsxVA0X3pb+ULxfLN/NZ11tljVlRzTbzAIs7xvas0E 3rlJKYkc8cGlwe3gy/pNRfGwroZ7/F9Gz88uEXdX/olIPjNLQkC9LwAmdlX7tN6sd+ t3NqTMJRyr9rS31N+SchH+ZzI0doEjtH1gfZejDA= From: David Gibson To: peter.maydell@linaro.org Date: Mon, 18 Jun 2018 13:53:16 +1000 Message-Id: <20180618035324.19907-21-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180618035324.19907-1-david@gibson.dropbear.id.au> References: <20180618035324.19907-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 20/28] pnv: Clean up cpu realize path X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" pnv_cpu_init() is only called from the the pnv cpu core realize path, and really only can be called from there. So fold it into its caller, which we also rename for brevity. Signed-off-by: David Gibson Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- hw/ppc/pnv_core.c | 56 ++++++++++++++++++----------------------------- 1 file changed, 21 insertions(+), 35 deletions(-) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 1e40f01e98..f4c41d89d6 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -54,28 +54,6 @@ static void pnv_cpu_reset(void *opaque) env->msr |=3D MSR_HVB; /* Hypervisor mode */ } =20 -static void pnv_cpu_init(PowerPCCPU *cpu, Error **errp) -{ - CPUPPCState *env =3D &cpu->env; - int core_pir; - int thread_index =3D 0; /* TODO: TCG supports only one thread */ - ppc_spr_t *pir =3D &env->spr_cb[SPR_PIR]; - - core_pir =3D object_property_get_uint(OBJECT(cpu), "core-pir", &error_= abort); - - /* - * The PIR of a thread is the core PIR + the thread index. We will - * need to find a way to get the thread index when TCG supports - * more than 1. We could use the object name ? - */ - pir->default_value =3D core_pir + thread_index; - - /* Set time-base frequency to 512 MHz */ - cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ); - - qemu_register_reset(pnv_cpu_reset, cpu); -} - /* * These values are read by the PowerNV HW monitors under Linux */ @@ -121,29 +99,39 @@ static const MemoryRegionOps pnv_core_xscom_ops =3D { .endianness =3D DEVICE_BIG_ENDIAN, }; =20 -static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **= errp) +static void pnv_realize_vcpu(PowerPCCPU *cpu, XICSFabric *xi, Error **errp) { + CPUPPCState *env =3D &cpu->env; + int core_pir; + int thread_index =3D 0; /* TODO: TCG supports only one thread */ + ppc_spr_t *pir =3D &env->spr_cb[SPR_PIR]; Error *local_err =3D NULL; - CPUState *cs =3D CPU(child); - PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 - object_property_set_bool(child, true, "realized", &local_err); + object_property_set_bool(OBJECT(cpu), true, "realized", &local_err); if (local_err) { error_propagate(errp, local_err); return; } =20 - cpu->intc =3D icp_create(child, TYPE_PNV_ICP, xi, &local_err); + cpu->intc =3D icp_create(OBJECT(cpu), TYPE_PNV_ICP, xi, &local_err); if (local_err) { error_propagate(errp, local_err); return; } =20 - pnv_cpu_init(cpu, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + core_pir =3D object_property_get_uint(OBJECT(cpu), "core-pir", &error_= abort); + + /* + * The PIR of a thread is the core PIR + the thread index. We will + * need to find a way to get the thread index when TCG supports + * more than 1. We could use the object name ? + */ + pir->default_value =3D core_pir + thread_index; + + /* Set time-base frequency to 512 MHz */ + cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ); + + qemu_register_reset(pnv_cpu_reset, cpu); } =20 static void pnv_core_realize(DeviceState *dev, Error **errp) @@ -178,9 +166,7 @@ static void pnv_core_realize(DeviceState *dev, Error **= errp) } =20 for (j =3D 0; j < cc->nr_threads; j++) { - obj =3D OBJECT(pc->threads[j]); - - pnv_core_realize_child(obj, XICS_FABRIC(xi), &local_err); + pnv_realize_vcpu(pc->threads[j], XICS_FABRIC(xi), &local_err); if (local_err) { goto err; } --=20 2.17.1