From nobody Tue Feb 10 22:18:30 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529294815650490.76585114306613; Sun, 17 Jun 2018 21:06:55 -0700 (PDT) Received: from localhost ([::1]:60950 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fUlRD-0007Y3-Vz for importer@patchew.org; Mon, 18 Jun 2018 00:06:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49859) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fUlEc-0005P2-30 for qemu-devel@nongnu.org; Sun, 17 Jun 2018 23:53:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fUlEa-00042l-0j for qemu-devel@nongnu.org; Sun, 17 Jun 2018 23:53:42 -0400 Received: from ozlabs.org ([203.11.71.1]:58475) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fUlEZ-0003zP-Hq; Sun, 17 Jun 2018 23:53:39 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 418HJB4QfLz9s9G; Mon, 18 Jun 2018 13:53:29 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1529294010; bh=gyPlNhmbt3HvyBkWmVoldjOU8R/k2BQ6rQV1HoGbO4U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KQfL68RsgwMiRbEeXwQNlCcoFWHP8bgO7QJZhHOQT6bSGHWnzf0hxQF4ZzhRb3nxz gicnnKHzSTvd51CIpcrmNJmEI2vYdVLClR7oXHtTG8r+T/GdXhtijPNiFF2W/LvBTa 2a+9Nx4SR4QN3E8rNB+F/kCBamnJzetviYI5sNUI= From: David Gibson To: peter.maydell@linaro.org Date: Mon, 18 Jun 2018 13:53:11 +1000 Message-Id: <20180618035324.19907-16-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180618035324.19907-1-david@gibson.dropbear.id.au> References: <20180618035324.19907-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 15/28] mos6522: expose mos6522_update_irq() through MOS6522DeviceClass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aik@ozlabs.ru, Mark Cave-Ayland , agraf@suse.de, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Mark Cave-Ayland In the case where we have an interrupt generated externally from inputs to bits 1 and 2 of port A and/or port B, it is necessary to expose mos6522_update_irq() so it can be called by the interrupt source. Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/misc/mos6522.c | 1 + include/hw/misc/mos6522.h | 1 + 2 files changed, 2 insertions(+) diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index 8d5b419825..14cff26c61 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -463,6 +463,7 @@ static void mos6522_class_init(ObjectClass *oc, void *d= ata) mdc->set_sr_int =3D mos6522_set_sr_int; mdc->portB_write =3D mos6522_portB_write; mdc->portA_write =3D mos6522_portA_write; + mdc->update_irq =3D mos6522_update_irq; mdc->get_timer1_counter_value =3D mos6522_get_counter_value; mdc->get_timer2_counter_value =3D mos6522_get_counter_value; mdc->get_timer1_load_time =3D mos6522_get_load_time; diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index f52b41920b..03d9f0c059 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -134,6 +134,7 @@ typedef struct MOS6522DeviceClass { void (*set_sr_int)(MOS6522State *dev); void (*portB_write)(MOS6522State *dev); void (*portA_write)(MOS6522State *dev); + void (*update_irq)(MOS6522State *dev); /* These are used to influence the CUDA MacOS timebase calibration */ uint64_t (*get_timer1_counter_value)(MOS6522State *dev, MOS6522Timer *= ti); uint64_t (*get_timer2_counter_value)(MOS6522State *dev, MOS6522Timer *= ti); --=20 2.17.1