From nobody Fri Dec 19 04:27:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529076139353263.6237260163225; Fri, 15 Jun 2018 08:22:19 -0700 (PDT) Received: from localhost ([::1]:47485 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTqYL-0000Ir-EM for importer@patchew.org; Fri, 15 Jun 2018 11:22:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32909) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTpfk-0001x8-VJ for qemu-devel@nongnu.org; Fri, 15 Jun 2018 10:25:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fTpfk-0006Re-0c for qemu-devel@nongnu.org; Fri, 15 Jun 2018 10:25:52 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:42788) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fTpfj-0006Qc-PZ for qemu-devel@nongnu.org; Fri, 15 Jun 2018 10:25:51 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fTpfi-0003rC-GH for qemu-devel@nongnu.org; Fri, 15 Jun 2018 15:25:50 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 15 Jun 2018 15:25:16 +0100 Message-Id: <20180615142521.19143-39-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180615142521.19143-1-peter.maydell@linaro.org> References: <20180615142521.19143-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 38/43] m25p80: add support for two bytes WRSR for Macronix chips X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: C=C3=A9dric Le Goater On Macronix chips, two bytes can written to the WRSR. First byte will configure the status register and the second the configuration register. It is important to save the configuration value as it contains the dummy cycle setting when using dual or quad IO mode. Signed-off-by: C=C3=A9dric Le Goater Acked-by: Alistair Francis Signed-off-by: Peter Maydell --- hw/block/m25p80.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index a5ccffb4aae..b0ed8fa4188 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -698,6 +698,7 @@ static void complete_collecting_data(Flash *s) case MAN_MACRONIX: s->quad_enable =3D extract32(s->data[0], 6, 1); if (s->len > 1) { + s->volatile_cfg =3D s->data[1]; s->four_bytes_address_mode =3D extract32(s->data[1], 5, 1); } break; --=20 2.17.1