From nobody Mon Nov 3 06:06:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528737138409711.9954314829365; Mon, 11 Jun 2018 10:12:18 -0700 (PDT) Received: from localhost ([::1]:50305 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fSQMb-0000Lu-JX for importer@patchew.org; Mon, 11 Jun 2018 13:12:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51462) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fSQKf-0007Us-5m for qemu-devel@nongnu.org; Mon, 11 Jun 2018 13:10:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fSQKd-0000XC-UF for qemu-devel@nongnu.org; Mon, 11 Jun 2018 13:10:17 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:42696) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fSQKd-0000Wa-MC for qemu-devel@nongnu.org; Mon, 11 Jun 2018 13:10:15 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fSQKc-0007F8-PJ; Mon, 11 Jun 2018 18:10:14 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 11 Jun 2018 18:10:07 +0100 Message-Id: <20180611171007.4165-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180611171007.4165-1-peter.maydell@linaro.org> References: <20180611171007.4165-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 3/3] exec.c: Use stn_p() and ldn_p() instead of explicit switches X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Now we have stn_p() and ldn_p() we can use them in various functions in exec.c that used to have their own switch-on-size code. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- exec.c | 112 +++++---------------------------------------------------- 1 file changed, 8 insertions(+), 104 deletions(-) diff --git a/exec.c b/exec.c index 90b47cde7b1..1fa2cdb874f 100644 --- a/exec.c +++ b/exec.c @@ -2544,22 +2544,7 @@ static void notdirty_mem_write(void *opaque, hwaddr = ram_addr, memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_v= addr, ram_addr, size); =20 - switch (size) { - case 1: - stb_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - case 2: - stw_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - case 4: - stl_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - case 8: - stq_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - default: - abort(); - } + stn_p(qemu_map_ram_ptr(NULL, ram_addr), size, val); memory_notdirty_write_complete(&ndi); } =20 @@ -2739,22 +2724,8 @@ static MemTxResult subpage_read(void *opaque, hwaddr= addr, uint64_t *data, if (res) { return res; } - switch (len) { - case 1: - *data =3D ldub_p(buf); - return MEMTX_OK; - case 2: - *data =3D lduw_p(buf); - return MEMTX_OK; - case 4: - *data =3D (uint32_t)ldl_p(buf); - return MEMTX_OK; - case 8: - *data =3D ldq_p(buf); - return MEMTX_OK; - default: - abort(); - } + *data =3D ldn_p(buf, len); + return MEMTX_OK; } =20 static MemTxResult subpage_write(void *opaque, hwaddr addr, @@ -2768,22 +2739,7 @@ static MemTxResult subpage_write(void *opaque, hwadd= r addr, " value %"PRIx64"\n", __func__, subpage, len, addr, value); #endif - switch (len) { - case 1: - stb_p(buf, value); - break; - case 2: - stw_p(buf, value); - break; - case 4: - stl_p(buf, value); - break; - case 8: - stq_p(buf, value); - break; - default: - abort(); - } + stn_p(buf, len, value); return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, l= en); } =20 @@ -3129,34 +3085,8 @@ static MemTxResult flatview_write_continue(FlatView = *fv, hwaddr addr, l =3D memory_access_size(mr, l, addr1); /* XXX: could force current_cpu to NULL to avoid potential bugs */ - switch (l) { - case 8: - /* 64 bit write access */ - val =3D ldq_p(buf); - result |=3D memory_region_dispatch_write(mr, addr1, val, 8, - attrs); - break; - case 4: - /* 32 bit write access */ - val =3D (uint32_t)ldl_p(buf); - result |=3D memory_region_dispatch_write(mr, addr1, val, 4, - attrs); - break; - case 2: - /* 16 bit write access */ - val =3D lduw_p(buf); - result |=3D memory_region_dispatch_write(mr, addr1, val, 2, - attrs); - break; - case 1: - /* 8 bit write access */ - val =3D ldub_p(buf); - result |=3D memory_region_dispatch_write(mr, addr1, val, 1, - attrs); - break; - default: - abort(); - } + val =3D ldn_p(buf, l); + result |=3D memory_region_dispatch_write(mr, addr1, val, l, at= trs); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3217,34 +3147,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwa= ddr addr, /* I/O case */ release_lock |=3D prepare_mmio_access(mr); l =3D memory_access_size(mr, l, addr1); - switch (l) { - case 8: - /* 64 bit read access */ - result |=3D memory_region_dispatch_read(mr, addr1, &val, 8, - attrs); - stq_p(buf, val); - break; - case 4: - /* 32 bit read access */ - result |=3D memory_region_dispatch_read(mr, addr1, &val, 4, - attrs); - stl_p(buf, val); - break; - case 2: - /* 16 bit read access */ - result |=3D memory_region_dispatch_read(mr, addr1, &val, 2, - attrs); - stw_p(buf, val); - break; - case 1: - /* 8 bit read access */ - result |=3D memory_region_dispatch_read(mr, addr1, &val, 1, - attrs); - stb_p(buf, val); - break; - default: - abort(); - } + result |=3D memory_region_dispatch_read(mr, addr1, &val, l, at= trs); + stn_p(buf, l, val); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); --=20 2.17.1