From nobody Thu Dec 18 22:22:24 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528463597992361.8376985707562; Fri, 8 Jun 2018 06:13:17 -0700 (PDT) Received: from localhost ([::1]:35577 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fRHCf-0000Dm-9b for importer@patchew.org; Fri, 08 Jun 2018 09:13:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fRGlk-0002zp-4d for qemu-devel@nongnu.org; Fri, 08 Jun 2018 08:45:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fRGlj-0004DB-CE for qemu-devel@nongnu.org; Fri, 08 Jun 2018 08:45:28 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:42588) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fRGlj-00046X-4A for qemu-devel@nongnu.org; Fri, 08 Jun 2018 08:45:27 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fRGlh-0003es-QA for qemu-devel@nongnu.org; Fri, 08 Jun 2018 13:45:25 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 8 Jun 2018 13:44:56 +0100 Message-Id: <20180608124517.29475-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180608124517.29475-1-peter.maydell@linaro.org> References: <20180608124517.29475-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 10/31] ftgmac100: add IEEE 802.1Q VLAN support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: C=C3=A9dric Le Goater The ftgmac100 NIC supports VLAN tag insertion and the MAC engine also has a control to remove VLAN tags from received packets. The VLAN control bits and VLAN tag information are contained in the second word of the transmit and receive descriptors. The Insert VLAN bit and the VLAN Tag available bit are only valid in the first segment of the packet. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20180530061711.23673-3-clg@kaod.org Signed-off-by: Peter Maydell --- hw/net/ftgmac100.c | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c index 425ac36cff8..abf80655f28 100644 --- a/hw/net/ftgmac100.c +++ b/hw/net/ftgmac100.c @@ -443,6 +443,22 @@ static void ftgmac100_do_tx(FTGMAC100State *s, uint32_= t tx_ring, break; } =20 + /* Check for VLAN */ + if (bd.des0 & FTGMAC100_TXDES0_FTS && + bd.des1 & FTGMAC100_TXDES1_INS_VLANTAG && + be16_to_cpu(PKT_GET_ETH_HDR(ptr)->h_proto) !=3D ETH_P_VLAN) { + if (frame_size + len + 4 > sizeof(s->frame)) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: frame too big : %d byt= es\n", + __func__, len); + s->isr |=3D FTGMAC100_INT_XPKT_LOST; + len =3D sizeof(s->frame) - frame_size - 4; + } + memmove(ptr + 16, ptr + 12, len - 12); + stw_be_p(ptr + 12, ETH_P_VLAN); + stw_be_p(ptr + 14, bd.des1); + len +=3D 4; + } + ptr +=3D len; frame_size +=3D len; if (bd.des0 & FTGMAC100_TXDES0_LTS) { @@ -864,7 +880,20 @@ static ssize_t ftgmac100_receive(NetClientState *nc, c= onst uint8_t *buf, buf_len +=3D size - 4; } buf_addr =3D bd.des3; - dma_memory_write(&address_space_memory, buf_addr, buf, buf_len); + if (first && proto =3D=3D ETH_P_VLAN && buf_len >=3D 18) { + bd.des1 =3D lduw_be_p(buf + 14) | FTGMAC100_RXDES1_VLANTAG_AVA= IL; + + if (s->maccr & FTGMAC100_MACCR_RM_VLAN) { + dma_memory_write(&address_space_memory, buf_addr, buf, 12); + dma_memory_write(&address_space_memory, buf_addr + 12, buf= + 16, + buf_len - 16); + } else { + dma_memory_write(&address_space_memory, buf_addr, buf, buf= _len); + } + } else { + bd.des1 =3D 0; + dma_memory_write(&address_space_memory, buf_addr, buf, buf_len= ); + } buf +=3D buf_len; if (size < 4) { dma_memory_write(&address_space_memory, buf_addr + buf_len, --=20 2.17.1