From nobody Tue Feb 10 20:28:50 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528386934622167.39977260099988; Thu, 7 Jun 2018 08:55:34 -0700 (PDT) Received: from localhost ([::1]:58775 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQxG9-0005uI-Sx for importer@patchew.org; Thu, 07 Jun 2018 11:55:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38529) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQxBE-0001SZ-NL for qemu-devel@nongnu.org; Thu, 07 Jun 2018 11:50:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fQxBA-0003Ai-1B for qemu-devel@nongnu.org; Thu, 07 Jun 2018 11:50:28 -0400 Received: from 9.mo179.mail-out.ovh.net ([46.105.76.148]:47310) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fQxB9-00039v-Gs for qemu-devel@nongnu.org; Thu, 07 Jun 2018 11:50:23 -0400 Received: from player169.ha.ovh.net (unknown [10.109.120.18]) by mo179.mail-out.ovh.net (Postfix) with ESMTP id 8D51BCEA88 for ; Thu, 7 Jun 2018 17:50:21 +0200 (CEST) Received: from zorba.kaod.org.com (deibp9eh1--blueice1n0.emea.ibm.com [195.212.29.162]) (Authenticated sender: clg@kaod.org) by player169.ha.ovh.net (Postfix) with ESMTPSA id EC57E58009D; Thu, 7 Jun 2018 17:50:15 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-ppc@nongnu.org Date: Thu, 7 Jun 2018 17:49:36 +0200 Message-Id: <20180607155003.1580-2-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180607155003.1580-1-clg@kaod.org> References: <20180607155003.1580-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 6070007875059878739 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedthedrjeejgdelgecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.76.148 Subject: [Qemu-devel] [PATCH v4 01/28] sparp_pci: simplify how the PCI LSIs are allocated X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Greg Kurz , qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" PCI LSIs are today allocated one by one using the IRQ alloc_block routine. Change the code sequence to first allocate a PCI_NUM_PINS block. It will help us providing a generic IRQ framework to the machine. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz Signed-off-by: C=C3=A9dric Le Goater --- hw/ppc/spapr_pci.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 39a14980d397..4fd97ffe4c6e 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1546,6 +1546,8 @@ static void spapr_phb_realize(DeviceState *dev, Error= **errp) sPAPRTCETable *tcet; const unsigned windows_supported =3D sphb->ddw_enabled ? SPAPR_PCI_DMA_MAX_WINDOWS : 1; + uint32_t irq; + Error *local_err =3D NULL; =20 if (!spapr) { error_setg(errp, TYPE_SPAPR_PCI_HOST_BRIDGE " needs a pseries mach= ine"); @@ -1694,18 +1696,15 @@ static void spapr_phb_realize(DeviceState *dev, Err= or **errp) QLIST_INSERT_HEAD(&spapr->phbs, sphb, list); =20 /* Initialize the LSI table */ - for (i =3D 0; i < PCI_NUM_PINS; i++) { - uint32_t irq; - Error *local_err =3D NULL; - - irq =3D spapr_irq_alloc_block(spapr, 1, true, false, &local_err); - if (local_err) { - error_propagate(errp, local_err); - error_prepend(errp, "can't allocate LSIs: "); - return; - } + irq =3D spapr_irq_alloc_block(spapr, PCI_NUM_PINS, true, false, &local= _err); + if (local_err) { + error_propagate(errp, local_err); + error_prepend(errp, "can't allocate LSIs: "); + return; + } =20 - sphb->lsi_table[i].irq =3D irq; + for (i =3D 0; i < PCI_NUM_PINS; i++) { + sphb->lsi_table[i].irq =3D irq + i; } =20 /* allocate connectors for child PCI devices */ --=20 2.13.6