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[97.126.112.211]) by smtp.gmail.com with ESMTPSA id c4-v6sm4431782pgv.86.2018.06.01.00.31.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Jun 2018 00:31:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wxqnj7D2GYVj34jO4GIckTq9Mg+xYbuJxEbNpwXMqhU=; b=XX4MCZpp8GokcVV8z64X9iaD/qELL3lfH6EejcDWREnlCJESOp0NO/kE6hPM1j9Xe5 6AX3uvaKjpWrdTlelIbiAnVP0EJm9jS822C4RCTifRhYV8bbCCSc6InQ91JBBu3nqFh+ DigxfcZXoJqF2owUSK5/Ey2KoPpcVoJDUo6AY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wxqnj7D2GYVj34jO4GIckTq9Mg+xYbuJxEbNpwXMqhU=; b=sDRig5IAwRfI+HsT6tTEbrTY28ZJAGSgg/xW2k0/WgWINwysZT1YdP3dWIcbD4062X 2O56w4vGjG2SIpqGvn7SwU5O/zf9fGLKMRrsohAo/gU2Yi2LpXm1kdPlkcpTSCLHldE/ xy18KEe381JMM0+Brt/xLuZqkEcI8An4LVZ74pS6zh+U9Xyu+cppa9wjWiWOJXnqwVLb 0bMDVXi/H964uTq9xR8vapgBWnZDDcBmi39SbCMlAQpJXu2SGXj+r4NDJF7uMmli/qIm 544bK+Yb6HOs7ggzZ7cOoYO6Gyh5gBVpbkeRBtnjUDKGThOr3anAHZA58tgqND8ngo8Z Ok9g== X-Gm-Message-State: ALKqPwdPVbPwmcnXC6HWvCj2cNptvNHbIe7nU7vNfr0C0r5RW72CwRk+ GM5ox7KrgM3gUYWJxNf0ZPnfgTeHnX0= X-Google-Smtp-Source: ADUXVKKpPqI9HqIQcyhlVihDmYcmXAgx2OE2bzaVmpMct46NBH/jKx8HPTaes5DG3hDTPzlpBEsJdQ== X-Received: by 2002:a17:902:422:: with SMTP id 31-v6mr10336786ple.320.1527838264880; Fri, 01 Jun 2018 00:31:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 1 Jun 2018 00:30:25 -0700 Message-Id: <20180601073050.8054-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180601073050.8054-1-richard.henderson@linaro.org> References: <20180601073050.8054-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH 08/33] linux-user: Make syscall number unsigned X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier --- linux-user/qemu.h | 2 +- linux-user/syscall.c | 20 ++++++++++---------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 05a82a3628..623a8d8b7a 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -231,7 +231,7 @@ abi_long memcpy_to_target(abi_ulong dest, const void *s= rc, void target_set_brk(abi_ulong new_brk); abi_long do_brk(abi_ulong new_brk); void syscall_init(void); -abi_long do_syscall(void *cpu_env, int num, abi_long arg1, +abi_long do_syscall(void *cpu_env, unsigned num, abi_long arg1, abi_long arg2, abi_long arg3, abi_long arg4, abi_long arg5, abi_long arg6, abi_long arg7, abi_long arg8); diff --git a/linux-user/syscall.c b/linux-user/syscall.c index a413aad658..e2e2d58e84 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -719,20 +719,20 @@ static inline int next_free_host_timer(void) =20 /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers= */ #ifdef TARGET_ARM -static inline int regpairs_aligned(void *cpu_env, int num) +static inline int regpairs_aligned(void *cpu_env, unsigned num) { return ((((CPUARMState *)cpu_env)->eabi) =3D=3D 1) ; } #elif defined(TARGET_MIPS) && (TARGET_ABI_BITS =3D=3D 32) -static inline int regpairs_aligned(void *cpu_env, int num) { return 1; } +static inline int regpairs_aligned(void *cpu_env, unsigned num) { return 1= ; } #elif defined(TARGET_PPC) && !defined(TARGET_PPC64) /* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pa= irs * of registers which translates to the same as ARM/MIPS, because we start= with * r3 as arg1 */ -static inline int regpairs_aligned(void *cpu_env, int num) { return 1; } +static inline int regpairs_aligned(void *cpu_env, unsigned num) { return 1= ; } #elif defined(TARGET_SH4) /* SH4 doesn't align register pairs, except for p{read,write}64 */ -static inline int regpairs_aligned(void *cpu_env, int num) +static inline int regpairs_aligned(void *cpu_env, unsigned num) { switch (num) { case TARGET_NR_pread64: @@ -744,9 +744,9 @@ static inline int regpairs_aligned(void *cpu_env, int n= um) } } #elif defined(TARGET_XTENSA) -static inline int regpairs_aligned(void *cpu_env, int num) { return 1; } +static inline int regpairs_aligned(void *cpu_env, unsigned num) { return 1= ; } #else -static inline int regpairs_aligned(void *cpu_env, int num) { return 0; } +static inline int regpairs_aligned(void *cpu_env, unsigned num) { return 0= ; } #endif =20 #define ERRNO_TABLE_SIZE 1200 @@ -7962,9 +7962,9 @@ static int host_to_target_cpu_mask(const unsigned lon= g *host_mask, return 0; } =20 -static abi_long do_unimplemented(int num) +static abi_long do_unimplemented(unsigned num) { - gemu_log("qemu: Unsupported syscall: %d\n", num); + gemu_log("qemu: Unsupported syscall: %u\n", num); return -TARGET_ENOSYS; } =20 @@ -7973,7 +7973,7 @@ static abi_long do_unimplemented(int num) * of syscall results, can be performed. * All errnos that do_syscall() returns must be -TARGET_. */ -static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, +static abi_long do_syscall1(void *cpu_env, unsigned num, abi_long arg1, abi_long arg2, abi_long arg3, abi_long arg4, abi_long arg5, abi_long arg6, abi_long arg7, abi_long arg8) @@ -12880,7 +12880,7 @@ static abi_long do_syscall1(void *cpu_env, int num,= abi_long arg1, return ret; } =20 -abi_long do_syscall(void *cpu_env, int num, abi_long arg1, +abi_long do_syscall(void *cpu_env, unsigned num, abi_long arg1, abi_long arg2, abi_long arg3, abi_long arg4, abi_long arg5, abi_long arg6, abi_long arg7, abi_long arg8) --=20 2.17.0