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[50.233.235.3]) by smtp.gmail.com with ESMTPSA id b89-v6sm66680075pfd.85.2018.05.27.07.13.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 27 May 2018 07:13:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tvjSvxGn+nz0RcAR2Ze2jt1il5v9vY+Bsm/f1+/7924=; b=GrT73jl72AWEhsHCWrneOMDbAlDID+NiBDTh4hv+uo1N+y5Fo564KPvwB/EHzXUUDh g8pjJCiriMyxjR++ea424oqQRbpILSXwmGscu7nP9YJdCCFleVUsBOthhHs+9/fTrALU ePl8Bu7o9hUIJRcf2BadHe6UuObvvAXfhms3o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tvjSvxGn+nz0RcAR2Ze2jt1il5v9vY+Bsm/f1+/7924=; b=GNRpvh8SD8SietjgsMYtJn3XTQF2EF8H52OeZnnYT2WZXY6HRUjF9DkNX028zzNpG4 aZUDVqBFVoffrKrHtklhzf6AqbklVRgRv8APIZpw2ck5Mf5pRqSah5g35saPsx/4KxJ6 PPWImmV1iihfGsRUgcrIvH5dXhz7D3/0L870znKi0kR+W8rZeclLzGtLDcTcS14jpx6b MUv6wrZtTCdsJg15Jm+jMbtVVE+/gsIsjm5unWT8zvHkILEfQWI3AYDEJI0OqKM3aZkq KzWfnr3sxl47KMgyYlWDsCdjHOM3ttNe5E4mToSYq3Ov2XZBdN1XHy60BuiVjPuJZrj/ cKGQ== X-Gm-Message-State: ALKqPwdrD6ICZ4uBw44WuhzxI/A2rjDnREXmRHYbbtlNMf8756jOXMdl Akc6Tc03w5BxcqVEQOxwkCSQQ8TfIyj/4Q== X-Google-Smtp-Source: AB8JxZojxuzkxr+Gx8FimcfZ2rie6B/HCTv5J35TkJitvG+Oczxw/7KqLnqKFjZCYdLI4Lx6NXsN0Q== X-Received: by 2002:a17:902:6b8b:: with SMTP id p11-v6mr9881496plk.212.1527430434782; Sun, 27 May 2018 07:13:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 27 May 2018 09:13:21 -0500 Message-Id: <20180527141324.11937-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180527141324.11937-1-richard.henderson@linaro.org> References: <20180527141324.11937-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::229 Subject: [Qemu-devel] [PATCH 17/20] target/openrisc: Increase the TLB size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stafford Horne Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The architecture supports 128 TLB entries. There is no reason not to provide all of them. In the process we need to fix a bug that failed to parameterize the configuration register that tells the operating system the number of entries. Signed-off-by: Richard Henderson --- target/openrisc/cpu.h | 2 +- target/openrisc/cpu.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 53abe965e8..8035654087 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -222,7 +222,7 @@ enum { =20 /* TLB size */ enum { - TLB_SIZE =3D 64, + TLB_SIZE =3D 128, TLB_MASK =3D TLB_SIZE - 1, }; =20 diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index b2711a961e..75c83d15d1 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -53,8 +53,10 @@ static void openrisc_cpu_reset(CPUState *s) =20 cpu->env.upr =3D UPR_UP | UPR_DMP | UPR_IMP | UPR_PICP | UPR_TTP | UPR_PMP; - cpu->env.dmmucfgr =3D (DMMUCFGR_NTW & (0 << 2)) | (DMMUCFGR_NTS & (6 <= < 2)); - cpu->env.immucfgr =3D (IMMUCFGR_NTW & (0 << 2)) | (IMMUCFGR_NTS & (6 <= < 2)); + cpu->env.dmmucfgr =3D (DMMUCFGR_NTW & (0 << 2)) + | (DMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); + cpu->env.immucfgr =3D (IMMUCFGR_NTW & (0 << 2)) + | (IMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); =20 #ifndef CONFIG_USER_ONLY cpu->env.picmr =3D 0x00000000; --=20 2.17.0