From nobody Sun Nov 2 16:26:22 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1527431421112822.335677030592; Sun, 27 May 2018 07:30:21 -0700 (PDT) Received: from localhost ([::1]:52280 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fMwge-0004GR-DG for importer@patchew.org; Sun, 27 May 2018 10:30:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57807) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fMwQh-00009n-5E for qemu-devel@nongnu.org; Sun, 27 May 2018 10:13:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fMwQe-0004Qc-0v for qemu-devel@nongnu.org; Sun, 27 May 2018 10:13:51 -0400 Received: from mail-pl0-x22d.google.com ([2607:f8b0:400e:c01::22d]:38768) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fMwQd-0004QS-Rj for qemu-devel@nongnu.org; Sun, 27 May 2018 10:13:47 -0400 Received: by mail-pl0-x22d.google.com with SMTP id c11-v6so5733076plr.5 for ; Sun, 27 May 2018 07:13:47 -0700 (PDT) Received: from cloudburst.twiddle.net (50-233-235-3-static.hfc.comcastbusiness.net. [50.233.235.3]) by smtp.gmail.com with ESMTPSA id b89-v6sm66680075pfd.85.2018.05.27.07.13.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 27 May 2018 07:13:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=v4CJ/+3Lq/AhnRzfAd+D5Kf34+Ue0qdakQgog/y5diw=; b=cN+Xh8FdwsKF3lfW7NrDY7EX+/NMq57wzAHJAM2YL/dI5jtvhF1pIntQJk28NBUkhe hebkZCHDZaFdC+HeuAFyqF9W5gSn6ctTdORdzuRKWHy4hCs9hnhmF+i85W2z4NLrNNju 3vBZnIRJCBytgaTU/QXSaGyVVhSyTuIA/5H+c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=v4CJ/+3Lq/AhnRzfAd+D5Kf34+Ue0qdakQgog/y5diw=; b=mFcTeb3jm9RdmfFadSmKWJ88AsXl3YvtlnHcjs+pBzuHe1EBLaLsXs1ams5bdT0CZF 5pPA+cl1NH+iuJ+zU2TDYEzVyReY8in4XZQNUFJi7bPfJ4JktHbJCDU+K+Iz9i+xjbaC QxT1Wj3Kga+S2qOaAonleAw5B8OMi6EcVdAxN3PAjmTfvfmbVXhL1gkvZfbkLKKmFJoO AC9VNWcrieRPwEd7GLR7BseXX/O9R6ZNUONNrzUHCf0UbK85cFH9mpziZfC85ZXFkG5r iyqUKcZlu7vQum51YkNoCQUFid5LCH96ooN9/TwpcIF8q2yz/Rs2z0fDPkUTAzD5XHQi 2bQg== X-Gm-Message-State: ALKqPwdPD9QwBX9vnde/IWPHPHAauzN1A24ymrXqX/4tp+l4yRK3DtQk cXkEW5mgSyXpRfJuPSuRh8VHWGR+MSzrkA== X-Google-Smtp-Source: AB8JxZpkhRQj9ZdziXREs5YgD7UrYxcliYxLD2OeH78r3jYNv4vFf5oUb19S7JSUPJ/to9ERW9MVqg== X-Received: by 2002:a17:902:b189:: with SMTP id s9-v6mr10081233plr.352.1527430426545; Sun, 27 May 2018 07:13:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 27 May 2018 09:13:16 -0500 Message-Id: <20180527141324.11937-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180527141324.11937-1-richard.henderson@linaro.org> References: <20180527141324.11937-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::22d Subject: [Qemu-devel] [PATCH 12/20] target/openrisc: Fix tlb flushing in mtspr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stafford Horne Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The previous code was confused, avoiding the flush of the old entry if the new entry is invalid. We need to flush the old page if the old entry is valid and the new page if the new entry is valid. This bug was masked by over-flushing elsewhere. Signed-off-by: Richard Henderson --- target/openrisc/sys_helper.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index 8ad7a7d898..e00aaa332e 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -32,6 +32,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong sp= r, target_ulong rb) #ifndef CONFIG_USER_ONLY OpenRISCCPU *cpu =3D openrisc_env_get_cpu(env); CPUState *cs =3D CPU(cpu); + target_ulong mr; int idx; =20 switch (spr) { @@ -84,12 +85,15 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong = spr, target_ulong rb) =20 case TO_SPR(1, 512) ... TO_SPR(1, 512+DTLB_SIZE-1): /* DTLBW0MR 0-127 = */ idx =3D spr - TO_SPR(1, 512); - if (!(rb & 1)) { - tlb_flush_page(cs, env->tlb.dtlb[idx].mr & TARGET_PAGE_MASK); + mr =3D env->tlb.dtlb[idx].mr; + if (mr & 1) { + tlb_flush_page(cs, mr & TARGET_PAGE_MASK); + } + if (rb & 1) { + tlb_flush_page(cs, rb & TARGET_PAGE_MASK); } env->tlb.dtlb[idx].mr =3D rb; break; - case TO_SPR(1, 640) ... TO_SPR(1, 640+DTLB_SIZE-1): /* DTLBW0TR 0-127 = */ idx =3D spr - TO_SPR(1, 640); env->tlb.dtlb[idx].tr =3D rb; @@ -101,14 +105,18 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulon= g spr, target_ulong rb) case TO_SPR(1, 1280) ... TO_SPR(1, 1407): /* DTLBW3MR 0-127 */ case TO_SPR(1, 1408) ... TO_SPR(1, 1535): /* DTLBW3TR 0-127 */ break; + case TO_SPR(2, 512) ... TO_SPR(2, 512+ITLB_SIZE-1): /* ITLBW0MR 0-12= 7 */ idx =3D spr - TO_SPR(2, 512); - if (!(rb & 1)) { - tlb_flush_page(cs, env->tlb.itlb[idx].mr & TARGET_PAGE_MASK); + mr =3D env->tlb.itlb[idx].mr; + if (mr & 1) { + tlb_flush_page(cs, mr & TARGET_PAGE_MASK); + } + if (rb & 1) { + tlb_flush_page(cs, rb & TARGET_PAGE_MASK); } env->tlb.itlb[idx].mr =3D rb; break; - case TO_SPR(2, 640) ... TO_SPR(2, 640+ITLB_SIZE-1): /* ITLBW0TR 0-127 = */ idx =3D spr - TO_SPR(2, 640); env->tlb.itlb[idx].tr =3D rb; @@ -120,6 +128,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong = spr, target_ulong rb) case TO_SPR(2, 1280) ... TO_SPR(2, 1407): /* ITLBW3MR 0-127 */ case TO_SPR(2, 1408) ... TO_SPR(2, 1535): /* ITLBW3TR 0-127 */ break; + case TO_SPR(5, 1): /* MACLO */ env->mac =3D deposit64(env->mac, 0, 32, rb); break; --=20 2.17.0