From nobody Mon May 6 22:43:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1527008104009420.7099491639092; Tue, 22 May 2018 09:55:04 -0700 (PDT) Received: from localhost ([::1]:56873 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAYx-000060-5r for importer@patchew.org; Tue, 22 May 2018 12:55:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53271) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAV5-0005vn-S0 for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fLAV2-0007qJ-Qv for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:03 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:51912 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fLAV2-0007pv-Lb for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:00 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0BAEA40BC059 for ; Tue, 22 May 2018 16:51:00 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-193.ams2.redhat.com [10.36.116.193]) by smtp.corp.redhat.com (Postfix) with ESMTP id 90FDD215CDAA; Tue, 22 May 2018 16:50:59 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id E87493F119; Tue, 22 May 2018 18:50:58 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 22 May 2018 18:50:53 +0200 Message-Id: <20180522165058.15404-2-kraxel@redhat.com> In-Reply-To: <20180522165058.15404-1-kraxel@redhat.com> References: <20180522165058.15404-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Tue, 22 May 2018 16:51:00 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Tue, 22 May 2018 16:51:00 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 1/6] vga: move bochs vbe defines to header file X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Create a new header file, move the bochs vbe dispi interface defines to it, so they can be used outside vga code. Signed-off-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Marc-Andr=C3=A9 Lureau --- hw/display/vga_int.h | 35 ++------------------- include/hw/display/bochs-vbe.h | 69 ++++++++++++++++++++++++++++++++++++++= ++++ hw/display/vga-pci.c | 13 -------- 3 files changed, 71 insertions(+), 46 deletions(-) create mode 100644 include/hw/display/bochs-vbe.h diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h index fe23b81442..313cff84fc 100644 --- a/hw/display/vga_int.h +++ b/hw/display/vga_int.h @@ -29,42 +29,11 @@ #include "exec/memory.h" #include "ui/console.h" =20 +#include "hw/display/bochs-vbe.h" + #define ST01_V_RETRACE 0x08 #define ST01_DISP_ENABLE 0x01 =20 -#define VBE_DISPI_MAX_XRES 16000 -#define VBE_DISPI_MAX_YRES 12000 -#define VBE_DISPI_MAX_BPP 32 - -#define VBE_DISPI_INDEX_ID 0x0 -#define VBE_DISPI_INDEX_XRES 0x1 -#define VBE_DISPI_INDEX_YRES 0x2 -#define VBE_DISPI_INDEX_BPP 0x3 -#define VBE_DISPI_INDEX_ENABLE 0x4 -#define VBE_DISPI_INDEX_BANK 0x5 -#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 -#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 -#define VBE_DISPI_INDEX_X_OFFSET 0x8 -#define VBE_DISPI_INDEX_Y_OFFSET 0x9 -#define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */ -#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs= */ - -#define VBE_DISPI_ID0 0xB0C0 -#define VBE_DISPI_ID1 0xB0C1 -#define VBE_DISPI_ID2 0xB0C2 -#define VBE_DISPI_ID3 0xB0C3 -#define VBE_DISPI_ID4 0xB0C4 -#define VBE_DISPI_ID5 0xB0C5 - -#define VBE_DISPI_DISABLED 0x00 -#define VBE_DISPI_ENABLED 0x01 -#define VBE_DISPI_GETCAPS 0x02 -#define VBE_DISPI_8BIT_DAC 0x20 -#define VBE_DISPI_LFB_ENABLED 0x40 -#define VBE_DISPI_NOCLEARMEM 0x80 - -#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000 - #define CH_ATTR_SIZE (160 * 100) #define VGA_MAX_HEIGHT 2048 =20 diff --git a/include/hw/display/bochs-vbe.h b/include/hw/display/bochs-vbe.h new file mode 100644 index 0000000000..bc2f046eee --- /dev/null +++ b/include/hw/display/bochs-vbe.h @@ -0,0 +1,69 @@ +#ifndef HW_DISPLAY_BOCHS_VBE_H +#define HW_DISPLAY_BOCHS_VBE_H + +/* + * bochs vesa bios extension interface + */ + +#define VBE_DISPI_MAX_XRES 16000 +#define VBE_DISPI_MAX_YRES 12000 +#define VBE_DISPI_MAX_BPP 32 + +#define VBE_DISPI_INDEX_ID 0x0 +#define VBE_DISPI_INDEX_XRES 0x1 +#define VBE_DISPI_INDEX_YRES 0x2 +#define VBE_DISPI_INDEX_BPP 0x3 +#define VBE_DISPI_INDEX_ENABLE 0x4 +#define VBE_DISPI_INDEX_BANK 0x5 +#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 +#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 +#define VBE_DISPI_INDEX_X_OFFSET 0x8 +#define VBE_DISPI_INDEX_Y_OFFSET 0x9 +#define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */ +#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs= */ + +/* VBE_DISPI_INDEX_ID */ +#define VBE_DISPI_ID0 0xB0C0 +#define VBE_DISPI_ID1 0xB0C1 +#define VBE_DISPI_ID2 0xB0C2 +#define VBE_DISPI_ID3 0xB0C3 +#define VBE_DISPI_ID4 0xB0C4 +#define VBE_DISPI_ID5 0xB0C5 + +/* VBE_DISPI_INDEX_ENABLE */ +#define VBE_DISPI_DISABLED 0x00 +#define VBE_DISPI_ENABLED 0x01 +#define VBE_DISPI_GETCAPS 0x02 +#define VBE_DISPI_8BIT_DAC 0x20 +#define VBE_DISPI_LFB_ENABLED 0x40 +#define VBE_DISPI_NOCLEARMEM 0x80 + +/* only used by isa-vga, pci vga devices use a memory bar */ +#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000 + + +/* + * qemu extension: mmio bar (region 2) + */ + +#define PCI_VGA_MMIO_SIZE 0x1000 + +/* vga register region */ +#define PCI_VGA_IOPORT_OFFSET 0x400 +#define PCI_VGA_IOPORT_SIZE (0x3e0 - 0x3c0) + +/* bochs vbe register region */ +#define PCI_VGA_BOCHS_OFFSET 0x500 +#define PCI_VGA_BOCHS_SIZE (0x0b * 2) + +/* qemu extension register region */ +#define PCI_VGA_QEXT_OFFSET 0x600 +#define PCI_VGA_QEXT_SIZE (2 * 4) + +/* qemu extension registers */ +#define PCI_VGA_QEXT_REG_SIZE (0 * 4) +#define PCI_VGA_QEXT_REG_BYTEORDER (1 * 4) +#define PCI_VGA_QEXT_LITTLE_ENDIAN 0x1e1e1e1e +#define PCI_VGA_QEXT_BIG_ENDIAN 0xbebebebe + +#endif /* HW_DISPLAY_BOCHS_VBE_H */ diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index f312930664..fb3e4cd400 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -31,19 +31,6 @@ #include "qemu/timer.h" #include "hw/loader.h" =20 -#define PCI_VGA_IOPORT_OFFSET 0x400 -#define PCI_VGA_IOPORT_SIZE (0x3e0 - 0x3c0) -#define PCI_VGA_BOCHS_OFFSET 0x500 -#define PCI_VGA_BOCHS_SIZE (0x0b * 2) -#define PCI_VGA_QEXT_OFFSET 0x600 -#define PCI_VGA_QEXT_SIZE (2 * 4) -#define PCI_VGA_MMIO_SIZE 0x1000 - -#define PCI_VGA_QEXT_REG_SIZE (0 * 4) -#define PCI_VGA_QEXT_REG_BYTEORDER (1 * 4) -#define PCI_VGA_QEXT_LITTLE_ENDIAN 0x1e1e1e1e -#define PCI_VGA_QEXT_BIG_ENDIAN 0xbebebebe - enum vga_pci_flags { PCI_VGA_FLAG_ENABLE_MMIO =3D 1, PCI_VGA_FLAG_ENABLE_QEXT =3D 2, --=20 2.9.3 From nobody Mon May 6 22:43:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1527007983174542.524571914454; Tue, 22 May 2018 09:53:03 -0700 (PDT) Received: from localhost ([::1]:56864 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAWr-0006pb-GE for importer@patchew.org; Tue, 22 May 2018 12:52:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53270) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAV5-0005vm-Rp for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fLAV2-0007qE-Qm for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:03 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:51910 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fLAV2-0007pu-Lq for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:00 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E78F640BC056 for ; Tue, 22 May 2018 16:50:59 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-193.ams2.redhat.com [10.36.116.193]) by smtp.corp.redhat.com (Postfix) with ESMTP id 900CD215CDA7; Tue, 22 May 2018 16:50:59 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id EFD913F11C; Tue, 22 May 2018 18:50:58 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 22 May 2018 18:50:54 +0200 Message-Id: <20180522165058.15404-3-kraxel@redhat.com> In-Reply-To: <20180522165058.15404-1-kraxel@redhat.com> References: <20180522165058.15404-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Tue, 22 May 2018 16:50:59 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Tue, 22 May 2018 16:50:59 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 2/6] vga-pci: use PCI_VGA_MMIO_SIZE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Gerd Hoffmann Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/display/vga-pci.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index fb3e4cd400..700ac58c69 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -232,7 +232,8 @@ static void pci_std_vga_realize(PCIDevice *dev, Error *= *errp) =20 /* mmio bar for vga register access */ if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_MMIO)) { - memory_region_init(&d->mmio, NULL, "vga.mmio", 4096); + memory_region_init(&d->mmio, NULL, "vga.mmio", + PCI_VGA_MMIO_SIZE); =20 if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) { qext =3D true; @@ -267,7 +268,8 @@ static void pci_secondary_vga_realize(PCIDevice *dev, E= rror **errp) s->con =3D graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); =20 /* mmio bar */ - memory_region_init(&d->mmio, OBJECT(dev), "vga.mmio", 4096); + memory_region_init(&d->mmio, OBJECT(dev), "vga.mmio", + PCI_VGA_MMIO_SIZE); =20 if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) { qext =3D true; --=20 2.9.3 From nobody Mon May 6 22:43:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1527008105373100.04481672955899; Tue, 22 May 2018 09:55:05 -0700 (PDT) Received: from localhost ([::1]:56874 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAYy-000079-KF for importer@patchew.org; Tue, 22 May 2018 12:55:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53323) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAV9-0005wr-3l for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fLAV7-0007uP-Gd for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:07 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:57578 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fLAV7-0007u5-BH for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:05 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D9DE1BB402 for ; Tue, 22 May 2018 16:51:04 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-193.ams2.redhat.com [10.36.116.193]) by smtp.corp.redhat.com (Postfix) with ESMTP id 87A1E1C67C; Tue, 22 May 2018 16:50:59 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 04B113F11D; Tue, 22 May 2018 18:50:59 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 22 May 2018 18:50:55 +0200 Message-Id: <20180522165058.15404-4-kraxel@redhat.com> In-Reply-To: <20180522165058.15404-1-kraxel@redhat.com> References: <20180522165058.15404-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Tue, 22 May 2018 16:51:04 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Tue, 22 May 2018 16:51:04 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 3/6] hw/display: add new bochs-display device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" After writing up the virtual mdev device emulating a display supporting the bochs vbe dispi interface (mbochs.ko) and seeing how simple it actually is I've figured that would be useful for qemu too. So, here it is, -device bochs-display. It is basically -device VGA without legacy vga emulation. PCI bar 0 is the framebuffer, PCI bar 2 is mmio with the registers. The vga registers are simply not there though, neither in the legacy ioport location nor in the mmio bar. Consequently it is PCI class DISPLAY_OTHER not DISPLAY_VGA. So there is no text mode emulation, no weird video modes (planar, 256color palette), no memory window at 0xa0000. Just a linear framebuffer in the pci memory bar. And the amount of code to emulate this (and therefore the attack surface) is an order of magnitude smaller when compared to vga emulation. Compatibility wise it works with OVMF (latest git master). The bochs-drm.ko linux kernel module can handle it just fine too. So UEFI guests should not see any functional difference to VGA. Signed-off-by: Gerd Hoffmann Tested-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Marc-Andr=C3=A9 Lureau --- hw/display/bochs-display.c | 325 +++++++++++++++++++++++++++++++++++++++++= ++++ hw/display/Makefile.objs | 1 + 2 files changed, 326 insertions(+) create mode 100644 hw/display/bochs-display.c diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c new file mode 100644 index 0000000000..a523e81d1d --- /dev/null +++ b/hw/display/bochs-display.c @@ -0,0 +1,325 @@ +/* + * QEMU PCI bochs display adapter. + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ +#include "qemu/osdep.h" +#include "hw/hw.h" +#include "hw/pci/pci.h" +#include "hw/display/bochs-vbe.h" + +#include "qapi/error.h" + +#include "ui/console.h" +#include "ui/qemu-pixman.h" + +typedef struct BochsDisplayMode { + pixman_format_code_t format; + uint32_t bytepp; + uint32_t width; + uint32_t height; + uint32_t stride; + uint64_t offset; + uint64_t size; +} BochsDisplayMode; + +typedef struct BochsDisplayState { + /* parent */ + PCIDevice pci; + + /* device elements */ + QemuConsole *con; + MemoryRegion vram; + MemoryRegion mmio; + MemoryRegion vbe; + MemoryRegion qext; + + /* device config */ + uint64_t vgamem; + + /* device registers */ + uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; + bool big_endian_fb; + + /* device state */ + BochsDisplayMode mode; +} BochsDisplayState; + +#define TYPE_BOCHS_DISPLAY "bochs-display" +#define BOCHS_DISPLAY(obj) OBJECT_CHECK(BochsDisplayState, (obj), \ + TYPE_BOCHS_DISPLAY) + +static const VMStateDescription vmstate_bochs_display =3D { + .name =3D "bochs-display", + .fields =3D (VMStateField[]) { + VMSTATE_PCI_DEVICE(pci, BochsDisplayState), + VMSTATE_UINT16_ARRAY(vbe_regs, BochsDisplayState, VBE_DISPI_INDEX_= NB), + VMSTATE_BOOL(big_endian_fb, BochsDisplayState), + VMSTATE_END_OF_LIST() + } +}; + +static uint64_t bochs_display_vbe_read(void *ptr, hwaddr addr, + unsigned size) +{ + BochsDisplayState *s =3D ptr; + unsigned int index =3D addr >> 1; + + switch (index) { + case VBE_DISPI_INDEX_ID: + return VBE_DISPI_ID5; + case VBE_DISPI_INDEX_VIDEO_MEMORY_64K: + return s->vgamem / (64 * 1024); + } + + if (index >=3D ARRAY_SIZE(s->vbe_regs)) { + return -1; + } + return s->vbe_regs[index]; +} + +static void bochs_display_vbe_write(void *ptr, hwaddr addr, + uint64_t val, unsigned size) +{ + BochsDisplayState *s =3D ptr; + unsigned int index =3D addr >> 1; + + if (index >=3D ARRAY_SIZE(s->vbe_regs)) { + return; + } + s->vbe_regs[index] =3D val; +} + +static const MemoryRegionOps bochs_display_vbe_ops =3D { + .read =3D bochs_display_vbe_read, + .write =3D bochs_display_vbe_write, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 4, + .impl.min_access_size =3D 2, + .impl.max_access_size =3D 2, + .endianness =3D DEVICE_LITTLE_ENDIAN, +}; + +static uint64_t bochs_display_qext_read(void *ptr, hwaddr addr, + unsigned size) +{ + BochsDisplayState *s =3D ptr; + + switch (addr) { + case PCI_VGA_QEXT_REG_SIZE: + return PCI_VGA_QEXT_SIZE; + case PCI_VGA_QEXT_REG_BYTEORDER: + return s->big_endian_fb ? + PCI_VGA_QEXT_BIG_ENDIAN : PCI_VGA_QEXT_LITTLE_ENDIAN; + default: + return 0; + } +} + +static void bochs_display_qext_write(void *ptr, hwaddr addr, + uint64_t val, unsigned size) +{ + BochsDisplayState *s =3D ptr; + + switch (addr) { + case PCI_VGA_QEXT_REG_BYTEORDER: + if (val =3D=3D PCI_VGA_QEXT_BIG_ENDIAN) { + s->big_endian_fb =3D true; + } + if (val =3D=3D PCI_VGA_QEXT_LITTLE_ENDIAN) { + s->big_endian_fb =3D false; + } + break; + } +} + +static const MemoryRegionOps bochs_display_qext_ops =3D { + .read =3D bochs_display_qext_read, + .write =3D bochs_display_qext_write, + .valid.min_access_size =3D 4, + .valid.max_access_size =3D 4, + .endianness =3D DEVICE_LITTLE_ENDIAN, +}; + +static int bochs_display_get_mode(BochsDisplayState *s, + BochsDisplayMode *mode) +{ + uint16_t *vbe =3D s->vbe_regs; + uint32_t virt_width; + + if (!(vbe[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) { + return -1; + } + + memset(mode, 0, sizeof(*mode)); + switch (vbe[VBE_DISPI_INDEX_BPP]) { + case 16: + /* best effort: support native endianess only */ + mode->format =3D PIXMAN_r5g6b5; + mode->bytepp =3D 2; + case 32: + mode->format =3D s->big_endian_fb + ? PIXMAN_BE_x8r8g8b8 + : PIXMAN_LE_x8r8g8b8; + mode->bytepp =3D 4; + break; + default: + return -1; + } + + mode->width =3D vbe[VBE_DISPI_INDEX_XRES]; + mode->height =3D vbe[VBE_DISPI_INDEX_YRES]; + virt_width =3D vbe[VBE_DISPI_INDEX_VIRT_WIDTH]; + if (virt_width < mode->width) { + virt_width =3D mode->width; + } + mode->stride =3D virt_width * mode->bytepp; + mode->size =3D (uint64_t)mode->stride * mode->height; + mode->offset =3D ((uint64_t)vbe[VBE_DISPI_INDEX_X_OFFSET] * mode->byte= pp + + (uint64_t)vbe[VBE_DISPI_INDEX_Y_OFFSET] * mode->stride= ); + + if (mode->width < 64 || mode->height < 64) { + return -1; + } + if (mode->offset + mode->size > s->vgamem) { + return -1; + } + return 0; +} + +static void bochs_display_update(void *opaque) +{ + BochsDisplayState *s =3D opaque; + BochsDisplayMode mode; + DisplaySurface *ds; + uint8_t *ptr; + int ret; + + ret =3D bochs_display_get_mode(s, &mode); + if (ret < 0) { + /* no (valid) video mode */ + return; + } + + if (memcmp(&s->mode, &mode, sizeof(mode)) !=3D 0) { + /* video mode switch */ + s->mode =3D mode; + ptr =3D memory_region_get_ram_ptr(&s->vram); + ds =3D qemu_create_displaysurface_from(mode.width, + mode.height, + mode.format, + mode.stride, + ptr + mode.offset); + dpy_gfx_replace_surface(s->con, ds); + } + + dpy_gfx_update_full(s->con); +} + +static const GraphicHwOps bochs_display_gfx_ops =3D { + .gfx_update =3D bochs_display_update, +}; + +static void bochs_display_realize(PCIDevice *dev, Error **errp) +{ + BochsDisplayState *s =3D BOCHS_DISPLAY(dev); + Object *obj =3D OBJECT(dev); + + s->con =3D graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops= , s); + + if (s->vgamem < (4 * 1024 * 1024)) { + error_setg(errp, "bochs-display: video memory too small"); + } + if (s->vgamem > (256 * 1024 * 1024)) { + error_setg(errp, "bochs-display: video memory too big"); + } + s->vgamem =3D pow2ceil(s->vgamem); + + memory_region_init_ram(&s->vram, obj, "bochs-display-vram", s->vgamem, + &error_fatal); + memory_region_init_io(&s->vbe, obj, &bochs_display_vbe_ops, s, + "bochs dispi interface", PCI_VGA_BOCHS_SIZE); + memory_region_init_io(&s->qext, obj, &bochs_display_qext_ops, s, + "qemu extended regs", PCI_VGA_QEXT_SIZE); + + memory_region_init(&s->mmio, obj, "bochs-display-mmio", + PCI_VGA_MMIO_SIZE); + memory_region_add_subregion(&s->mmio, PCI_VGA_BOCHS_OFFSET, &s->vbe); + memory_region_add_subregion(&s->mmio, PCI_VGA_QEXT_OFFSET, &s->qext); + + pci_set_byte(&s->pci.config[PCI_REVISION_ID], 2); + pci_register_bar(&s->pci, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); + pci_register_bar(&s->pci, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio); +} + +static bool bochs_display_get_big_endian_fb(Object *obj, Error **errp) +{ + BochsDisplayState *s =3D BOCHS_DISPLAY(obj); + + return s->big_endian_fb; +} + +static void bochs_display_set_big_endian_fb(Object *obj, bool value, + Error **errp) +{ + BochsDisplayState *s =3D BOCHS_DISPLAY(obj); + + s->big_endian_fb =3D value; +} + +static void bochs_display_init(Object *obj) +{ + /* Expose framebuffer byteorder via QOM */ + object_property_add_bool(obj, "big-endian-framebuffer", + bochs_display_get_big_endian_fb, + bochs_display_set_big_endian_fb, + NULL); +} + +static void bochs_display_exit(PCIDevice *dev) +{ + BochsDisplayState *s =3D BOCHS_DISPLAY(dev); + + graphic_console_close(s->con); +} + +static Property bochs_display_properties[] =3D { + DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * 1024 * 1024= ), + DEFINE_PROP_END_OF_LIST(), +}; + +static void bochs_display_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->class_id =3D PCI_CLASS_DISPLAY_OTHER; + k->vendor_id =3D PCI_VENDOR_ID_QEMU; + k->device_id =3D PCI_DEVICE_ID_QEMU_VGA; + + k->realize =3D bochs_display_realize; + k->exit =3D bochs_display_exit; + dc->vmsd =3D &vmstate_bochs_display; + dc->props =3D bochs_display_properties; + set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); +} + +static const TypeInfo bochs_display_type_info =3D { + .name =3D TYPE_BOCHS_DISPLAY, + .parent =3D TYPE_PCI_DEVICE, + .instance_size =3D sizeof(BochsDisplayState), + .instance_init =3D bochs_display_init, + .class_init =3D bochs_display_class_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void bochs_display_register_types(void) +{ + type_register_static(&bochs_display_type_info); +} + +type_init(bochs_display_register_types) diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs index 11321e466b..d907b381ae 100644 --- a/hw/display/Makefile.objs +++ b/hw/display/Makefile.objs @@ -9,6 +9,7 @@ common-obj-$(CONFIG_SSD0323) +=3D ssd0323.o common-obj-$(CONFIG_XEN) +=3D xenfb.o =20 common-obj-$(CONFIG_VGA_PCI) +=3D vga-pci.o +common-obj-$(CONFIG_VGA_PCI) +=3D bochs-display.o common-obj-$(CONFIG_VGA_ISA) +=3D vga-isa.o common-obj-$(CONFIG_VGA_ISA_MM) +=3D vga-isa-mm.o common-obj-$(CONFIG_VMWARE_VGA) +=3D vmware_vga.o --=20 2.9.3 From nobody Mon May 6 22:43:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15270082137231006.108677963736; Tue, 22 May 2018 09:56:53 -0700 (PDT) Received: from localhost ([::1]:56885 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAai-0001Px-VA for importer@patchew.org; Tue, 22 May 2018 12:56:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53308) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAV8-0005wA-1w for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fLAV7-0007uE-6H for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:06 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:58742 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fLAV7-0007tl-1K for qemu-devel@nongnu.org; Tue, 22 May 2018 12:51:05 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8BBF6818BAF3 for ; Tue, 22 May 2018 16:51:04 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-193.ams2.redhat.com [10.36.116.193]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8CD5D1C70B; Tue, 22 May 2018 16:50:59 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 0C2523F78B; Tue, 22 May 2018 18:50:59 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 22 May 2018 18:50:56 +0200 Message-Id: <20180522165058.15404-5-kraxel@redhat.com> In-Reply-To: <20180522165058.15404-1-kraxel@redhat.com> References: <20180522165058.15404-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 22 May 2018 16:51:04 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 22 May 2018 16:51:04 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 4/6] bochs-display: add dirty tracking support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Gerd Hoffmann Reviewed-by: Marc-Andr=C3=A9 Lureau --- hw/display/bochs-display.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index a523e81d1d..9607df1c34 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -191,10 +191,13 @@ static int bochs_display_get_mode(BochsDisplayState *= s, static void bochs_display_update(void *opaque) { BochsDisplayState *s =3D opaque; + DirtyBitmapSnapshot *snap =3D NULL; + bool full_update =3D false; BochsDisplayMode mode; DisplaySurface *ds; uint8_t *ptr; - int ret; + bool dirty; + int y, ys, ret; =20 ret =3D bochs_display_get_mode(s, &mode); if (ret < 0) { @@ -212,9 +215,34 @@ static void bochs_display_update(void *opaque) mode.stride, ptr + mode.offset); dpy_gfx_replace_surface(s->con, ds); + full_update =3D true; } =20 - dpy_gfx_update_full(s->con); + if (full_update) { + dpy_gfx_update_full(s->con); + } else { + snap =3D memory_region_snapshot_and_clear_dirty(&s->vram, + mode.offset, mode.si= ze, + DIRTY_MEMORY_VGA); + ys =3D -1; + for (y =3D 0; y < mode.height; y++) { + dirty =3D memory_region_snapshot_get_dirty(&s->vram, snap, + mode.offset + mode.st= ride * y, + mode.stride); + if (dirty && ys < 0) { + ys =3D y; + } + if (!dirty && ys >=3D 0) { + dpy_gfx_update(s->con, 0, ys, + mode.width, y - ys); + ys =3D -1; + } + } + if (ys >=3D 0) { + dpy_gfx_update(s->con, 0, ys, + mode.width, y - ys); + } + } } =20 static const GraphicHwOps bochs_display_gfx_ops =3D { @@ -251,6 +279,8 @@ static void bochs_display_realize(PCIDevice *dev, Error= **errp) pci_set_byte(&s->pci.config[PCI_REVISION_ID], 2); pci_register_bar(&s->pci, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); pci_register_bar(&s->pci, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio); + + memory_region_set_log(&s->vram, true, DIRTY_MEMORY_VGA); } =20 static bool bochs_display_get_big_endian_fb(Object *obj, Error **errp) --=20 2.9.3 From nobody Mon May 6 22:43:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1527007981820521.695684796721; Tue, 22 May 2018 09:53:01 -0700 (PDT) Received: from localhost ([::1]:56862 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAWq-0006oe-0g for importer@patchew.org; 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Tue, 22 May 2018 16:51:00 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 137E940823; Tue, 22 May 2018 18:50:59 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 22 May 2018 18:50:57 +0200 Message-Id: <20180522165058.15404-6-kraxel@redhat.com> In-Reply-To: <20180522165058.15404-1-kraxel@redhat.com> References: <20180522165058.15404-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.5]); Tue, 22 May 2018 16:51:00 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.5]); Tue, 22 May 2018 16:51:00 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 5/6] bochs-display: add pcie support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Gerd Hoffmann --- hw/display/bochs-display.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index 9607df1c34..c33524b558 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -253,6 +253,7 @@ static void bochs_display_realize(PCIDevice *dev, Error= **errp) { BochsDisplayState *s =3D BOCHS_DISPLAY(dev); Object *obj =3D OBJECT(dev); + int ret; =20 s->con =3D graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops= , s); =20 @@ -280,6 +281,12 @@ static void bochs_display_realize(PCIDevice *dev, Erro= r **errp) pci_register_bar(&s->pci, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); pci_register_bar(&s->pci, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio); =20 + if (pci_bus_is_express(pci_get_bus(dev))) { + dev->cap_present |=3D QEMU_PCI_CAP_EXPRESS; + ret =3D pcie_endpoint_cap_init(dev, 0x80); + assert(ret > 0); + } + memory_region_set_log(&s->vram, true, DIRTY_MEMORY_VGA); } =20 @@ -342,6 +349,7 @@ static const TypeInfo bochs_display_type_info =3D { .instance_init =3D bochs_display_init, .class_init =3D bochs_display_class_init, .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { }, }, --=20 2.9.3 From nobody Mon May 6 22:43:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1527007983173688.5910704877516; Tue, 22 May 2018 09:53:03 -0700 (PDT) Received: from localhost ([::1]:56863 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fLAWq-0006pP-2Q for importer@patchew.org; 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Tue, 22 May 2018 16:51:00 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 1AF81409E3; Tue, 22 May 2018 18:50:59 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 22 May 2018 18:50:58 +0200 Message-Id: <20180522165058.15404-7-kraxel@redhat.com> In-Reply-To: <20180522165058.15404-1-kraxel@redhat.com> References: <20180522165058.15404-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Tue, 22 May 2018 16:51:00 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Tue, 22 May 2018 16:51:00 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 6/6] MAINTAINERS: add vga entries X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add entries for standard vga, virtio-gpu and cirrus. Signed-off-by: Gerd Hoffmann Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- MAINTAINERS | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index e187b1f18f..2af3ad5172 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1314,6 +1314,27 @@ S: Maintained F: include/hw/misc/unimp.h F: hw/misc/unimp.c =20 +Standard VGA +M: Gerd Hoffmann +S: Maintained +F: hw/display/vga* +F: hw/display/bochs-display.c +F: include/hw/display/vga.h +F: include/hw/display/bochs-vbe.h + +virtio-gpu +M: Gerd Hoffmann +S: Maintained +F: hw/display/virtio-gpu* +F: hw/display/virtio-vga.c +F: include/hw/virtio/virtio-gpu.h + +Cirrus VGA +M: Gerd Hoffmann +S: Odd Fixes +W: https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmfu= l/ +F: hw/display/cirrus* + Subsystems ---------- Audio --=20 2.9.3